310ea55f29
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode (which is not right because TX2 is ARMv8.1) as well as requiring a few redundancies in the defines, making it harder to maintain and understand what core has what. A few other minor issues were also fixed. Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX, ThunderX2, and XGene. Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester. A summary: * Removed TX2 code from ARMv8 build, to make sure it is compatible with all ARMv8 cores, not just v8.1. Also, the TX2 code has actually harmed performance on big cores. * Commoned up ARMv8 architectures' defines in params.h, to make sure that all will benefit from ARMv8 settings, in addition to their own. * Adding a few more cores, using ARMv8's include strategy, to benefit from compiler optimisations using mtune. Also updated cache information from the manuals, making sure we set good conservative values by default. Removed Vulcan, as it's an alias to TX2. * Auto-detecting most of those cores, but also updating the forced compilation in getarch.c, to make sure the parameters are the same whether compiled natively or forced arch. Benefits: * ARMv8 build is now guaranteed to work on all ARMv8 cores * Improved performance for ARMv8 builds on some cores (A72, Falkor, ThunderX1 and 2: up to 11%) over current develop * Improved performance for *all* cores comparing to develop branch before TX2's patch (9% ~ 36%) * ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than current develop's branch and 8% faster than deveop before tx2 patches Issues: * Regression from current develop branch for A53 (-12%) and A57 (-3%) with ARMv8 builds, but still faster than before TX2's commit (+15% and +24% respectively). This can be improved with a simplification of TX2's code, to be done in future patches. At least the code is guaranteed to be ARMv8.0 now. Comments: * CortexA57 builds are unchanged on A57 hardware from develop's branch, which makes sense, as it's untouched. * CortexA72 builds improve over A57 on A72 hardware, even if they're using the same includes due to new compiler tunning in the makefile.
97 lines
823 B
Plaintext
97 lines
823 B
Plaintext
Force Target Examples:
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make TARGET=NEHALEM
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make TARGET=LOONGSON3A BINARY=64
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make TARGET=ISTANBUL
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Supported List:
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1.X86/X86_64
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a)Intel CPU:
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P2
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KATMAI
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COPPERMINE
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NORTHWOOD
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PRESCOTT
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BANIAS
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YONAH
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CORE2
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PENRYN
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DUNNINGTON
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NEHALEM
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SANDYBRIDGE
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HASWELL
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SKYLAKEX
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ATOM
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b)AMD CPU:
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ATHLON
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OPTERON
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OPTERON_SSE3
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BARCELONA
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SHANGHAI
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ISTANBUL
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BOBCAT
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BULLDOZER
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PILEDRIVER
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STEAMROLLER
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EXCAVATOR
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ZEN
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c)VIA CPU:
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SSE_GENERIC
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VIAC3
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NANO
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2.Power CPU:
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POWER4
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POWER5
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POWER6
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POWER7
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POWER8
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PPCG4
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PPC970
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PPC970MP
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PPC440
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PPC440FP2
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CELL
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3.MIPS CPU:
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P5600
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1004K
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4.MIPS64 CPU:
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SICORTEX
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LOONGSON3A
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LOONGSON3B
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I6400
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P6600
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I6500
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5.IA64 CPU:
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ITANIUM2
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6.SPARC CPU:
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SPARC
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SPARCV7
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7.ARM CPU:
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CORTEXA15
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CORTEXA9
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ARMV7
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ARMV6
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ARMV5
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8.ARM 64-bit CPU:
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ARMV8
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CORTEXA53
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CORTEXA57
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CORTEXA72
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CORTEXA73
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FALKOR
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THUNDERX
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THUNDERX2T99
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9.System Z:
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ZARCH_GENERIC
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Z13
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