1500 lines
25 KiB
ArmAsm
1500 lines
25 KiB
ArmAsm
/***************************************************************************
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Copyright (c) 2013, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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3. Neither the name of the OpenBLAS project nor the names of
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its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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/**************************************************************************************
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* 2013/10/16 Saar
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* BLASTEST : OK
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* CTEST : OK
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* TEST : OK
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*
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**************************************************************************************/
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#define ASSEMBLER
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#include "common.h"
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#define STACKSIZE 256
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#define OLD_M r0
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#define OLD_N r1
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#define OLD_K r2
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#define OLD_A r3
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#define OLD_ALPHA_R s0
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#define OLD_ALPHA_I s1
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/******************************************************
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* [fp, #-128] - [fp, #-64] is reserved
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* for store and restore of floating point
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* registers
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*******************************************************/
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#define KKK [fp, #-240]
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#define KK [fp, #-244 ]
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#define A [fp, #-248 ]
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#define LDC [fp, #-252 ]
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#define M [fp, #-256 ]
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#define N [fp, #-260 ]
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#define K [fp, #-264 ]
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#define FP_ZERO [fp, #-236]
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#define FP_ZERO_0 [fp, #-236]
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#define FP_ZERO_1 [fp, #-232]
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#define ALPHA_I [fp, #-272]
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#define ALPHA_R [fp, #-280]
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#if !defined(__ARM_PCS_VFP)
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#define OLD_ALPHAR_SOFTFP r3
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#define OLD_ALPHAI_SOFTFP [fp, #4]
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#define OLD_A_SOFTFP [fp, #8 ]
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#define B [fp, #12 ]
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#define C [fp, #16 ]
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#define OLD_LDC [fp, #20 ]
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#define OFFSET [fp, #24 ]
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#else
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#define B [fp, #4 ]
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#define C [fp, #8 ]
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#define OLD_LDC [fp, #12 ]
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#define OFFSET [fp, #16 ]
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#endif
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#define I r0
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#define J r1
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#define L r2
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#define AO r5
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#define BO r6
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#define CO1 r8
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#define CO2 r9
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#define K1 r7
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#define BC r12
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#define A_PRE 96
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#define B_PRE 96
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#define C_PRE 64
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#if defined(NN) || defined(NT) || defined(TN) || defined(TT)
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#define FADD_R fsubs
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#define FADD_I fadds
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#define FMAC_R1 vnmul.f32
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#define FMAC_R2 vmls.f32
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#define FMAC_I1 fmuls
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#define FMAC_I2 vmls.f32
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#elif defined(CN) || defined(CT)
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#define FADD_R fadds
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#define FADD_I fsubs
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#define FMAC_R1 fmuls
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#define FMAC_R2 fmacs
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#define FMAC_I1 vnmul.f32
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#define FMAC_I2 fmacs
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#elif defined(NC) || defined(TC)
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#define FADD_R fadds
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#define FADD_I fsubs
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#define FMAC_R1 fmuls
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#define FMAC_R2 vmls.f32
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#define FMAC_I1 fmuls
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#define FMAC_I2 fmacs
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#else
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#define FADD_R fsubs
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#define FADD_I fadds
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#define FMAC_R1 vnmul.f32
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#define FMAC_R2 fmacs
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#define FMAC_I1 vnmul.f32
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#define FMAC_I2 vmls.f32
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#endif
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/**************************************************************************************
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* Macro definitions
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**************************************************************************************/
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.macro INIT2x2
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flds s16 , FP_ZERO
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vmov.f32 s17, s16
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vmov.f32 s18, s16
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vmov.f32 s19, s16
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vmov.f32 s20, s16
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vmov.f32 s21, s16
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vmov.f32 s22, s16
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vmov.f32 s23, s16
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vmov.f32 s24, s16
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vmov.f32 s25, s16
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vmov.f32 s26, s16
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vmov.f32 s27, s16
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vmov.f32 s28, s16
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vmov.f32 s29, s16
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vmov.f32 s30, s16
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vmov.f32 s31, s16
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.endm
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.macro KERNEL2x2_I
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pld [ AO , #A_PRE ]
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pld [ BO , #B_PRE ]
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vldmia.f32 AO!, { s0 - s1 }
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vldmia.f32 BO!, { s8 - s9 }
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fmuls s16 , s0, s8
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fmuls s24 , s1, s9
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vldmia.f32 AO!, { s2 - s3 }
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fmuls s17 , s0, s9
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fmuls s25 , s1, s8
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vldmia.f32 BO!, { s10 - s11 }
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fmuls s18 , s2, s8
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fmuls s26 , s3, s9
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vldmia.f32 AO!, { s4 - s5 }
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fmuls s19 , s2, s9
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fmuls s27 , s3, s8
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vldmia.f32 BO!, { s12 - s13 }
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fmuls s20 , s0, s10
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fmuls s28 , s1, s11
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vldmia.f32 AO!, { s6 - s7 }
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fmuls s21 , s0, s11
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fmuls s29 , s1, s10
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vldmia.f32 BO!, { s14 - s15 }
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fmuls s22 , s2, s10
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fmuls s30 , s3, s11
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fmuls s23 , s2, s11
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fmuls s31 , s3, s10
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.endm
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.macro KERNEL2x2_M1
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fmacs s16 , s0, s8
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vldmia.f32 AO!, { s4 - s5 }
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fmacs s24 , s1, s9
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fmacs s17 , s0, s9
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vldmia.f32 BO!, { s12 - s13 }
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fmacs s25 , s1, s8
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fmacs s18 , s2, s8
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vldmia.f32 AO!, { s6 - s7 }
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fmacs s26 , s3, s9
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fmacs s19 , s2, s9
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vldmia.f32 BO!, { s14 - s15 }
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fmacs s27 , s3, s8
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fmacs s20 , s0, s10
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fmacs s28 , s1, s11
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fmacs s21 , s0, s11
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fmacs s29 , s1, s10
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fmacs s22 , s2, s10
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fmacs s30 , s3, s11
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fmacs s23 , s2, s11
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fmacs s31 , s3, s10
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.endm
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.macro KERNEL2x2_M2
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pld [ AO , #A_PRE ]
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fmacs s16 , s4, s12
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pld [ BO , #B_PRE ]
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fmacs s24 , s5, s13
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fmacs s17 , s4, s13
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vldmia.f32 AO!, { s0 - s1 }
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fmacs s25 , s5, s12
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fmacs s18 , s6, s12
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fmacs s26 , s7, s13
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vldmia.f32 BO!, { s8 - s9 }
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fmacs s19 , s6, s13
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fmacs s27 , s7, s12
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vldmia.f32 AO!, { s2 - s3 }
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fmacs s20 , s4, s14
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fmacs s28 , s5, s15
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vldmia.f32 BO!, { s10 - s11 }
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fmacs s21 , s4, s15
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fmacs s29 , s5, s14
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fmacs s22 , s6, s14
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fmacs s30 , s7, s15
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fmacs s23 , s6, s15
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fmacs s31 , s7, s14
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.endm
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.macro KERNEL2x2_E
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fmacs s16 , s4, s12
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fmacs s24 , s5, s13
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fmacs s17 , s4, s13
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fmacs s25 , s5, s12
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fmacs s18 , s6, s12
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fmacs s26 , s7, s13
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fmacs s19 , s6, s13
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fmacs s27 , s7, s12
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fmacs s20 , s4, s14
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fmacs s28 , s5, s15
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fmacs s21 , s4, s15
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fmacs s29 , s5, s14
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fmacs s22 , s6, s14
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fmacs s30 , s7, s15
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fmacs s23 , s6, s15
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fmacs s31 , s7, s14
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.endm
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.macro KERNEL2x2_SUB
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vldmia.f32 AO!, { s0 - s1 }
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vldmia.f32 BO!, { s8 - s9 }
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fmacs s16 , s0, s8
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fmacs s24 , s1, s9
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vldmia.f32 AO!, { s2 - s3 }
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fmacs s17 , s0, s9
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fmacs s25 , s1, s8
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vldmia.f32 BO!, { s10 - s11 }
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fmacs s18 , s2, s8
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fmacs s26 , s3, s9
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fmacs s19 , s2, s9
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fmacs s27 , s3, s8
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fmacs s20 , s0, s10
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fmacs s28 , s1, s11
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fmacs s21 , s0, s11
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fmacs s29 , s1, s10
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fmacs s22 , s2, s10
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fmacs s30 , s3, s11
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fmacs s23 , s2, s11
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fmacs s31 , s3, s10
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.endm
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.macro SAVE2x2
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ldr r3 , LDC
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add CO2 , CO1, r3
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flds s0, ALPHA_R
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flds s1, ALPHA_I
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FADD_R s16, s24 , s16
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FADD_I s17, s25 , s17
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FADD_R s18, s26 , s18
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FADD_I s19, s27 , s19
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FADD_R s20, s28 , s20
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FADD_I s21, s29 , s21
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FADD_R s22, s30 , s22
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FADD_I s23, s31 , s23
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FMAC_R1 s4 , s0 , s16
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FMAC_I1 s5 , s0 , s17
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FMAC_R2 s4 , s1 , s17
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FMAC_I2 s5 , s1 , s16
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FMAC_R1 s6 , s0 , s18
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FMAC_I1 s7 , s0 , s19
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FMAC_R2 s6 , s1 , s19
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FMAC_I2 s7 , s1 , s18
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FMAC_R1 s8 , s0 , s20
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FMAC_I1 s9 , s0 , s21
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FMAC_R2 s8 , s1 , s21
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FMAC_I2 s9 , s1 , s20
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FMAC_R1 s10, s0 , s22
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FMAC_I1 s11, s0 , s23
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FMAC_R2 s10, s1 , s23
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FMAC_I2 s11, s1 , s22
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vstmia.f32 CO1, { s4 - s7 }
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vstmia.f32 CO2, { s8 - s11 }
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add CO1, CO1, #16
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.endm
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/******************************************************************************/
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.macro INIT1x2
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flds s16 , FP_ZERO
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vmov.f32 s17, s16
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vmov.f32 s20, s16
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vmov.f32 s21, s16
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vmov.f32 s24, s16
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vmov.f32 s25, s16
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vmov.f32 s28, s16
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vmov.f32 s29, s16
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.endm
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.macro KERNEL1x2_I
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pld [ AO , #A_PRE ]
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pld [ BO , #B_PRE ]
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flds s0 , [ AO ]
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flds s1 , [ AO, #4 ]
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flds s8 , [ BO ]
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flds s9 , [ BO, #4 ]
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flds s10, [ BO, #8 ]
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flds s11, [ BO, #12 ]
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fmuls s16 , s0, s8
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fmuls s24 , s1, s9
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fmuls s17 , s0, s9
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fmuls s25 , s1, s8
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fmuls s20 , s0, s10
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fmuls s28 , s1, s11
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fmuls s21 , s0, s11
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fmuls s29 , s1, s10
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add BO , BO, #16
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add AO , AO, #8
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pld [ BO , #B_PRE ]
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flds s4 , [ AO, #0 ]
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flds s5 , [ AO, #4 ]
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flds s12, [ BO ]
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flds s13, [ BO, #4 ]
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flds s14, [ BO, #8 ]
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flds s15, [ BO, #12 ]
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add BO , BO, #16
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add AO , AO, #8
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.endm
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.macro KERNEL1x2_M1
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pld [ BO , #B_PRE ]
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fmacs s16 , s0, s8
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fmacs s24 , s1, s9
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fmacs s17 , s0, s9
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fmacs s25 , s1, s8
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fmacs s20 , s0, s10
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fmacs s28 , s1, s11
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fmacs s21 , s0, s11
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fmacs s29 , s1, s10
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flds s4 , [ AO, #0 ]
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flds s5 , [ AO, #4 ]
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flds s12, [ BO ]
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flds s13, [ BO, #4 ]
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flds s14, [ BO, #8 ]
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flds s15, [ BO, #12 ]
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add BO , BO, #16
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add AO , AO, #8
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.endm
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.macro KERNEL1x2_M2
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pld [ AO , #A_PRE ]
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pld [ BO , #B_PRE ]
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fmacs s16 , s4, s12
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fmacs s24 , s5, s13
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fmacs s17 , s4, s13
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fmacs s25 , s5, s12
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fmacs s20 , s4, s14
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fmacs s28 , s5, s15
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fmacs s21 , s4, s15
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fmacs s29 , s5, s14
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flds s0 , [ AO, #0 ]
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flds s1 , [ AO, #4 ]
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flds s8 , [ BO ]
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flds s9 , [ BO, #4 ]
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flds s10, [ BO, #8 ]
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flds s11, [ BO, #12 ]
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add BO , BO, #16
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add AO , AO, #8
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.endm
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.macro KERNEL1x2_E
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fmacs s16 , s4, s12
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fmacs s24 , s5, s13
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fmacs s17 , s4, s13
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fmacs s25 , s5, s12
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fmacs s20 , s4, s14
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fmacs s28 , s5, s15
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fmacs s21 , s4, s15
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fmacs s29 , s5, s14
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.endm
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.macro KERNEL1x2_SUB
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pld [ AO , #A_PRE ]
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pld [ BO , #B_PRE ]
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flds s0 , [ AO ]
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flds s1 , [ AO, #4 ]
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flds s8 , [ BO ]
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flds s9 , [ BO, #4 ]
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flds s10, [ BO, #8 ]
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flds s11, [ BO, #12 ]
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fmacs s16 , s0, s8
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fmacs s24 , s1, s9
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fmacs s17 , s0, s9
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fmacs s25 , s1, s8
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fmacs s20 , s0, s10
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fmacs s28 , s1, s11
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fmacs s21 , s0, s11
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fmacs s29 , s1, s10
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add BO , BO, #16
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add AO , AO, #8
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.endm
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.macro SAVE1x2
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ldr r3 , LDC
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add CO2 , CO1, r3
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flds s0, ALPHA_R
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flds s1, ALPHA_I
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FADD_R s16, s24 , s16
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FADD_I s17, s25 , s17
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FADD_R s20, s28 , s20
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FADD_I s21, s29 , s21
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FMAC_R1 s4 , s0 , s16
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FMAC_I1 s5 , s0 , s17
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FMAC_R2 s4 , s1 , s17
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FMAC_I2 s5 , s1 , s16
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FMAC_R1 s8 , s0 , s20
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|
FMAC_I1 s9 , s0 , s21
|
|
FMAC_R2 s8 , s1 , s21
|
|
FMAC_I2 s9 , s1 , s20
|
|
|
|
vstmia.f32 CO1, { s4 - s5 }
|
|
vstmia.f32 CO2, { s8 - s9 }
|
|
|
|
add CO1, CO1, #8
|
|
|
|
.endm
|
|
|
|
/******************************************************************************/
|
|
|
|
.macro INIT2x1
|
|
|
|
flds s16 , FP_ZERO
|
|
vmov.f32 s17, s16
|
|
vmov.f32 s18, s16
|
|
vmov.f32 s19, s16
|
|
vmov.f32 s24, s16
|
|
vmov.f32 s25, s16
|
|
vmov.f32 s26, s16
|
|
vmov.f32 s27, s16
|
|
|
|
.endm
|
|
|
|
.macro KERNEL2x1_I
|
|
pld [ AO , #A_PRE ]
|
|
pld [ BO , #B_PRE ]
|
|
flds s0 , [ AO ]
|
|
flds s1 , [ AO, #4 ]
|
|
flds s2 , [ AO, #8 ]
|
|
flds s3 , [ AO, #12 ]
|
|
flds s8 , [ BO ]
|
|
flds s9 , [ BO, #4 ]
|
|
|
|
fmuls s16 , s0, s8
|
|
fmuls s24 , s1, s9
|
|
fmuls s17 , s0, s9
|
|
fmuls s25 , s1, s8
|
|
|
|
fmuls s18 , s2, s8
|
|
fmuls s26 , s3, s9
|
|
fmuls s19 , s2, s9
|
|
fmuls s27 , s3, s8
|
|
|
|
add BO , BO, #8
|
|
add AO , AO, #16
|
|
|
|
pld [ BO , #B_PRE ]
|
|
pld [ AO , #A_PRE ]
|
|
|
|
flds s4 , [ AO, #0 ]
|
|
flds s5 , [ AO, #4 ]
|
|
flds s6 , [ AO, #8 ]
|
|
flds s7 , [ AO, #12 ]
|
|
|
|
flds s12, [ BO ]
|
|
flds s13, [ BO, #4 ]
|
|
|
|
add BO , BO, #8
|
|
add AO , AO, #16
|
|
.endm
|
|
|
|
|
|
|
|
.macro KERNEL2x1_M1
|
|
pld [ AO , #A_PRE ]
|
|
pld [ BO , #B_PRE ]
|
|
|
|
fmacs s16 , s0, s8
|
|
fmacs s24 , s1, s9
|
|
fmacs s17 , s0, s9
|
|
fmacs s25 , s1, s8
|
|
|
|
fmacs s18 , s2, s8
|
|
fmacs s26 , s3, s9
|
|
fmacs s19 , s2, s9
|
|
fmacs s27 , s3, s8
|
|
|
|
flds s4 , [ AO, #0 ]
|
|
flds s5 , [ AO, #4 ]
|
|
flds s6 , [ AO, #8 ]
|
|
flds s7 , [ AO, #12 ]
|
|
|
|
flds s12, [ BO ]
|
|
flds s13, [ BO, #4 ]
|
|
|
|
add BO , BO, #8
|
|
add AO , AO, #16
|
|
.endm
|
|
|
|
.macro KERNEL2x1_M2
|
|
pld [ AO , #A_PRE ]
|
|
pld [ BO , #B_PRE ]
|
|
|
|
fmacs s16 , s4, s12
|
|
fmacs s24 , s5, s13
|
|
fmacs s17 , s4, s13
|
|
fmacs s25 , s5, s12
|
|
|
|
fmacs s18 , s6, s12
|
|
fmacs s26 , s7, s13
|
|
fmacs s19 , s6, s13
|
|
fmacs s27 , s7, s12
|
|
|
|
flds s0 , [ AO, #0 ]
|
|
flds s1 , [ AO, #4 ]
|
|
flds s2 , [ AO, #8 ]
|
|
flds s3 , [ AO, #12 ]
|
|
|
|
flds s8 , [ BO ]
|
|
flds s9 , [ BO, #4 ]
|
|
|
|
add BO , BO, #8
|
|
add AO , AO, #16
|
|
.endm
|
|
|
|
|
|
.macro KERNEL2x1_E
|
|
|
|
fmacs s16 , s4, s12
|
|
fmacs s24 , s5, s13
|
|
fmacs s17 , s4, s13
|
|
fmacs s25 , s5, s12
|
|
|
|
fmacs s18 , s6, s12
|
|
fmacs s26 , s7, s13
|
|
fmacs s19 , s6, s13
|
|
fmacs s27 , s7, s12
|
|
|
|
.endm
|
|
|
|
.macro KERNEL2x1_SUB
|
|
|
|
pld [ AO , #A_PRE ]
|
|
pld [ BO , #B_PRE ]
|
|
flds s0 , [ AO ]
|
|
flds s1 , [ AO, #4 ]
|
|
flds s2 , [ AO, #8 ]
|
|
flds s3 , [ AO, #12 ]
|
|
flds s8 , [ BO ]
|
|
flds s9 , [ BO, #4 ]
|
|
|
|
fmacs s16 , s0, s8
|
|
fmacs s24 , s1, s9
|
|
fmacs s17 , s0, s9
|
|
fmacs s25 , s1, s8
|
|
|
|
fmacs s18 , s2, s8
|
|
fmacs s26 , s3, s9
|
|
fmacs s19 , s2, s9
|
|
fmacs s27 , s3, s8
|
|
|
|
add BO , BO, #8
|
|
add AO , AO, #16
|
|
|
|
.endm
|
|
|
|
|
|
|
|
|
|
.macro SAVE2x1
|
|
|
|
flds s0, ALPHA_R
|
|
flds s1, ALPHA_I
|
|
|
|
FADD_R s16, s24 , s16
|
|
FADD_I s17, s25 , s17
|
|
FADD_R s18, s26 , s18
|
|
FADD_I s19, s27 , s19
|
|
|
|
FMAC_R1 s4 , s0 , s16
|
|
FMAC_I1 s5 , s0 , s17
|
|
FMAC_R2 s4 , s1 , s17
|
|
FMAC_I2 s5 , s1 , s16
|
|
|
|
FMAC_R1 s6 , s0 , s18
|
|
FMAC_I1 s7 , s0 , s19
|
|
FMAC_R2 s6 , s1 , s19
|
|
FMAC_I2 s7 , s1 , s18
|
|
|
|
vstmia.f32 CO1, { s4 - s7 }
|
|
|
|
add CO1, CO1, #16
|
|
|
|
.endm
|
|
|
|
/******************************************************************************/
|
|
|
|
.macro INIT1x1
|
|
|
|
flds s16 , FP_ZERO
|
|
vmov.f32 s17, s16
|
|
vmov.f32 s24, s16
|
|
vmov.f32 s25, s16
|
|
|
|
.endm
|
|
|
|
.macro KERNEL1x1_I
|
|
pld [ AO , #A_PRE ]
|
|
pld [ BO , #B_PRE ]
|
|
flds s0 , [ AO ]
|
|
flds s1 , [ AO, #4 ]
|
|
flds s8 , [ BO ]
|
|
flds s9 , [ BO, #4 ]
|
|
|
|
fmuls s16 , s0, s8
|
|
fmuls s24 , s1, s9
|
|
fmuls s17 , s0, s9
|
|
fmuls s25 , s1, s8
|
|
|
|
add BO , BO, #8
|
|
add AO , AO, #8
|
|
|
|
pld [ BO , #B_PRE ]
|
|
pld [ AO , #A_PRE ]
|
|
|
|
flds s4 , [ AO, #0 ]
|
|
flds s5 , [ AO, #4 ]
|
|
|
|
flds s12, [ BO ]
|
|
flds s13, [ BO, #4 ]
|
|
|
|
add BO , BO, #8
|
|
add AO , AO, #8
|
|
.endm
|
|
|
|
|
|
|
|
.macro KERNEL1x1_M1
|
|
|
|
fmacs s16 , s0, s8
|
|
fmacs s24 , s1, s9
|
|
fmacs s17 , s0, s9
|
|
fmacs s25 , s1, s8
|
|
|
|
flds s4 , [ AO, #0 ]
|
|
flds s5 , [ AO, #4 ]
|
|
|
|
flds s12, [ BO ]
|
|
flds s13, [ BO, #4 ]
|
|
|
|
add BO , BO, #8
|
|
add AO , AO, #8
|
|
.endm
|
|
|
|
.macro KERNEL1x1_M2
|
|
|
|
fmacs s16 , s4, s12
|
|
fmacs s24 , s5, s13
|
|
fmacs s17 , s4, s13
|
|
fmacs s25 , s5, s12
|
|
|
|
flds s0 , [ AO, #0 ]
|
|
flds s1 , [ AO, #4 ]
|
|
|
|
flds s8 , [ BO ]
|
|
flds s9 , [ BO, #4 ]
|
|
|
|
add BO , BO, #8
|
|
add AO , AO, #8
|
|
.endm
|
|
|
|
|
|
.macro KERNEL1x1_E
|
|
|
|
fmacs s16 , s4, s12
|
|
fmacs s24 , s5, s13
|
|
fmacs s17 , s4, s13
|
|
fmacs s25 , s5, s12
|
|
|
|
.endm
|
|
|
|
.macro KERNEL1x1_SUB
|
|
|
|
flds s0 , [ AO ]
|
|
flds s1 , [ AO, #4 ]
|
|
flds s8 , [ BO ]
|
|
flds s9 , [ BO, #4 ]
|
|
|
|
fmacs s16 , s0, s8
|
|
fmacs s24 , s1, s9
|
|
fmacs s17 , s0, s9
|
|
fmacs s25 , s1, s8
|
|
|
|
add BO , BO, #8
|
|
add AO , AO, #8
|
|
|
|
.endm
|
|
|
|
|
|
|
|
|
|
.macro SAVE1x1
|
|
|
|
flds s0, ALPHA_R
|
|
flds s1, ALPHA_I
|
|
|
|
FADD_R s16, s24 , s16
|
|
FADD_I s17, s25 , s17
|
|
|
|
FMAC_R1 s4 , s0 , s16
|
|
FMAC_I1 s5 , s0 , s17
|
|
FMAC_R2 s4 , s1 , s17
|
|
FMAC_I2 s5 , s1 , s16
|
|
|
|
vstmia.f32 CO1, { s4 - s5 }
|
|
|
|
add CO1, CO1, #8
|
|
|
|
.endm
|
|
|
|
/******************************************************************************/
|
|
|
|
|
|
/**************************************************************************************
|
|
* End of macro definitions
|
|
**************************************************************************************/
|
|
|
|
PROLOGUE
|
|
|
|
.align 5
|
|
|
|
push {r4 - r9, fp}
|
|
add fp, sp, #24
|
|
sub sp, sp, #STACKSIZE // reserve stack
|
|
|
|
#if !defined(__ARM_PCS_VFP)
|
|
vmov OLD_ALPHA_R, OLD_ALPHAR_SOFTFP
|
|
vldr OLD_ALPHA_I, OLD_ALPHAI_SOFTFP
|
|
ldr OLD_A, OLD_A_SOFTFP
|
|
#endif
|
|
str OLD_M, M
|
|
str OLD_N, N
|
|
str OLD_K, K
|
|
str OLD_A, A
|
|
vstr OLD_ALPHA_R, ALPHA_R
|
|
vstr OLD_ALPHA_I, ALPHA_I
|
|
|
|
sub r3, fp, #128
|
|
vstm r3, { s8 - s31} // store floating point registers
|
|
|
|
movs r4, #0
|
|
str r4, FP_ZERO
|
|
str r4, FP_ZERO_1
|
|
|
|
ldr r3, OLD_LDC
|
|
lsl r3, r3, #3 // ldc = ldc * 4 * 2
|
|
str r3, LDC
|
|
|
|
ldr r3, OFFSET
|
|
#ifndef LEFT
|
|
neg r3 , r3
|
|
#endif
|
|
str r3 , KK
|
|
|
|
ldr BC, B
|
|
|
|
ldr J, N
|
|
asrs J, J, #1 // J = J / 2
|
|
ble _L1_BEGIN
|
|
|
|
_L2_BEGIN:
|
|
|
|
ldr CO1, C // CO1 = C
|
|
ldr r4 , LDC
|
|
lsl r4 , r4 , #1 // LDC * 2
|
|
add r3 , r4, CO1
|
|
str r3 , C // store C
|
|
|
|
#if defined(LEFT)
|
|
ldr r3 , OFFSET
|
|
str r3 , KK
|
|
#endif
|
|
|
|
ldr AO, A // AO = A
|
|
pld [AO , #A_PRE-64]
|
|
pld [AO , #A_PRE-32]
|
|
|
|
|
|
|
|
_L2_M2_BEGIN:
|
|
|
|
ldr I, M
|
|
asrs I, I, #1 // I = I / 2
|
|
ble _L2_M1_BEGIN
|
|
|
|
_L2_M2_20:
|
|
|
|
#if (defined(LEFT) && defined(TRANSA)) || \
|
|
(!defined(LEFT) && !defined(TRANSA))
|
|
|
|
mov BO, BC
|
|
#else
|
|
mov BO, BC
|
|
ldr r3 , KK
|
|
lsls r4 , r3 , #4 // 2 * 4 * 2 float values
|
|
add BO , BO , r4
|
|
lsls r4 , r3 , #4 // 2 * 4 * 2 float values
|
|
add AO , AO , r4
|
|
|
|
#endif
|
|
|
|
#ifndef TRMMKERNEL
|
|
ldr K1, K
|
|
#elif (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
|
|
ldr K1, K
|
|
ldr r3, KK
|
|
sub K1, K1, r3
|
|
str K1, KKK
|
|
#else
|
|
ldr K1, KK
|
|
#ifdef LEFT
|
|
add K1, K1, #2 // number of values in AO
|
|
#else
|
|
add K1, K1, #2 // number of values in BO
|
|
#endif
|
|
str K1, KKK
|
|
#endif
|
|
|
|
asrs L , K1, #3 // L = L / 8
|
|
cmp L , #3
|
|
blt _L2_M2_30
|
|
.align 5
|
|
|
|
|
|
|
|
KERNEL2x2_I
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
|
|
sub L, L, #2
|
|
|
|
_L2_M2_22:
|
|
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
|
|
subs L, L, #1
|
|
bgt _L2_M2_22
|
|
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_E
|
|
|
|
b _L2_M2_44
|
|
|
|
|
|
_L2_M2_30:
|
|
tst L, #3
|
|
ble _L2_M2_40
|
|
|
|
tst L, #2
|
|
ble _L2_M2_32
|
|
|
|
KERNEL2x2_I
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
|
|
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_E
|
|
|
|
b _L2_M2_44
|
|
|
|
_L2_M2_32:
|
|
|
|
tst L, #1
|
|
ble _L2_M2_40
|
|
|
|
KERNEL2x2_I
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_M2
|
|
KERNEL2x2_M1
|
|
KERNEL2x2_E
|
|
|
|
b _L2_M2_44
|
|
|
|
|
|
_L2_M2_40:
|
|
|
|
INIT2x2
|
|
|
|
|
|
_L2_M2_44:
|
|
|
|
ands L , K1, #7 // L = L % 8
|
|
ble _L2_M2_100
|
|
|
|
_L2_M2_46:
|
|
|
|
KERNEL2x2_SUB
|
|
|
|
subs L, L, #1
|
|
bne _L2_M2_46
|
|
|
|
_L2_M2_100:
|
|
|
|
SAVE2x2
|
|
|
|
#if (defined(LEFT) && defined(TRANSA)) || \
|
|
(!defined(LEFT) && !defined(TRANSA))
|
|
ldr r3 , K
|
|
ldr r4 , KKK
|
|
sub r3 , r3 , r4
|
|
lsls r4 , r3 , #4 // 2 * 4 * 2 float values
|
|
add BO , BO , r4
|
|
lsls r4 , r3 , #4 // 2 * 4 * 2 float values
|
|
add AO , AO , r4
|
|
#endif
|
|
|
|
#if defined(LEFT)
|
|
ldr r3 , KK
|
|
add r3 , r3 , #2 // number of values in AO
|
|
str r3 , KK
|
|
#endif
|
|
|
|
|
|
_L2_M2_END:
|
|
|
|
subs I, I, #1
|
|
bne _L2_M2_20
|
|
|
|
|
|
_L2_M1_BEGIN:
|
|
|
|
ldr I, M
|
|
tst I, #1 // I = I % 2
|
|
ble _L2_END
|
|
|
|
_L2_M1_20:
|
|
|
|
INIT1x2
|
|
|
|
#if (defined(LEFT) && defined(TRANSA)) || \
|
|
(!defined(LEFT) && !defined(TRANSA))
|
|
|
|
mov BO, BC
|
|
#else
|
|
mov BO, BC
|
|
ldr r3 , KK
|
|
lsls r4 , r3 , #4 // 2 * 4 * 2 float values
|
|
add BO , BO , r4
|
|
lsls r4 , r3 , #3 // 1 * 4 * 2 float values
|
|
add AO , AO , r4
|
|
|
|
#endif
|
|
|
|
#ifndef TRMMKERNEL
|
|
ldr K1, K
|
|
#elif (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
|
|
ldr K1, K
|
|
ldr r3, KK
|
|
sub K1, K1, r3
|
|
str K1, KKK
|
|
#else
|
|
ldr K1, KK
|
|
#ifdef LEFT
|
|
add K1, K1, #1 // number of values in AO
|
|
#else
|
|
add K1, K1, #2 // number of values in BO
|
|
#endif
|
|
str K1, KKK
|
|
#endif
|
|
|
|
asrs L , K1, #3 // L = L / 8
|
|
ble _L2_M1_40
|
|
|
|
_L2_M1_22:
|
|
|
|
KERNEL1x2_SUB
|
|
KERNEL1x2_SUB
|
|
KERNEL1x2_SUB
|
|
KERNEL1x2_SUB
|
|
|
|
KERNEL1x2_SUB
|
|
KERNEL1x2_SUB
|
|
KERNEL1x2_SUB
|
|
KERNEL1x2_SUB
|
|
|
|
subs L, L, #1
|
|
bgt _L2_M1_22
|
|
|
|
|
|
_L2_M1_40:
|
|
|
|
ands L , K1, #7 // L = L % 8
|
|
ble _L2_M1_100
|
|
|
|
_L2_M1_42:
|
|
|
|
KERNEL1x2_SUB
|
|
|
|
subs L, L, #1
|
|
bgt _L2_M1_42
|
|
|
|
_L2_M1_100:
|
|
|
|
SAVE1x2
|
|
|
|
#if (defined(LEFT) && defined(TRANSA)) || \
|
|
(!defined(LEFT) && !defined(TRANSA))
|
|
ldr r3 , K
|
|
ldr r4 , KKK
|
|
sub r3 , r3 , r4
|
|
lsls r4 , r3 , #4 // 2 * 4 * 2 float values
|
|
add BO , BO , r4
|
|
lsls r4 , r3 , #3 // 1 * 4 * 2 float values
|
|
add AO , AO , r4
|
|
#endif
|
|
|
|
#if defined(LEFT)
|
|
ldr r3 , KK
|
|
add r3 , r3 , #1 // number of values in AO
|
|
str r3 , KK
|
|
#endif
|
|
|
|
|
|
|
|
_L2_END:
|
|
|
|
mov r3, BC
|
|
ldr r4, K
|
|
lsl r4, r4, #4 // k * 2 * 4 * 2
|
|
add r3, r3, r4 // B = B + K * 2 * 8
|
|
mov BC, r3
|
|
|
|
#if !defined(LEFT)
|
|
ldr r3 , KK
|
|
add r3 , r3 , #2 // number of values in BO
|
|
str r3 , KK
|
|
#endif
|
|
|
|
subs J , #1 // j--
|
|
bgt _L2_BEGIN
|
|
|
|
|
|
|
|
/*********************************************************************************************/
|
|
|
|
_L1_BEGIN:
|
|
|
|
ldr J , N
|
|
tst J , #1
|
|
ble _L999
|
|
|
|
|
|
ldr CO1, C // CO1 = C
|
|
ldr r4 , LDC
|
|
add r3 , r4, CO1
|
|
str r3 , C // store C
|
|
|
|
#if defined(LEFT)
|
|
ldr r3 , OFFSET
|
|
str r3 , KK
|
|
#endif
|
|
|
|
ldr AO, A // AO = A
|
|
|
|
_L1_M2_BEGIN:
|
|
|
|
ldr I, M
|
|
asrs I, I, #1 // I = I / 2
|
|
ble _L1_M1_BEGIN
|
|
|
|
_L1_M2_20:
|
|
|
|
#if (defined(LEFT) && defined(TRANSA)) || \
|
|
(!defined(LEFT) && !defined(TRANSA))
|
|
|
|
mov BO, BC
|
|
#else
|
|
mov BO, BC
|
|
ldr r3 , KK
|
|
lsls r4 , r3 , #3 // 1 * 4 * 2 float values
|
|
add BO , BO , r4
|
|
lsls r4 , r3 , #4 // 2 * 4 * 2 float values
|
|
add AO , AO , r4
|
|
|
|
#endif
|
|
|
|
#ifndef TRMMKERNEL
|
|
ldr K1, K
|
|
#elif (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
|
|
ldr K1, K
|
|
ldr r3, KK
|
|
sub K1, K1, r3
|
|
str K1, KKK
|
|
#else
|
|
ldr K1, KK
|
|
#ifdef LEFT
|
|
add K1, K1, #2 // number of values in AO
|
|
#else
|
|
add K1, K1, #1 // number of values in BO
|
|
#endif
|
|
str K1, KKK
|
|
#endif
|
|
|
|
asrs L , K1, #3 // L = L / 8
|
|
cmp L , #3
|
|
blt _L1_M2_30
|
|
.align 5
|
|
|
|
|
|
|
|
KERNEL2x1_I
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
|
|
sub L, L, #2
|
|
|
|
_L1_M2_22:
|
|
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
|
|
subs L, L, #1
|
|
bgt _L1_M2_22
|
|
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_E
|
|
|
|
b _L1_M2_44
|
|
|
|
|
|
_L1_M2_30:
|
|
tst L, #3
|
|
ble _L1_M2_40
|
|
|
|
tst L, #2
|
|
ble _L1_M2_32
|
|
|
|
KERNEL2x1_I
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
|
|
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_E
|
|
|
|
b _L1_M2_44
|
|
|
|
_L1_M2_32:
|
|
|
|
tst L, #1
|
|
ble _L1_M2_40
|
|
|
|
KERNEL2x1_I
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_M2
|
|
KERNEL2x1_M1
|
|
KERNEL2x1_E
|
|
|
|
b _L1_M2_44
|
|
|
|
|
|
_L1_M2_40:
|
|
|
|
INIT2x1
|
|
|
|
|
|
_L1_M2_44:
|
|
|
|
ands L , K1, #7 // L = L % 8
|
|
ble _L1_M2_100
|
|
|
|
_L1_M2_46:
|
|
|
|
KERNEL2x1_SUB
|
|
|
|
subs L, L, #1
|
|
bne _L1_M2_46
|
|
|
|
_L1_M2_100:
|
|
|
|
SAVE2x1
|
|
|
|
#if (defined(LEFT) && defined(TRANSA)) || \
|
|
(!defined(LEFT) && !defined(TRANSA))
|
|
ldr r3 , K
|
|
ldr r4 , KKK
|
|
sub r3 , r3 , r4
|
|
lsls r4 , r3 , #3 // 1 * 4 * 2 float values
|
|
add BO , BO , r4
|
|
lsls r4 , r3 , #4 // 2 * 4 * 2 float values
|
|
add AO , AO , r4
|
|
#endif
|
|
|
|
#if defined(LEFT)
|
|
ldr r3 , KK
|
|
add r3 , r3 , #2 // number of values in AO
|
|
str r3 , KK
|
|
#endif
|
|
|
|
|
|
|
|
_L1_M2_END:
|
|
|
|
subs I, I, #1
|
|
bne _L1_M2_20
|
|
|
|
|
|
_L1_M1_BEGIN:
|
|
|
|
ldr I, M
|
|
tst I, #1 // I = I % 2
|
|
ble _L1_END
|
|
|
|
_L1_M1_20:
|
|
|
|
INIT1x1
|
|
|
|
#if (defined(LEFT) && defined(TRANSA)) || \
|
|
(!defined(LEFT) && !defined(TRANSA))
|
|
|
|
mov BO, BC
|
|
#else
|
|
mov BO, BC
|
|
ldr r3 , KK
|
|
lsls r4 , r3 , #3 // 1 * 4 * 2 float values
|
|
add BO , BO , r4
|
|
lsls r4 , r3 , #3 // 1 * 4 * 2 float values
|
|
add AO , AO , r4
|
|
|
|
#endif
|
|
|
|
#ifndef TRMMKERNEL
|
|
ldr K1, K
|
|
#elif (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
|
|
ldr K1, K
|
|
ldr r3, KK
|
|
sub K1, K1, r3
|
|
str K1, KKK
|
|
#else
|
|
ldr K1, KK
|
|
#ifdef LEFT
|
|
add K1, K1, #1 // number of values in AO
|
|
#else
|
|
add K1, K1, #1 // number of values in BO
|
|
#endif
|
|
str K1, KKK
|
|
#endif
|
|
|
|
asrs L , K1, #3 // L = L / 8
|
|
ble _L1_M1_40
|
|
|
|
_L1_M1_22:
|
|
|
|
KERNEL1x1_SUB
|
|
KERNEL1x1_SUB
|
|
KERNEL1x1_SUB
|
|
KERNEL1x1_SUB
|
|
|
|
KERNEL1x1_SUB
|
|
KERNEL1x1_SUB
|
|
KERNEL1x1_SUB
|
|
KERNEL1x1_SUB
|
|
|
|
subs L, L, #1
|
|
bgt _L1_M1_22
|
|
|
|
|
|
_L1_M1_40:
|
|
|
|
ands L , K1, #7 // L = L % 8
|
|
ble _L1_M1_100
|
|
|
|
_L1_M1_42:
|
|
|
|
KERNEL1x1_SUB
|
|
|
|
subs L, L, #1
|
|
bgt _L1_M1_42
|
|
|
|
_L1_M1_100:
|
|
|
|
SAVE1x1
|
|
|
|
|
|
_L1_END:
|
|
|
|
|
|
|
|
_L999:
|
|
|
|
sub r3, fp, #128
|
|
vldm r3, { s8 - s31} // restore floating point registers
|
|
|
|
movs r0, #0 // set return value
|
|
sub sp, fp, #24
|
|
pop {r4 - r9, fp}
|
|
bx lr
|
|
|
|
EPILOGUE
|
|
|