556 lines
15 KiB
ArmAsm
556 lines
15 KiB
ArmAsm
/*******************************************************************************
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Copyright (c) 2024, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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3. Neither the name of the OpenBLAS project nor the names of
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its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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#define ASSEMBLER
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#include "common.h"
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/* Function parameters */
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#define M $r4 // param 1: m
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#define N $r5 // param 2: n
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#define SRC $r6 // param 3: src
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#define LDA $r7 // param 4: lda
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#define DST $r8 // param 5: dst
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#define I $r9
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#define J $r10
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#define S0 $r11
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#define S1 $r12
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#define S2 $r13
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#define S3 $r14
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#define S4 $r15
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#define S5 $r16
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#define S6 $r17
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#define S7 $r18
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#define S8 $r19
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#define P0 $r20
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#define P1 $r23
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#define P2 $r24
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#define P3 $r25
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#define P4 $r26
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#define T0 $r27
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#define T1 $r28
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#define T2 $r29
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#define TL $r7
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#define ZERO $r0
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#define F0 $f0
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#define F1 $f1
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#define F2 $f2
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#define F3 $f3
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#define F4 $f4
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#define F5 $f5
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#define F6 $f6
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#define F7 $f7
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/* LSX vectors */
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#define V0 $vr0
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#define V1 $vr1
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#define V2 $vr2
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#define V3 $vr3
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/* LASX vectors */
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#define U0 $xr4
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#define U1 $xr5
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#define U2 $xr6
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#define U3 $xr7
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#define U4 $xr8
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#define U5 $xr9
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#define U6 $xr10
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#define U7 $xr11
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PROLOGUE
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addi.d $sp, $sp, -56
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SDARG $r23, $sp, 0
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SDARG $r24, $sp, 8
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SDARG $r25, $sp, 16
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SDARG $r26, $sp, 24
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SDARG $r27, $sp, 32
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SDARG $r28, $sp, 40
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SDARG $r29, $sp, 48
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move S0, SRC
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move P0, DST
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addi.d I, ZERO, 0x06
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div.d T0, N, I // 1
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mul.d T1, I, T0 // 6
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sub.d N, N, T1 // 1
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srai.d T2, N, 0x02
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slli.d T2, T2, 0x02
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add.d T2, T1, T2
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mul.d P2, M, T1
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mul.d P3, M, T2
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slli.d P2, P2, 0x03
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slli.d P3, P3, 0x03
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srai.d T2, N, 0x01
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srai.d J, M, 0x03
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slli.d T2, T2, 0x01
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add.d T2, T1, T2
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add.d P2, DST, P2
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mul.d P4, M, T2
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add.d P3, DST, P3
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slli.d P4, P4, 0x03
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slli.d TL, LDA, 0x03
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add.d P4, DST, P4
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slli.d T2, TL, 0x01
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slli.d T1, M, 0x03
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mul.d T1, T1, I
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beq ZERO, J, .L_M7
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.L_J1: /* J-- */
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move S1, S0
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add.d S2, S0, TL
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add.d S3, S1, T2
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add.d S4, S2, T2
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add.d S5, S3, T2
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add.d S6, S4, T2
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add.d S7, S5, T2
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add.d S8, S6, T2
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add.d S0, S7, T2
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move P1, P0
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addi.d P0, P0, 0x180
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move I, T0
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addi.d J, J, -1
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beq ZERO, I, .L_N7
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.L_I1: /* I-- */
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xvld U0, S1, 0x00
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vld V0, S1, 0x20
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xvld U1, S2, 0x00
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vld V1, S2, 0x20
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xvld U2, S3, 0x00
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vld V2, S3, 0x20
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xvld U3, S4, 0x00
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vld V3, S4, 0x20
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xvst U0, P1, 0x00
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vst V0, P1, 0x20
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xvst U1, P1, 0x30
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vst V1, P1, 0x50
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xvst U2, P1, 0x60
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vst V2, P1, 0x80
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xvst U3, P1, 0x90
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vst V3, P1, 0xB0
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xvld U0, S5, 0x00
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vld V0, S5, 0x20
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xvld U1, S6, 0x00
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vld V1, S6, 0x20
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xvld U2, S7, 0x00
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vld V2, S7, 0x20
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xvld U3, S8, 0x00
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vld V3, S8, 0x20
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xvst U0, P1, 0xC0
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vst V0, P1, 0xE0
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xvst U1, P1, 0xF0
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vst V1, P1, 0x110
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xvst U2, P1, 0x120
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vst V2, P1, 0x140
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xvst U3, P1, 0x150
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vst V3, P1, 0x170
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addi.d S1, S1, 0x30
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addi.d S2, S2, 0x30
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addi.d S3, S3, 0x30
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addi.d S4, S4, 0x30
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addi.d S5, S5, 0x30
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addi.d S6, S6, 0x30
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addi.d S7, S7, 0x30
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addi.d S8, S8, 0x30
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addi.d I, I, -1
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add.d P1, P1, T1
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blt ZERO, I, .L_I1
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.L_N7:
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andi I, N, 0x04
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beq ZERO, I, .L_N3
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xvld U0, S1, 0x00
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xvld U1, S2, 0x00
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xvld U2, S3, 0x00
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xvld U3, S4, 0x00
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xvld U4, S5, 0x00
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xvld U5, S6, 0x00
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xvld U6, S7, 0x00
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xvld U7, S8, 0x00
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xvst U0, P2, 0x00
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xvst U1, P2, 0x20
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xvst U2, P2, 0x40
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xvst U3, P2, 0x60
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xvst U4, P2, 0x80
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xvst U5, P2, 0xA0
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xvst U6, P2, 0xC0
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xvst U7, P2, 0xE0
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addi.d S1, S1, 0x20
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addi.d S2, S2, 0x20
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addi.d S3, S3, 0x20
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addi.d S4, S4, 0x20
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addi.d S5, S5, 0x20
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addi.d S6, S6, 0x20
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addi.d S7, S7, 0x20
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addi.d S8, S8, 0x20
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addi.d P2, P2, 0x100
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.L_N3:
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andi I, N, 0x02
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beq ZERO, I, .L_N1
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xvld U0, S1, 0x00
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xvld U1, S2, 0x00
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xvld U2, S3, 0x00
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xvld U3, S4, 0x00
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xvld U4, S5, 0x00
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xvld U5, S6, 0x00
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xvld U6, S7, 0x00
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xvld U7, S8, 0x00
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xvpermi.q U0, U1, 0x02
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xvpermi.q U2, U3, 0x02
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xvpermi.q U4, U5, 0x02
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xvpermi.q U6, U7, 0x02
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xvst U0, P3, 0x00
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xvst U2, P3, 0x20
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xvst U4, P3, 0x40
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xvst U6, P3, 0x60
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addi.d S1, S1, 0x10
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addi.d S2, S2, 0x10
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addi.d S3, S3, 0x10
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addi.d S4, S4, 0x10
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addi.d S5, S5, 0x10
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addi.d S6, S6, 0x10
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addi.d S7, S7, 0x10
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addi.d S8, S8, 0x10
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addi.d P3, P3, 0x80
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.L_N1:
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andi I, N, 0x01
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beq ZERO, I, .L_N0
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fld.d F0, S1, 0x00
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fld.d F1, S2, 0x00
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fld.d F2, S3, 0x00
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fld.d F3, S4, 0x00
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fld.d F4, S5, 0x00
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fld.d F5, S6, 0x00
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fld.d F6, S7, 0x00
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fld.d F7, S8, 0x00
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fst.d F0, P4, 0x00
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fst.d F1, P4, 0x08
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fst.d F2, P4, 0x10
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fst.d F3, P4, 0x18
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fst.d F4, P4, 0x20
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fst.d F5, P4, 0x28
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fst.d F6, P4, 0x30
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fst.d F7, P4, 0x38
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addi.d S1, S1, 0x08
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addi.d S2, S2, 0x08
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addi.d S3, S3, 0x08
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addi.d S4, S4, 0x08
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addi.d S5, S5, 0x08
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addi.d S6, S6, 0x08
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addi.d S7, S7, 0x08
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addi.d S8, S8, 0x08
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addi.d P4, P4, 0x40
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.L_N0:
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blt ZERO, J, .L_J1
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.L_M7:
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andi J, M, 0x04
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beq ZERO, J, .L_M3
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move S1, S0
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add.d S2, S0, TL
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add.d S3, S1, T2
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add.d S4, S2, T2
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add.d S0, S3, T2
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move P1, P0
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addi.d P0, P0, 0xC0
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move I, T0
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beq ZERO, I, .L_4N7
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.L_4I1: /* I-- */
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xvld U0, S1, 0x00
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vld V0, S1, 0x20
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xvld U1, S2, 0x00
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vld V1, S2, 0x20
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xvld U2, S3, 0x00
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vld V2, S3, 0x20
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xvld U3, S4, 0x00
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vld V3, S4, 0x20
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xvst U0, P1, 0x00
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vst V0, P1, 0x20
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xvst U1, P1, 0x30
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vst V1, P1, 0x50
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xvst U2, P1, 0x60
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vst V2, P1, 0x80
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xvst U3, P1, 0x90
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vst V3, P1, 0xB0
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addi.d S1, S1, 0x30
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addi.d S2, S2, 0x30
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addi.d S3, S3, 0x30
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addi.d S4, S4, 0x30
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addi.d I, I, -1
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add.d P1, P1, T1
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blt ZERO, I, .L_4I1
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.L_4N7:
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andi I, N, 0x04
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beq ZERO, I, .L_4N3
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xvld U0, S1, 0x00
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xvld U1, S2, 0x00
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xvld U2, S3, 0x00
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xvld U3, S4, 0x00
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xvst U0, P2, 0x00
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xvst U1, P2, 0x20
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xvst U2, P2, 0x40
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xvst U3, P2, 0x60
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addi.d S1, S1, 0x20
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addi.d S2, S2, 0x20
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addi.d S3, S3, 0x20
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addi.d S4, S4, 0x20
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addi.d P2, P2, 0x80
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.L_4N3:
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andi I, N, 0x02
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beq ZERO, I, .L_4N1
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xvld U0, S1, 0x00
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xvld U1, S2, 0x00
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xvld U2, S3, 0x00
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xvld U3, S4, 0x00
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xvpermi.q U0, U1, 0x02
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xvpermi.q U2, U3, 0x02
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xvst U0, P3, 0x00
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xvst U2, P3, 0x20
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addi.d S1, S1, 0x10
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addi.d S2, S2, 0x10
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addi.d S3, S3, 0x10
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addi.d S4, S4, 0x10
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addi.d P3, P3, 0x40
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.L_4N1:
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andi I, N, 0x01
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beq ZERO, I, .L_M3
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fld.d F0, S1, 0x00
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fld.d F1, S2, 0x00
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fld.d F2, S3, 0x00
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fld.d F3, S4, 0x00
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fst.d F0, P4, 0x00
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fst.d F1, P4, 0x08
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fst.d F2, P4, 0x10
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fst.d F3, P4, 0x18
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addi.d S1, S1, 0x08
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addi.d S2, S2, 0x08
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addi.d S3, S3, 0x08
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addi.d S4, S4, 0x08
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addi.d P4, P4, 0x20
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.L_M3:
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andi J, M, 0x02
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beq ZERO, J, .L_M1
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move S1, S0
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add.d S2, S0, TL
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add.d S0, S0, T2
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move P1, P0
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addi.d P0, P0, 0x60
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move I, T0
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beq ZERO, I, .L_2N7
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.L_2I1: /* I-- */
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xvld U0, S1, 0x00
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vld V0, S1, 0x20
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xvld U1, S2, 0x00
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vld V1, S2, 0x20
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xvst U0, P1, 0x00
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vst V0, P1, 0x20
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xvst U1, P1, 0x30
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vst V1, P1, 0x50
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addi.d S1, S1, 0x30
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addi.d S2, S2, 0x30
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addi.d I, I, -1
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add.d P1, P1, T1
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blt ZERO, I, .L_2I1
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.L_2N7:
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andi I, N, 0x04
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beq ZERO, I, .L_2N3
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xvld U0, S1, 0x00
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xvld U1, S2, 0x00
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xvst U0, P2, 0x00
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xvst U1, P2, 0x20
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addi.d S1, S1, 0x20
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addi.d S2, S2, 0x20
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addi.d P2, P2, 0x40
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.L_2N3:
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andi I, N, 0x02
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beq ZERO, I, .L_2N1
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xvld U0, S1, 0x00
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xvld U1, S2, 0x00
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xvpermi.q U0, U1, 0x02
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xvst U0, P3, 0x00
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addi.d S1, S1, 0x10
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addi.d S2, S2, 0x10
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addi.d P3, P3, 0x20
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.L_2N1:
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andi I, N, 0x01
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beq ZERO, I, .L_M1
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fld.d F0, S1, 0x00
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fld.d F1, S2, 0x00
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fst.d F0, P4, 0x00
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fst.d F1, P4, 0x08
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addi.d S1, S1, 0x08
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addi.d S2, S2, 0x08
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addi.d P4, P4, 0x10
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.L_M1:
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andi J, M, 0x01
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beq ZERO, J, .L_M0
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move S1, S0
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add.d S2, S0, TL
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move P1, P0
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addi.d P0, P0, 0x30
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move I, T0
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beq ZERO, I, .L_1N7
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.L_1I1: /* I-- */
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xvld U0, S1, 0x00
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vld V0, S1, 0x20
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|
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xvst U0, P1, 0x00
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vst V0, P1, 0x20
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|
|
|
addi.d S1, S1, 0x30
|
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addi.d I, I, -1
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add.d P1, P1, T1
|
|
blt ZERO, I, .L_1I1
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|
|
|
.L_1N7:
|
|
andi I, N, 0x04
|
|
beq ZERO, I, .L_1N3
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|
|
|
xvld U0, S1, 0x00
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|
|
|
xvst U0, P2, 0x00
|
|
|
|
addi.d S1, S1, 0x20
|
|
addi.d P2, P2, 0x20
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|
|
|
.L_1N3:
|
|
andi I, N, 0x02
|
|
beq ZERO, I, .L_1N1
|
|
|
|
fld.d F0, S1, 0x00
|
|
fld.d F1, S1, 0x08
|
|
|
|
fst.d F0, P3, 0x00
|
|
fst.d F1, P3, 0x08
|
|
|
|
addi.d S1, S1, 0x10
|
|
addi.d P3, P3, 0x10
|
|
|
|
.L_1N1:
|
|
andi I, N, 0x01
|
|
beq ZERO, I, .L_M0
|
|
|
|
fld.d F0, S1, 0x00
|
|
|
|
fst.d F0, P4, 0x00
|
|
|
|
addi.d S1, S1, 0x08
|
|
addi.d P4, P4, 0x08
|
|
|
|
.L_M0:
|
|
LDARG $r23, $sp, 0
|
|
LDARG $r24, $sp, 8
|
|
LDARG $r25, $sp, 16
|
|
LDARG $r26, $sp, 24
|
|
LDARG $r27, $sp, 32
|
|
LDARG $r28, $sp, 40
|
|
LDARG $r29, $sp, 48
|
|
addi.d $sp, $sp, 56
|
|
jirl $r0, $r1, 0x00
|
|
|
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EPILOGUE
|