99c7bba8e4
This patch adds the basic infrastructure for adding the SkylakeX (Intel Skylake server) target. The SkylakeX target will use the AVX512 (AVX512VL level) instruction set, which brings 2 basic things: 1) 512 bit wide SIMD (2x width of AVX2) 2) 32 SIMD registers (2x the number on AVX2) This initial patch only contains a trivial transofrmation of the Haswell SGEMM kernel to AVX512VL; more will follow later but this patch aims to get the infrastructure in place for this "later". Full performance tuning has not been done yet; with more registers and wider SIMD it's in theory possible to retune the kernels but even without that there's an interesting enough performance increase (30-40% range) with just this change.
94 lines
793 B
Plaintext
94 lines
793 B
Plaintext
Force Target Examples:
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make TARGET=NEHALEM
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make TARGET=LOONGSON3A BINARY=64
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make TARGET=ISTANBUL
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Supported List:
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1.X86/X86_64
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a)Intel CPU:
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P2
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KATMAI
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COPPERMINE
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NORTHWOOD
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PRESCOTT
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BANIAS
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YONAH
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CORE2
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PENRYN
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DUNNINGTON
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NEHALEM
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SANDYBRIDGE
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HASWELL
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SKYLAKEX
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ATOM
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b)AMD CPU:
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ATHLON
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OPTERON
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OPTERON_SSE3
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BARCELONA
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SHANGHAI
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ISTANBUL
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BOBCAT
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BULLDOZER
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PILEDRIVER
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STEAMROLLER
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EXCAVATOR
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ZEN
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c)VIA CPU:
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SSE_GENERIC
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VIAC3
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NANO
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2.Power CPU:
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POWER4
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POWER5
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POWER6
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POWER7
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POWER8
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PPCG4
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PPC970
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PPC970MP
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PPC440
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PPC440FP2
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CELL
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3.MIPS CPU:
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P5600
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1004K
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4.MIPS64 CPU:
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SICORTEX
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LOONGSON3A
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LOONGSON3B
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I6400
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P6600
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I6500
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5.IA64 CPU:
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ITANIUM2
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6.SPARC CPU:
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SPARC
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SPARCV7
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7.ARM CPU:
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CORTEXA15
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CORTEXA9
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ARMV7
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ARMV6
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ARMV5
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8.ARM 64-bit CPU:
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ARMV8
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CORTEXA57
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VULCAN
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THUNDERX
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THUNDERX2T99
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9.System Z:
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ZARCH_GENERIC
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Z13
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