178 lines
5.0 KiB
C
178 lines
5.0 KiB
C
/*****************************************************************************
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Copyright (c) 2011-2015, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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3. Neither the name of the OpenBLAS project nor the names of
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its contributors may be used to endorse or promote products
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derived from this software without specific prior written
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permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************************/
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#ifndef COMMON_ARM64
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#define COMMON_ARM64
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#ifdef C_MSVC
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#include <intrin.h>
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#define MB __dmb(_ARM64_BARRIER_ISH)
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#define WMB __dmb(_ARM64_BARRIER_ISHST)
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#define RMB __dmb(_ARM64_BARRIER_ISHLD)
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#else
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#define MB __asm__ __volatile__ ("dmb ish" : : : "memory")
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#define WMB __asm__ __volatile__ ("dmb ishst" : : : "memory")
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#define RMB __asm__ __volatile__ ("dmb ishld" : : : "memory")
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#endif
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#define INLINE inline
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#if defined( F_INTERFACE_FLANG) || defined(F_INTERFACE_PGI)
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#define RETURN_BY_STACK
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#else
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#define RETURN_BY_COMPLEX
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#endif
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#ifndef ASSEMBLER
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static __inline void blas_lock(volatile BLASULONG *address){
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BLASULONG ret;
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do {
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#ifndef C_MSVC
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__asm__ __volatile__(
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"mov x4, #1 \n\t"
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"sevl \n\t"
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"1: \n\t"
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"wfe \n\t"
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"2: \n\t"
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"ldaxr x2, [%1] \n\t"
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"cbnz x2, 1b \n\t"
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"stxr w3, x4, [%1] \n\t"
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"cbnz w3, 2b \n\t"
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"mov %0, #0 \n\t"
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: "=r"(ret), "=r"(address)
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: "1"(address)
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: "memory", "x2" , "x3", "x4"
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);
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#else
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while (*address) {YIELDING;}
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ret=InterlockedExchange64((volatile LONG64 *)(address), 1);
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#endif
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} while (ret);
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}
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#define BLAS_LOCK_DEFINED
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#if !defined(OS_DARWIN) && !defined (OS_ANDROID)
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static __inline BLASULONG rpcc(void){
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#ifdef C_MSVC
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const int64_t pmccntr_el0 = (((3 & 1) << 14) | // op0
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((3 & 7) << 11) | // op1
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((9 & 15) << 7) | // crn
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((13 & 15) << 3) | // crm
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((0 & 7) << 0)); // op2
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return _ReadStatusReg(pmccntr_el0);
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#else
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BLASULONG ret = 0;
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blasint shift;
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__asm__ __volatile__ ("isb; mrs %0,cntvct_el0":"=r"(ret));
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__asm__ __volatile__ ("mrs %0,cntfrq_el0; clz %w0, %w0":"=&r"(shift));
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return ret << shift;
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#endif
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}
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#define RPCC_DEFINED
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#define RPCC64BIT
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#endif
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static inline int blas_quickdivide(blasint x, blasint y){
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return x / y;
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}
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#if defined(DOUBLE)
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#define GET_IMAGE(res) __asm__ __volatile__("str d1, %0" : "=m"(res) : : "memory")
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#else
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#define GET_IMAGE(res) __asm__ __volatile__("str s1, %0" : "=m"(res) : : "memory")
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#endif
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#define GET_IMAGE_CANCEL
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#endif
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#ifndef F_INTERFACE
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#define REALNAME ASMNAME
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#else
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#define REALNAME ASMFNAME
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#endif
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#if defined(ASSEMBLER) && !defined(NEEDPARAM)
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.macro PROLOGUE
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.text ;
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.p2align 2 ;
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.global REALNAME ;
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#if !defined(__APPLE__) && !defined(_WIN32)
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.type REALNAME, %function ;
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#endif
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REALNAME:
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.endm
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#define EPILOGUE
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#define PROFCODE
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#endif
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#define SEEK_ADDRESS
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#ifndef PAGESIZE
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#define PAGESIZE ( 4 << 10)
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#endif
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#define HUGE_PAGESIZE ( 4 << 20)
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#ifndef BUFFERSIZE
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#define BUFFER_SIZE (32 << 20)
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#else
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#define BUFFER_SIZE (32 << BUFFERSIZE)
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#endif
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#define BASE_ADDRESS (START_ADDRESS - BUFFER_SIZE * MAX_CPU_NUMBER)
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#ifndef MAP_ANONYMOUS
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#define MAP_ANONYMOUS MAP_ANON
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#endif
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#endif
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