99c7bba8e4
This patch adds the basic infrastructure for adding the SkylakeX (Intel Skylake server) target. The SkylakeX target will use the AVX512 (AVX512VL level) instruction set, which brings 2 basic things: 1) 512 bit wide SIMD (2x width of AVX2) 2) 32 SIMD registers (2x the number on AVX2) This initial patch only contains a trivial transofrmation of the Haswell SGEMM kernel to AVX512VL; more will follow later but this patch aims to get the infrastructure in place for this "later". Full performance tuning has not been done yet; with more registers and wider SIMD it's in theory possible to retune the kernels but even without that there's an interesting enough performance increase (30-40% range) with just this change. |
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| .. | ||
| arch.cmake | ||
| cc.cmake | ||
| export.cmake | ||
| f_check.cmake | ||
| fc.cmake | ||
| kernel.cmake | ||
| lapack.cmake | ||
| lapacke.cmake | ||
| openblas.pc.in | ||
| os.cmake | ||
| prebuild.cmake | ||
| system.cmake | ||
| system_check.cmake | ||
| utils.cmake | ||