288 lines
		
	
	
		
			8.5 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			288 lines
		
	
	
		
			8.5 KiB
		
	
	
	
		
			C
		
	
	
	
| /*****************************************************************************
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| Copyright (c) 2011, Lab of Parallel Software and Computational Science,ICSAS
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| All rights reserved.
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| 
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| Redistribution and use in source and binary forms, with or without
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| modification, are permitted provided that the following conditions are
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| met:
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| 
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|    1. Redistributions of source code must retain the above copyright
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|       notice, this list of conditions and the following disclaimer.
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| 
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|    2. Redistributions in binary form must reproduce the above copyright
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|       notice, this list of conditions and the following disclaimer in
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|       the documentation and/or other materials provided with the
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|       distribution.
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|    3. Neither the name of the ISCAS nor the names of its contributors may 
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|       be used to endorse or promote products derived from this software 
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|       without specific prior written permission.
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| 
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| THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
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| AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
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| IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
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| ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
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| LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
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| DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
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| SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
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| CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
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| OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
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| USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 
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| **********************************************************************************/
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| 
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| /*********************************************************************/
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| /* Copyright 2009, 2010 The University of Texas at Austin.           */
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| /* All rights reserved.                                              */
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| /*                                                                   */
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| /* Redistribution and use in source and binary forms, with or        */
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| /* without modification, are permitted provided that the following   */
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| /* conditions are met:                                               */
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| /*                                                                   */
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| /*   1. Redistributions of source code must retain the above         */
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| /*      copyright notice, this list of conditions and the following  */
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| /*      disclaimer.                                                  */
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| /*                                                                   */
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| /*   2. Redistributions in binary form must reproduce the above      */
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| /*      copyright notice, this list of conditions and the following  */
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| /*      disclaimer in the documentation and/or other materials       */
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| /*      provided with the distribution.                              */
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| /*                                                                   */
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| /*    THIS  SOFTWARE IS PROVIDED  BY THE  UNIVERSITY OF  TEXAS AT    */
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| /*    AUSTIN  ``AS IS''  AND ANY  EXPRESS OR  IMPLIED WARRANTIES,    */
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| /*    INCLUDING, BUT  NOT LIMITED  TO, THE IMPLIED  WARRANTIES OF    */
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| /*    MERCHANTABILITY  AND FITNESS FOR  A PARTICULAR  PURPOSE ARE    */
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| /*    DISCLAIMED.  IN  NO EVENT SHALL THE UNIVERSITY  OF TEXAS AT    */
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| /*    AUSTIN OR CONTRIBUTORS BE  LIABLE FOR ANY DIRECT, INDIRECT,    */
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| /*    INCIDENTAL,  SPECIAL, EXEMPLARY,  OR  CONSEQUENTIAL DAMAGES    */
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| /*    (INCLUDING, BUT  NOT LIMITED TO,  PROCUREMENT OF SUBSTITUTE    */
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| /*    GOODS  OR  SERVICES; LOSS  OF  USE,  DATA,  OR PROFITS;  OR    */
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| /*    BUSINESS INTERRUPTION) HOWEVER CAUSED  AND ON ANY THEORY OF    */
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| /*    LIABILITY, WHETHER  IN CONTRACT, STRICT  LIABILITY, OR TORT    */
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| /*    (INCLUDING NEGLIGENCE OR OTHERWISE)  ARISING IN ANY WAY OUT    */
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| /*    OF  THE  USE OF  THIS  SOFTWARE,  EVEN  IF ADVISED  OF  THE    */
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| /*    POSSIBILITY OF SUCH DAMAGE.                                    */
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| /*                                                                   */
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| /* The views and conclusions contained in the software and           */
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| /* documentation are those of the authors and should not be          */
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| /* interpreted as representing official policies, either expressed   */
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| /* or implied, of The University of Texas at Austin.                 */
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| /*********************************************************************/
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| 
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| #ifndef COMMON_MIPS64
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| #define COMMON_MIPS64
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| 
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| #define MB
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| #define WMB
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| 
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| #define INLINE inline
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| 
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| #ifndef ASSEMBLER
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| 
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| static void INLINE blas_lock(volatile unsigned long *address){
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| 
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|   long int ret, val = 1;
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| 
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|   do {
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|     while (*address) {YIELDING;};
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| 
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|     __asm__ __volatile__(
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| 			 "1:	ll	%0, %3\n"
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| 			 "	ori	%2, %0, 1\n"
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| 			 "	sc	%2, %1\n"
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| 			 "	beqz	%2, 1b\n"
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| 			 "	 andi	%2, %0, 1\n"
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| 			 "	sync\n"
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| 			 : "=&r" (val), "=m" (address), "=&r" (ret)
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| 			 : "m" (address)
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| 			 : "memory");
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| 
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|   } while (ret);
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| }
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| 
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| static inline unsigned int rpcc(void){
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|   unsigned long ret;
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| #if defined(LOONGSON3A) || defined(LOONGSON3B)
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|   //  unsigned long long tmp;
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|   //__asm__ __volatile__("dmfc0 %0, $25, 1": "=r"(tmp):: "memory");
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|   //ret=tmp;
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|   __asm__ __volatile__(".set push \n"
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|                        ".set mips32r2\n"
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|                        "rdhwr %0, $2\n"
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|                        ".set pop": "=r"(ret):: "memory");
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| 
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| #else
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|   __asm__ __volatile__(".set   push    \n"                                     
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|           ".set   mips32r2\n"                                                  
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|           "rdhwr %0, $30  \n"                                                  
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|           ".set pop" : "=r"(ret) : : "memory");
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| #endif
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|   return ret;
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| }
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| 
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| #if defined(LOONGSON3A) || defined(LOONGSON3B)
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| #ifndef NO_AFFINITY
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| #define WHEREAMI
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| static inline int WhereAmI(void){
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|   int ret=0;
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|   __asm__ __volatile__(".set push \n"
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|                        ".set mips32r2\n"
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|                        "rdhwr %0, $0\n"
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|                        ".set pop": "=r"(ret):: "memory");
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|   return ret;
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| 
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| }
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| #endif
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| #endif
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| 
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| static inline int blas_quickdivide(blasint x, blasint y){
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|   return x / y;
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| }
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| 
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| #ifdef DOUBLE
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| #define GET_IMAGE(res)  __asm__ __volatile__("mov.d %0, $f2" : "=f"(res)  : : "memory")
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| #else
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| #define GET_IMAGE(res)  __asm__ __volatile__("mov.s %0, $f2" : "=f"(res)  : : "memory")
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| #endif
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| 
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| #define GET_IMAGE_CANCEL
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| 
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| #endif
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| 
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| 
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| #ifdef ASSEMBLER
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| 
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| #define HALT	teq	$0, $0
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| #define NOP	move	$0, $0
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| 
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| #ifdef DOUBLE
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| #define LD	ldc1
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| #define ST	sdc1
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| #define MADD	madd.d
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| #define NMADD	nmadd.d
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| #define MSUB	msub.d
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| #define NMSUB	nmsub.d
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| #define ADD	add.d
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| #define SUB	sub.d
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| #define MUL	mul.d
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| #define MOV	mov.d
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| #define CMOVF	movf.d
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| #define CMOVT	movt.d
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| #define MTC	dmtc1
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| #define FABS	abs.d
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| #define CMPEQ	c.eq.d
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| #define CMPLE	c.le.d
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| #define CMPLT	c.lt.d
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| #define	NEG	neg.d
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| #else
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| #define LD	lwc1
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| #define ST	swc1
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| #define MADD	madd.s
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| #define NMADD	nmadd.s
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| #define MSUB	msub.s
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| #define NMSUB	nmsub.s
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| #define ADD	add.s
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| #define SUB	sub.s
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| #define MUL	mul.s
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| #define MOV	mov.s
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| #define CMOVF	movf.s
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| #define CMOVT	movt.s
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| #define MTC	mtc1
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| #define FABS	abs.s
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| #define CMPEQ	c.eq.s
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| #define CMPLE	c.le.s
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| #define CMPLT	c.lt.s
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| #define PLU     plu.ps                                                    
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| #define PLL     pll.ps   
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| #define PUU     puu.ps    
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| #define PUL     pul.ps   
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| #define MADPS   madd.ps   
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| #define CVTU    cvt.s.pu    
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| #define CVTL    cvt.s.pl 
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| #define	NEG	neg.s
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| #endif
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| 
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| #if   defined(__64BIT__) &&  defined(USE64BITINT)
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| #define LDINT	ld
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| #define LDARG	ld
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| #define SDARG	sd
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| #elif defined(__64BIT__) && !defined(USE64BITINT)
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| #define LDINT	lw
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| #define LDARG	ld
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| #define SDARG	sd
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| #else
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| #define LDINT	lw
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| #define LDARG	lw
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| #define SDARG	sw
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| #endif
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| 
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| 
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| #ifndef F_INTERFACE
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| #define REALNAME ASMNAME
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| #else
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| #define REALNAME ASMFNAME
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| #endif
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| 
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| #if defined(ASSEMBLER) && !defined(NEEDPARAM)
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| 
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| #define PROLOGUE \
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| 	.text ;\
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| 	.set	mips64 ;\
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| 	.align 5 ;\
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| 	.globl	REALNAME ;\
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| 	.ent	REALNAME ;\
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| 	.type	REALNAME, @function ;\
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| REALNAME: ;\
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| 	.set	noreorder ;\
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| 	.set	nomacro
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| 
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| #if defined(__linux__) && defined(__ELF__)
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| #define GNUSTACK .section .note.GNU-stack,"",@progbits
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| #else
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| #define GNUSTACK
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| #endif
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| 
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| #define EPILOGUE \
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| 	.set	macro ;\
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| 	.set	reorder ;\
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| 	.end	REALNAME ;\
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| 	GNUSTACK
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| 
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| #define PROFCODE
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| #endif
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| 
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| #endif
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| 
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| #define SEEK_ADDRESS
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| 
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| #define BUFFER_SIZE     ( 32 << 20)
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| 
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| #if defined(LOONGSON3A)
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| #define PAGESIZE	(16UL << 10)
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| #define FIXED_PAGESIZE	(16UL << 10)
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| #endif
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| 
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| #if defined(LOONGSON3B)
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| #define PAGESIZE	(16UL << 10)
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| #define FIXED_PAGESIZE	(16UL << 10)
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| #endif
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| 
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| #ifndef PAGESIZE
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| #define PAGESIZE	(64UL << 10)
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| #endif
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| #define HUGE_PAGESIZE   ( 2 << 20)
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| 
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| #define BASE_ADDRESS (START_ADDRESS - BUFFER_SIZE * MAX_CPU_NUMBER)
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| 
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| #ifndef MAP_ANONYMOUS
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| #define MAP_ANONYMOUS MAP_ANON
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| #endif
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| 
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| #if defined(LOONGSON3A) || defined(LOONGSON3B)
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| #define PREFETCHD_(x) ld $0, x
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| #define PREFETCHD(x)  PREFETCHD_(x)  
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| #else
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| #define PREFETCHD(x) 
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| #endif
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| 
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| #endif
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