751 lines
12 KiB
ArmAsm
751 lines
12 KiB
ArmAsm
/***************************************************************************
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Copyright (c) 2013, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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3. Neither the name of the OpenBLAS project nor the names of
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its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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/**************************************************************************************
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* 2013/11/25 Saar
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* BLASTEST : OK
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* CTEST : OK
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* TEST : OK
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*
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**************************************************************************************/
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#define ASSEMBLER
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#include "common.h"
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#define STACKSIZE 256
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#define OLD_LDA [fp, #0 ]
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#define X [fp, #4 ]
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#define OLD_INC_X [fp, #8 ]
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#define Y [fp, #12 ]
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#define OLD_INC_Y [fp, #16 ]
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#define OLD_A r3
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#define OLD_N r1
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#define M r0
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#define AO1 r1
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#define J r2
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#define AO2 r4
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#define XO r5
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#define YO r6
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#define LDA r7
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#define INC_X r8
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#define INC_Y r9
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#define I r12
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#define N [fp, #-252 ]
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#define A [fp, #-256 ]
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#define X_PRE 512
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#define A_PRE 512
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/**************************************************************************************
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* Macro definitions
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**************************************************************************************/
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#if defined(DOUBLE)
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.macro INIT_F2
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vsub.f64 d2 , d2 , d2
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vsub.f64 d3 , d3 , d3
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.endm
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.macro KERNEL_F2X4
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pld [ XO , #X_PRE ]
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fldmiad XO! , { d12 - d15 }
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pld [ AO1 , #A_PRE ]
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fldmiad AO1!, { d8 - d9 }
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pld [ AO2 , #A_PRE ]
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fldmiad AO2!, { d4 - d5 }
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fldmiad AO1!, { d10 - d11 }
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fldmiad AO2!, { d6 - d7 }
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vmla.f64 d2 , d12 , d8
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vmla.f64 d3 , d12 , d4
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vmla.f64 d2 , d13 , d9
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vmla.f64 d3 , d13 , d5
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vmla.f64 d2 , d14, d10
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vmla.f64 d3 , d14, d6
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vmla.f64 d2 , d15, d11
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vmla.f64 d3 , d15, d7
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.endm
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.macro KERNEL_F2X1
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fldmiad XO! , { d1 }
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fldmiad AO1!, { d8 }
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fldmiad AO2!, { d4 }
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vmla.f64 d2 , d1 , d8
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vmla.f64 d3 , d1 , d4
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.endm
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.macro SAVE_F2
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fldmiad YO, { d4 - d5 }
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vmla.f64 d4, d0, d2
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vmla.f64 d5, d0, d3
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fstmiad YO!, { d4 - d5 }
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.endm
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.macro INIT_F1
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vsub.f64 d2 , d2 , d2
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.endm
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.macro KERNEL_F1X4
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pld [ XO , #X_PRE ]
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fldmiad XO! , { d12 - d15 }
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pld [ AO1 , #A_PRE ]
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fldmiad AO1!, { d8 - d9 }
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fldmiad AO1!, { d10 - d11 }
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vmla.f64 d2 , d12 , d8
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vmla.f64 d2 , d13 , d9
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vmla.f64 d2 , d14, d10
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vmla.f64 d2 , d15, d11
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.endm
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.macro KERNEL_F1X1
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fldmiad XO! , { d1 }
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fldmiad AO1!, { d8 }
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vmla.f64 d2 , d1 , d8
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.endm
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.macro SAVE_F1
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fldmiad YO, { d4 }
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vmla.f64 d4, d0, d2
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fstmiad YO!, { d4 }
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.endm
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.macro INIT_S2
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vsub.f64 d2 , d2 , d2
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vsub.f64 d3 , d3 , d3
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.endm
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.macro KERNEL_S2X4
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fldmiad XO , { d12 }
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add XO, XO, INC_X
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pld [ AO1 , #A_PRE ]
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fldmiad AO1!, { d8 - d9 }
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pld [ AO2 , #A_PRE ]
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fldmiad AO2!, { d4 - d5 }
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fldmiad XO , { d13 }
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add XO, XO, INC_X
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fldmiad AO1!, { d10 - d11 }
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fldmiad AO2!, { d6 - d7 }
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fldmiad XO , { d14 }
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add XO, XO, INC_X
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fldmiad XO , { d15 }
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add XO, XO, INC_X
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vmla.f64 d2 , d12 , d8
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vmla.f64 d3 , d12 , d4
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vmla.f64 d2 , d13 , d9
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vmla.f64 d3 , d13 , d5
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vmla.f64 d2 , d14, d10
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vmla.f64 d3 , d14, d6
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vmla.f64 d2 , d15, d11
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vmla.f64 d3 , d15, d7
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.endm
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.macro KERNEL_S2X1
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fldmiad XO , { d1 }
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fldmiad AO1!, { d8 }
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fldmiad AO2!, { d4 }
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vmla.f64 d2 , d1 , d8
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add XO, XO, INC_X
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vmla.f64 d3 , d1 , d4
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.endm
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.macro SAVE_S2
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fldmiad YO, { d4 }
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vmla.f64 d4, d0, d2
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fstmiad YO, { d4 }
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add YO, YO, INC_Y
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fldmiad YO, { d5 }
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vmla.f64 d5, d0, d3
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fstmiad YO, { d5 }
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add YO, YO, INC_Y
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.endm
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.macro INIT_S1
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vsub.f64 d2 , d2 , d2
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.endm
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.macro KERNEL_S1X4
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fldmiad XO , { d12 }
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add XO, XO, INC_X
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pld [ AO1 , #A_PRE ]
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fldmiad AO1!, { d8 - d9 }
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fldmiad XO , { d13 }
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add XO, XO, INC_X
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fldmiad AO1!, { d10 - d11 }
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fldmiad XO , { d14 }
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add XO, XO, INC_X
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fldmiad XO , { d15 }
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add XO, XO, INC_X
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vmla.f64 d2 , d12 , d8
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vmla.f64 d2 , d13 , d9
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vmla.f64 d2 , d14, d10
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vmla.f64 d2 , d15, d11
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.endm
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.macro KERNEL_S1X1
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fldmiad XO , { d1 }
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fldmiad AO1!, { d8 }
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vmla.f64 d2 , d1 , d8
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add XO, XO, INC_X
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.endm
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.macro SAVE_S1
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fldmiad YO, { d4 }
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vmla.f64 d4, d0, d2
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fstmiad YO, { d4 }
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add YO, YO, INC_Y
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.endm
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#else /************************* SINGLE PRECISION *****************************************/
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.macro INIT_F2
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vsub.f32 s2 , s2 , s2
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vsub.f32 s3 , s3 , s3
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.endm
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.macro KERNEL_F2X4
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fldmias XO! , { s12 - s15 }
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fldmias AO1!, { s8 - s9 }
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fldmias AO2!, { s4 - s5 }
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fldmias AO1!, { s10 - s11 }
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fldmias AO2!, { s6 - s7 }
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vmla.f32 s2 , s12 , s8
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vmla.f32 s3 , s12 , s4
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vmla.f32 s2 , s13 , s9
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vmla.f32 s3 , s13 , s5
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vmla.f32 s2 , s14, s10
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vmla.f32 s3 , s14, s6
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vmla.f32 s2 , s15, s11
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vmla.f32 s3 , s15, s7
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.endm
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.macro KERNEL_F2X1
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fldmias XO! , { s1 }
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fldmias AO1!, { s8 }
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fldmias AO2!, { s4 }
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vmla.f32 s2 , s1 , s8
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vmla.f32 s3 , s1 , s4
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.endm
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.macro SAVE_F2
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fldmias YO, { s4 - s5 }
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vmla.f32 s4, s0, s2
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vmla.f32 s5, s0, s3
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fstmias YO!, { s4 - s5 }
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.endm
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.macro INIT_F1
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vsub.f32 s2 , s2 , s2
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.endm
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.macro KERNEL_F1X4
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fldmias XO! , { s12 - s15 }
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fldmias AO1!, { s8 - s9 }
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fldmias AO1!, { s10 - s11 }
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vmla.f32 s2 , s12 , s8
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vmla.f32 s2 , s13 , s9
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vmla.f32 s2 , s14, s10
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vmla.f32 s2 , s15, s11
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.endm
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.macro KERNEL_F1X1
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fldmias XO! , { s1 }
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fldmias AO1!, { s8 }
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vmla.f32 s2 , s1 , s8
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.endm
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.macro SAVE_F1
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fldmias YO, { s4 }
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vmla.f32 s4, s0, s2
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fstmias YO!, { s4 }
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.endm
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.macro INIT_S2
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vsub.f32 s2 , s2 , s2
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vsub.f32 s3 , s3 , s3
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.endm
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.macro KERNEL_S2X4
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fldmias XO , { s12 }
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add XO, XO, INC_X
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fldmias AO1!, { s8 - s9 }
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fldmias AO2!, { s4 - s5 }
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fldmias XO , { s13 }
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add XO, XO, INC_X
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fldmias AO1!, { s10 - s11 }
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fldmias AO2!, { s6 - s7 }
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fldmias XO , { s14 }
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add XO, XO, INC_X
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fldmias XO , { s15 }
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add XO, XO, INC_X
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vmla.f32 s2 , s12 , s8
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vmla.f32 s3 , s12 , s4
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vmla.f32 s2 , s13 , s9
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vmla.f32 s3 , s13 , s5
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vmla.f32 s2 , s14, s10
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vmla.f32 s3 , s14, s6
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vmla.f32 s2 , s15, s11
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vmla.f32 s3 , s15, s7
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.endm
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.macro KERNEL_S2X1
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fldmias XO , { s1 }
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fldmias AO1!, { s8 }
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fldmias AO2!, { s4 }
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vmla.f32 s2 , s1 , s8
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add XO, XO, INC_X
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vmla.f32 s3 , s1 , s4
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.endm
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.macro SAVE_S2
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fldmias YO, { s4 }
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vmla.f32 s4, s0, s2
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fstmias YO, { s4 }
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add YO, YO, INC_Y
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fldmias YO, { s5 }
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vmla.f32 s5, s0, s3
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fstmias YO, { s5 }
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add YO, YO, INC_Y
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.endm
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.macro INIT_S1
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vsub.f32 s2 , s2 , s2
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.endm
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.macro KERNEL_S1X4
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fldmias XO , { s12 }
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add XO, XO, INC_X
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pld [ AO1 , #A_PRE ]
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fldmias AO1!, { s8 - s9 }
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fldmias XO , { s13 }
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add XO, XO, INC_X
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fldmias AO1!, { s10 - s11 }
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fldmias XO , { s14 }
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add XO, XO, INC_X
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fldmias XO , { s15 }
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add XO, XO, INC_X
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vmla.f32 s2 , s12 , s8
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vmla.f32 s2 , s13 , s9
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vmla.f32 s2 , s14, s10
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vmla.f32 s2 , s15, s11
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.endm
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.macro KERNEL_S1X1
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fldmias XO , { s1 }
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fldmias AO1!, { s8 }
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vmla.f32 s2 , s1 , s8
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add XO, XO, INC_X
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.endm
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.macro SAVE_S1
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fldmias YO, { s4 }
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vmla.f32 s4, s0, s2
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fstmias YO, { s4 }
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add YO, YO, INC_Y
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.endm
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#endif
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/**************************************************************************************
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* End of macro definitions
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**************************************************************************************/
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PROLOGUE
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.align 5
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push {r4 - r9 , fp}
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add fp, sp, #28
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sub sp, sp, #STACKSIZE // reserve stack
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sub r12, fp, #192
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#if defined(DOUBLE)
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vstm r12, { d8 - d15 } // store floating point registers
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#else
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vstm r12, { s8 - s15 } // store floating point registers
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#endif
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cmp M, #0
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ble gemvt_kernel_L999
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cmp OLD_N, #0
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ble gemvt_kernel_L999
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str OLD_A, A
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str OLD_N, N
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ldr INC_X , OLD_INC_X
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ldr INC_Y , OLD_INC_Y
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cmp INC_X, #0
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beq gemvt_kernel_L999
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cmp INC_Y, #0
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beq gemvt_kernel_L999
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ldr LDA, OLD_LDA
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#if defined(DOUBLE)
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lsl LDA, LDA, #3 // LDA * SIZE
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#else
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lsl LDA, LDA, #2 // LDA * SIZE
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#endif
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cmp INC_X, #1
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bne gemvt_kernel_S2_BEGIN
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cmp INC_Y, #1
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bne gemvt_kernel_S2_BEGIN
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gemvt_kernel_F2_BEGIN:
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ldr YO , Y
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ldr J, N
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asrs J, J, #1 // J = N / 2
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ble gemvt_kernel_F1_BEGIN
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gemvt_kernel_F2X4:
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ldr AO1, A
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add AO2, AO1, LDA
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add r3 , AO2, LDA
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str r3 , A
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ldr XO , X
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INIT_F2
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asrs I, M, #2 // I = M / 4
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ble gemvt_kernel_F2X1
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gemvt_kernel_F2X4_10:
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KERNEL_F2X4
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subs I, I, #1
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bne gemvt_kernel_F2X4_10
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gemvt_kernel_F2X1:
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ands I, M , #3
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ble gemvt_kernel_F2_END
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gemvt_kernel_F2X1_10:
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KERNEL_F2X1
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subs I, I, #1
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bne gemvt_kernel_F2X1_10
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gemvt_kernel_F2_END:
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SAVE_F2
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|
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subs J , J , #1
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bne gemvt_kernel_F2X4
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|
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gemvt_kernel_F1_BEGIN:
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ldr J, N
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ands J, J, #1
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ble gemvt_kernel_L999
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|
|
|
gemvt_kernel_F1X4:
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|
|
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ldr AO1, A
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|
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|
ldr XO , X
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|
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INIT_F1
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|
|
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asrs I, M, #2 // I = M / 4
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|
ble gemvt_kernel_F1X1
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|
|
|
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gemvt_kernel_F1X4_10:
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|
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KERNEL_F1X4
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|
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subs I, I, #1
|
|
bne gemvt_kernel_F1X4_10
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|
|
|
|
|
gemvt_kernel_F1X1:
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|
|
|
ands I, M , #3
|
|
ble gemvt_kernel_F1_END
|
|
|
|
gemvt_kernel_F1X1_10:
|
|
|
|
KERNEL_F1X1
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|
|
|
subs I, I, #1
|
|
bne gemvt_kernel_F1X1_10
|
|
|
|
|
|
gemvt_kernel_F1_END:
|
|
|
|
SAVE_F1
|
|
|
|
b gemvt_kernel_L999
|
|
|
|
|
|
|
|
/*************************************************************************************************************/
|
|
|
|
gemvt_kernel_S2_BEGIN:
|
|
|
|
#if defined(DOUBLE)
|
|
lsl INC_X, INC_X, #3 // INC_X * SIZE
|
|
lsl INC_Y, INC_Y, #3 // INC_Y * SIZE
|
|
#else
|
|
lsl INC_X, INC_X, #2 // INC_X * SIZE
|
|
lsl INC_Y, INC_Y, #2 // INC_Y * SIZE
|
|
#endif
|
|
|
|
ldr YO , Y
|
|
|
|
ldr J, N
|
|
asrs J, J, #1 // J = N / 2
|
|
ble gemvt_kernel_S1_BEGIN
|
|
|
|
gemvt_kernel_S2X4:
|
|
|
|
ldr AO1, A
|
|
add AO2, AO1, LDA
|
|
add r3 , AO2, LDA
|
|
str r3 , A
|
|
|
|
ldr XO , X
|
|
|
|
INIT_S2
|
|
|
|
asrs I, M, #2 // I = M / 4
|
|
ble gemvt_kernel_S2X1
|
|
|
|
|
|
gemvt_kernel_S2X4_10:
|
|
|
|
KERNEL_S2X4
|
|
|
|
subs I, I, #1
|
|
bne gemvt_kernel_S2X4_10
|
|
|
|
|
|
gemvt_kernel_S2X1:
|
|
|
|
ands I, M , #3
|
|
ble gemvt_kernel_S2_END
|
|
|
|
gemvt_kernel_S2X1_10:
|
|
|
|
KERNEL_S2X1
|
|
|
|
subs I, I, #1
|
|
bne gemvt_kernel_S2X1_10
|
|
|
|
|
|
gemvt_kernel_S2_END:
|
|
|
|
SAVE_S2
|
|
|
|
subs J , J , #1
|
|
bne gemvt_kernel_S2X4
|
|
|
|
|
|
gemvt_kernel_S1_BEGIN:
|
|
|
|
ldr J, N
|
|
ands J, J, #1
|
|
ble gemvt_kernel_L999
|
|
|
|
gemvt_kernel_S1X4:
|
|
|
|
ldr AO1, A
|
|
|
|
ldr XO , X
|
|
|
|
INIT_S1
|
|
|
|
asrs I, M, #2 // I = M / 4
|
|
ble gemvt_kernel_S1X1
|
|
|
|
|
|
gemvt_kernel_S1X4_10:
|
|
|
|
KERNEL_S1X4
|
|
|
|
subs I, I, #1
|
|
bne gemvt_kernel_S1X4_10
|
|
|
|
|
|
gemvt_kernel_S1X1:
|
|
|
|
ands I, M , #3
|
|
ble gemvt_kernel_S1_END
|
|
|
|
gemvt_kernel_S1X1_10:
|
|
|
|
KERNEL_S1X1
|
|
|
|
subs I, I, #1
|
|
bne gemvt_kernel_S1X1_10
|
|
|
|
|
|
gemvt_kernel_S1_END:
|
|
|
|
SAVE_S1
|
|
|
|
|
|
|
|
/*************************************************************************************************************/
|
|
|
|
gemvt_kernel_L999:
|
|
|
|
sub r3, fp, #192
|
|
|
|
#if defined(DOUBLE)
|
|
vldm r3, { d8 - d15 } // restore floating point registers
|
|
#else
|
|
vldm r3, { s8 - s15 } // restore floating point registers
|
|
#endif
|
|
|
|
mov r0, #0 // set return value
|
|
|
|
sub sp, fp, #28
|
|
pop {r4 -r9 ,fp}
|
|
bx lr
|
|
|
|
EPILOGUE
|
|
|