539 lines
9.8 KiB
ArmAsm
539 lines
9.8 KiB
ArmAsm
/*********************************************************************/
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/* Copyright 2009, 2010 The University of Texas at Austin. */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or */
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/* without modification, are permitted provided that the following */
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/* conditions are met: */
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/* */
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/* 1. Redistributions of source code must retain the above */
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/* copyright notice, this list of conditions and the following */
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/* disclaimer. */
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/* */
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/* 2. Redistributions in binary form must reproduce the above */
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/* copyright notice, this list of conditions and the following */
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/* disclaimer in the documentation and/or other materials */
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/* provided with the distribution. */
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/* */
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/* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
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/* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
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/* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
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/* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
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/* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
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/* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
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/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
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/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
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/* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
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/* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
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/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
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/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
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/* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
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/* POSSIBILITY OF SUCH DAMAGE. */
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/* */
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/* The views and conclusions contained in the software and */
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/* documentation are those of the authors and should not be */
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/* interpreted as representing official policies, either expressed */
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/* or implied, of The University of Texas at Austin. */
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/*********************************************************************/
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#define ASSEMBLER
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#include "common.h"
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#define RET r3
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#define X r4
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#define INCX r5
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#define N r6
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#define NN r7
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#define XX r8
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#define PRE r9
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#define INC1 r10
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#define FZERO f1
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#define STACKSIZE 160
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PROLOGUE
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PROFCODE
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addi SP, SP, -STACKSIZE
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li r0, 0
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stfd f14, 0(SP)
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stfd f15, 8(SP)
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stfd f16, 16(SP)
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stfd f17, 24(SP)
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stfd f18, 32(SP)
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stfd f19, 40(SP)
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stfd f20, 48(SP)
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stfd f21, 56(SP)
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stfd f22, 64(SP)
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stfd f23, 72(SP)
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stfd f24, 80(SP)
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stfd f25, 88(SP)
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stfd f26, 96(SP)
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stfd f27, 104(SP)
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stfd f28, 112(SP)
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stfd f29, 120(SP)
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stfd f30, 128(SP)
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stfd f31, 136(SP)
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stw r0, 144(SP)
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lfs FZERO,144(SP)
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#ifdef F_INTERFACE
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LDINT N, 0(r3)
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LDINT INCX, 0(INCX)
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#else
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mr N, r3
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#endif
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li RET, 0
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slwi INCX, INCX, ZBASE_SHIFT
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sub X, X, INCX
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li INC1, SIZE
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li PRE, 3 * 16 * SIZE
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mr NN, N
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mr XX, X
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cmpwi cr0, N, 0
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ble- LL(9999)
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cmpwi cr0, INCX, 0
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ble- LL(9999)
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LFDUX f1, X, INCX
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LFDX f2, X, INC1
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fabs f1, f1
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fabs f2, f2
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fadd f1, f1, f2
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subi N, N, 1
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fmr f0, f1
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srawi. r0, N, 3
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fmr f2, f1
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mtspr CTR, r0
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fmr f3, f1
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beq- LL(150)
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LFDUX f24, X, INCX
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LFDX f25, X, INC1
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LFDUX f26, X, INCX
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LFDX f27, X, INC1
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LFDUX f28, X, INCX
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LFDX f29, X, INC1
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LFDUX f30, X, INCX
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LFDX f31, X, INC1
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fabs f8, f24
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fabs f9, f25
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fabs f10, f26
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fabs f11, f27
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fabs f12, f28
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fabs f13, f29
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fabs f14, f30
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fabs f15, f31
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LFDUX f24, X, INCX
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LFDX f25, X, INC1
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LFDUX f26, X, INCX
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LFDX f27, X, INC1
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LFDUX f28, X, INCX
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LFDX f29, X, INC1
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LFDUX f30, X, INCX
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LFDX f31, X, INC1
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bdz LL(120)
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.align 4
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LL(110):
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fadd f4, f8, f9
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#ifdef PPCG4
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dcbt X, PRE
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#endif
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fadd f5, f10, f11
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fadd f6, f12, f13
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fadd f7, f14, f15
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fabs f8, f24
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LFDUX f24, X, INCX
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fabs f9, f25
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LFDX f25, X, INC1
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fabs f10, f26
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LFDUX f26, X, INCX
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fabs f11, f27
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LFDX f27, X, INC1
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fabs f12, f28
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#if defined(PPCG4) && defined(DOUBLE)
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dcbt X, PRE
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#endif
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fabs f13, f29
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LFDUX f28, X, INCX
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fabs f14, f30
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LFDX f29, X, INC1
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fabs f15, f31
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LFDUX f30, X, INCX
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fsub f16, f0, f4
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LFDX f31, X, INC1
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fsub f17, f1, f5
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fsub f18, f2, f6
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fsub f19, f3, f7
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fadd f20, f8, f9
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#ifdef PPCG4
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dcbt X, PRE
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#endif
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fadd f21, f10, f11
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fadd f22, f12, f13
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fadd f23, f14, f15
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fabs f8, f24
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LFDUX f24, X, INCX
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fabs f9, f25
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LFDX f25, X, INC1
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fabs f10, f26
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LFDUX f26, X, INCX
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fabs f11, f27
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LFDX f27, X, INC1
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fsel f0, f16, f4, f0
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#if defined(PPCG4) && defined(DOUBLE)
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dcbt X, PRE
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#endif
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fsel f1, f17, f5, f1
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fsel f2, f18, f6, f2
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fsel f3, f19, f7, f3
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fabs f12, f28
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LFDUX f28, X, INCX
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fabs f13, f29
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LFDX f29, X, INC1
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fabs f14, f30
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LFDUX f30, X, INCX
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fabs f15, f31
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LFDX f31, X, INC1
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fsub f16, f0, f20
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fsub f17, f1, f21
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fsub f18, f2, f22
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fsub f19, f3, f23
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fsel f0, f16, f20, f0
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fsel f1, f17, f21, f1
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fsel f2, f18, f22, f2
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fsel f3, f19, f23, f3
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bdnz LL(110)
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.align 4
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LL(120):
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fadd f4, f8, f9
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fadd f5, f10, f11
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fadd f6, f12, f13
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fadd f7, f14, f15
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fabs f8, f24
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fabs f9, f25
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fabs f10, f26
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fabs f11, f27
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fabs f12, f28
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fabs f13, f29
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fabs f14, f30
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fabs f15, f31
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fsub f16, f0, f4
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fsub f17, f1, f5
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fsub f18, f2, f6
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fsub f19, f3, f7
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fadd f20, f8, f9
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fadd f21, f10, f11
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fadd f22, f12, f13
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fadd f23, f14, f15
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fsel f0, f16, f4, f0
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fsel f1, f17, f5, f1
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fsel f2, f18, f6, f2
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fsel f3, f19, f7, f3
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fsub f16, f0, f20
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fsub f17, f1, f21
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fsub f18, f2, f22
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fsub f19, f3, f23
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fsel f0, f16, f20, f0
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fsel f1, f17, f21, f1
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fsel f2, f18, f22, f2
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fsel f3, f19, f23, f3
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.align 4
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LL(150):
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andi. r0, N, 7
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mtspr CTR, r0
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beq LL(999)
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.align 4
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LL(160):
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LFDUX f8, X, INCX
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LFDX f9, X, INC1
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fabs f8, f8
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fabs f9, f9
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fadd f8, f8, f9
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fsub f16, f1, f8
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fsel f1, f16, f8, f1
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bdnz LL(160)
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.align 4
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LL(999):
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fsub f8, f0, f1
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fsub f9, f2, f3
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fsel f0, f8, f1, f0
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fsel f2, f9, f3, f2
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fsub f8, f0, f2
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fsel f1, f8, f2, f0
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.align 4
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LL(1000):
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srawi. r0, NN, 3
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mtspr CTR, r0
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beq- LL(1150)
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LFDUX f24, XX, INCX
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LFDX f25, XX, INC1
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LFDUX f26, XX, INCX
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LFDX f27, XX, INC1
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LFDUX f28, XX, INCX
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LFDX f29, XX, INC1
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LFDUX f30, XX, INCX
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LFDX f31, XX, INC1
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bdz LL(1120)
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.align 4
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LL(1110):
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fabs f8, f24
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LFDUX f24, XX, INCX
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fabs f9, f25
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LFDX f25, XX, INC1
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fabs f10, f26
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LFDUX f26, XX, INCX
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fabs f11, f27
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LFDX f27, XX, INC1
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#ifdef PPCG4
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dcbt XX, PRE
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#endif
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fabs f12, f28
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LFDUX f28, XX, INCX
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fabs f13, f29
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LFDX f29, XX, INC1
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fabs f14, f30
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LFDUX f30, XX, INCX
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fabs f15, f31
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LFDX f31, XX, INC1
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fadd f4, f8, f9
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#if defined(PPCG4) && defined(DOUBLE)
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dcbt X, PRE
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#endif
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fadd f5, f10, f11
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fadd f6, f12, f13
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fadd f7, f14, f15
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addi RET, RET, 1
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fcmpu cr0, f1, f4
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f5
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f6
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f7
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beq cr0, LL(9999)
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fabs f8, f24
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LFDUX f24, XX, INCX
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fabs f9, f25
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LFDX f25, XX, INC1
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fabs f10, f26
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LFDUX f26, XX, INCX
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fabs f11, f27
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LFDX f27, XX, INC1
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#ifdef PPCG4
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dcbt XX, PRE
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#endif
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fabs f12, f28
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LFDUX f28, XX, INCX
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fabs f13, f29
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LFDX f29, XX, INC1
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fabs f14, f30
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LFDUX f30, XX, INCX
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fabs f15, f31
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LFDX f31, XX, INC1
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fadd f4, f8, f9
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#if defined(PPCG4) && defined(DOUBLE)
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dcbt X, PRE
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#endif
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fadd f5, f10, f11
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fadd f6, f12, f13
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fadd f7, f14, f15
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addi RET, RET, 1
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fcmpu cr0, f1, f4
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f5
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f6
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f7
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beq cr0, LL(9999)
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bdnz LL(1110)
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.align 4
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LL(1120):
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fabs f8, f24
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LFDUX f24, XX, INCX
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fabs f9, f25
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LFDX f25, XX, INC1
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fabs f10, f26
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LFDUX f26, XX, INCX
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fabs f11, f27
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LFDX f27, XX, INC1
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fabs f12, f28
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LFDUX f28, XX, INCX
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fabs f13, f29
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LFDX f29, XX, INC1
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fabs f14, f30
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LFDUX f30, XX, INCX
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fabs f15, f31
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LFDX f31, XX, INC1
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fadd f4, f8, f9
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fadd f5, f10, f11
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fadd f6, f12, f13
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fadd f7, f14, f15
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addi RET, RET, 1
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fcmpu cr0, f1, f4
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f5
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f6
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f7
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beq cr0, LL(9999)
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fabs f8, f24
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fabs f9, f25
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fabs f10, f26
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fabs f11, f27
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fabs f12, f28
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fabs f13, f29
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fabs f14, f30
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fabs f15, f31
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fadd f4, f8, f9
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fadd f5, f10, f11
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fadd f6, f12, f13
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fadd f7, f14, f15
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addi RET, RET, 1
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fcmpu cr0, f1, f4
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f5
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f6
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beq cr0, LL(9999)
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addi RET, RET, 1
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fcmpu cr0, f1, f7
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beq cr0, LL(9999)
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.align 4
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LL(1150):
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andi. r0, NN, 7
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mtspr CTR, r0
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beq LL(9999)
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.align 4
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LL(1160):
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LFDUX f8, XX, INCX
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LFDX f9, XX, INC1
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fabs f8, f8
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fabs f9, f9
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fadd f8, f8, f9
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addi RET, RET, 1
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fcmpu cr0, f1, f8
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beq cr0, LL(9999)
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bdnz LL(1160)
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.align 4
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LL(9999):
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lfd f14, 0(SP)
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lfd f15, 8(SP)
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lfd f16, 16(SP)
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lfd f17, 24(SP)
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lfd f18, 32(SP)
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lfd f19, 40(SP)
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lfd f20, 48(SP)
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lfd f21, 56(SP)
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lfd f22, 64(SP)
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lfd f23, 72(SP)
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lfd f24, 80(SP)
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lfd f25, 88(SP)
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lfd f26, 96(SP)
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lfd f27, 104(SP)
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lfd f28, 112(SP)
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lfd f29, 120(SP)
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lfd f30, 128(SP)
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lfd f31, 136(SP)
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addi SP, SP, STACKSIZE
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blr
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EPILOGUE
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