520 lines
13 KiB
ArmAsm
520 lines
13 KiB
ArmAsm
/***************************************************************************
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Copyright (c) 2013, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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3. Neither the name of the OpenBLAS project nor the names of
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its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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/**************************************************************************************
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* 2013/11/16 Saar
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* BLASTEST : OK
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* CTEST : OK
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* TEST : OK
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*
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**************************************************************************************/
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#define ASSEMBLER
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#include "common.h"
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#define STACKSIZE 256
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#define N r0
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#define X r1
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#define INC_X r2
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#define I r12
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#define X_PRE 512
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/**************************************************************************************
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* Macro definitions
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**************************************************************************************/
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#if !defined(COMPLEX)
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#if defined(DOUBLE)
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.macro KERNEL_F1
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vldmia.f64 X!, { d4 }
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vcmpe.f64 d4, d6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq 1f /* KERNEL_F1_NEXT_\@ */
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vabs.f64 d4, d4
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vcmpe.f64 d0, d4 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f64 d2 , d4, d0 // scale >= x ? x / scale
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vmlage.f64 d1 , d2 , d2 // ssq += ( x/scale ) * ( x/scale )
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bge 1f /* KERNEL_F1_NEXT_\@ */
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vdiv.f64 d2 , d0, d4 // scale / x
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vmul.f64 d2 , d2, d2 // ( scale / x ) * ( scale / x )
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vmul.f64 d3 , d1, d2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f64 d1 , d3, d7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f64 d0 , d4 // scale = x
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1: /* KERNEL_F1_NEXT_\@: */
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.endm
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.macro KERNEL_F8
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pld [ X, #X_PRE ]
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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pld [ X, #X_PRE ]
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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.endm
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.macro KERNEL_S1
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vldmia.f64 X, { d4 }
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vcmpe.f64 d4, d6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq KERNEL_S1_NEXT
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vabs.f64 d4, d4
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vcmpe.f64 d0, d4 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f64 d2 , d4, d0 // scale >= x ? x / scale
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vmlage.f64 d1 , d2 , d2 // ssq += ( x/scale ) * ( x/scale )
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bge KERNEL_S1_NEXT
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vdiv.f64 d2 , d0, d4 // scale / x
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vmul.f64 d2 , d2, d2 // ( scale / x ) * ( scale / x )
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vmul.f64 d3 , d1, d2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f64 d1 , d3, d7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f64 d0 , d4 // scale = x
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KERNEL_S1_NEXT:
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add X, X, INC_X
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.endm
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#else
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.macro KERNEL_F1
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vldmia.f32 X!, { s4 }
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vcmpe.f32 s4, s6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq 1f /* KERNEL_F1_NEXT_\@ */
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vabs.f32 s4, s4
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vcmpe.f32 s0, s4 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f32 s2 , s4, s0 // scale >= x ? x / scale
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vmlage.f32 s1 , s2 , s2 // ssq += ( x/scale ) * ( x/scale )
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bge 1f /* KERNEL_F1_NEXT_\@ */
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vdiv.f32 s2 , s0, s4 // scale / x
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vmul.f32 s2 , s2, s2 // ( scale / x ) * ( scale / x )
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vmul.f32 s3 , s1, s2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f32 s1 , s3, s7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f32 s0 , s4 // scale = x
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1: /* KERNEL_F1_NEXT_\@: */
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.endm
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.macro KERNEL_F8
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pld [ X, #X_PRE ]
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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.endm
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.macro KERNEL_S1
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vldmia.f32 X, { s4 }
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vcmpe.f32 s4, s6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq KERNEL_S1_NEXT
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vabs.f32 s4, s4
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vcmpe.f32 s0, s4 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f32 s2 , s4, s0 // scale >= x ? x / scale
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vmlage.f32 s1 , s2 , s2 // ssq += ( x/scale ) * ( x/scale )
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bge KERNEL_S1_NEXT
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vdiv.f32 s2 , s0, s4 // scale / x
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vmul.f32 s2 , s2, s2 // ( scale / x ) * ( scale / x )
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vmul.f32 s3 , s1, s2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f32 s1 , s3, s7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f32 s0 , s4 // scale = x
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KERNEL_S1_NEXT:
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add X, X, INC_X
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.endm
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#endif
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#else
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#if defined(DOUBLE)
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.macro KERNEL_F1
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vldmia.f64 X!, { d4 - d5 }
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vcmpe.f64 d4, d6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq 1f /* KERNEL_F1_NEXT_\@ */
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vabs.f64 d4, d4
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vcmpe.f64 d0, d4 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f64 d2 , d4, d0 // scale >= x ? x / scale
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vmlage.f64 d1 , d2 , d2 // ssq += ( x/scale ) * ( x/scale )
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bge 1f /* KERNEL_F1_NEXT_\@ */
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vdiv.f64 d2 , d0, d4 // scale / x
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vmul.f64 d2 , d2, d2 // ( scale / x ) * ( scale / x )
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vmul.f64 d3 , d1, d2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f64 d1 , d3, d7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f64 d0 , d4 // scale = x
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1: /* KERNEL_F1_NEXT_\@: */
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vcmpe.f64 d5, d6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq 2f /* KERNEL_F1_END_\@ */
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vabs.f64 d5, d5
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vcmpe.f64 d0, d5 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f64 d2 , d5, d0 // scale >= x ? x / scale
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vmlage.f64 d1 , d2 , d2 // ssq += ( x/scale ) * ( x/scale )
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bge 2f /* KERNEL_F1_END_\@ */
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vdiv.f64 d2 , d0, d5 // scale / x
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vmul.f64 d2 , d2, d2 // ( scale / x ) * ( scale / x )
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vmul.f64 d3 , d1, d2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f64 d1 , d3, d7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f64 d0 , d5 // scale = x
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2: /* KERNEL_F1_END_\@: */
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.endm
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.macro KERNEL_F8
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pld [ X, #X_PRE ]
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KERNEL_F1
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KERNEL_F1
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pld [ X, #X_PRE ]
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KERNEL_F1
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KERNEL_F1
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pld [ X, #X_PRE ]
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KERNEL_F1
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KERNEL_F1
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pld [ X, #X_PRE ]
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KERNEL_F1
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KERNEL_F1
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.endm
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.macro KERNEL_S1
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vldmia.f64 X, { d4 - d5 }
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vcmpe.f64 d4, d6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq 1f /* KERNEL_S1_NEXT_\@ */
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vabs.f64 d4, d4
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vcmpe.f64 d0, d4 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f64 d2 , d4, d0 // scale >= x ? x / scale
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vmlage.f64 d1 , d2 , d2 // ssq += ( x/scale ) * ( x/scale )
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bge 1f /* KERNEL_S1_NEXT_\@ */
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vdiv.f64 d2 , d0, d4 // scale / x
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vmul.f64 d2 , d2, d2 // ( scale / x ) * ( scale / x )
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vmul.f64 d3 , d1, d2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f64 d1 , d3, d7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f64 d0 , d4 // scale = x
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1: /* KERNEL_S1_NEXT_\@: */
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vcmpe.f64 d5, d6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq 2f /* KERNEL_S1_END_\@ */
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vabs.f64 d5, d5
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vcmpe.f64 d0, d5 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f64 d2 , d5, d0 // scale >= x ? x / scale
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vmlage.f64 d1 , d2 , d2 // ssq += ( x/scale ) * ( x/scale )
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bge 2f /* KERNEL_S1_END_\@ */
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vdiv.f64 d2 , d0, d5 // scale / x
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vmul.f64 d2 , d2, d2 // ( scale / x ) * ( scale / x )
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vmul.f64 d3 , d1, d2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f64 d1 , d3, d7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f64 d0 , d5 // scale = x
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2: /* KERNEL_S1_END_\@: */
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add X, X, INC_X
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.endm
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#else
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.macro KERNEL_F1
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vldmia.f32 X!, { s4 - s5 }
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vcmpe.f32 s4, s6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq 1f /* KERNEL_F1_NEXT_\@ */
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vabs.f32 s4, s4
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vcmpe.f32 s0, s4 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f32 s2 , s4, s0 // scale >= x ? x / scale
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vmlage.f32 s1 , s2 , s2 // ssq += ( x/scale ) * ( x/scale )
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bge 1f /* KERNEL_F1_NEXT_\@ */
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vdiv.f32 s2 , s0, s4 // scale / x
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vmul.f32 s2 , s2, s2 // ( scale / x ) * ( scale / x )
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vmul.f32 s3 , s1, s2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f32 s1 , s3, s7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f32 s0 , s4 // scale = x
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1: /* KERNEL_F1_NEXT_\@: */
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vcmpe.f32 s5, s6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq 2f /* KERNEL_F1_END_\@ */
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vabs.f32 s5, s5
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vcmpe.f32 s0, s5 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f32 s2 , s5, s0 // scale >= x ? x / scale
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vmlage.f32 s1 , s2 , s2 // ssq += ( x/scale ) * ( x/scale )
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bge 2f /* KERNEL_F1_END_\@ */
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vdiv.f32 s2 , s0, s5 // scale / x
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vmul.f32 s2 , s2, s2 // ( scale / x ) * ( scale / x )
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vmul.f32 s3 , s1, s2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f32 s1 , s3, s7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f32 s0 , s5 // scale = x
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2: /* KERNEL_F1_END_\@: */
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.endm
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.macro KERNEL_F8
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pld [ X, #X_PRE ]
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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pld [ X, #X_PRE ]
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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KERNEL_F1
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.endm
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.macro KERNEL_S1
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vldmia.f32 X, { s4 - s5 }
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vcmpe.f32 s4, s6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq 1f /* KERNEL_S1_NEXT_\@ */
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vabs.f32 s4, s4
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vcmpe.f32 s0, s4 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f32 s2 , s4, s0 // scale >= x ? x / scale
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vmlage.f32 s1 , s2 , s2 // ssq += ( x/scale ) * ( x/scale )
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bge 1f /* KERNEL_S1_NEXT_\@ */
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vdiv.f32 s2 , s0, s4 // scale / x
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vmul.f32 s2 , s2, s2 // ( scale / x ) * ( scale / x )
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vmul.f32 s3 , s1, s2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f32 s1 , s3, s7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f32 s0 , s4 // scale = x
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1: /* KERNEL_S1_NEXT_\@: */
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vcmpe.f32 s5, s6 // compare with 0.0
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vmrs APSR_nzcv, fpscr
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beq 2f /* KERNEL_S1_END_\@ */
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vabs.f32 s5, s5
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vcmpe.f32 s0, s5 // compare with scale
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vmrs APSR_nzcv, fpscr
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vdivge.f32 s2 , s5, s0 // scale >= x ? x / scale
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vmlage.f32 s1 , s2 , s2 // ssq += ( x/scale ) * ( x/scale )
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bge 2f /* KERNEL_S1_END_\@ */
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vdiv.f32 s2 , s0, s5 // scale / x
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vmul.f32 s2 , s2, s2 // ( scale / x ) * ( scale / x )
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vmul.f32 s3 , s1, s2 // ssq * ( scale / x ) * ( scale / x )
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vadd.f32 s1 , s3, s7 // ssq = 1 + ssq * ( scale / x ) * ( scale / x )
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vmov.f32 s0 , s5 // scale = x
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2: /* KERNEL_S1_END_\@: */
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add X, X, INC_X
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.endm
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#endif
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#endif
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/**************************************************************************************
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* End of macro definitions
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**************************************************************************************/
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PROLOGUE
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.align 5
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#if defined(DOUBLE)
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movs r12 , #0
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vmov.f32 s0 , r12 // scale=0.0
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vcvt.f64.f32 d0, s0
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vmov.f64 d1 , #1.0 // ssq=1.0
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vmov.f64 d7 , d1 // value 1.0
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vmov.f64 d6 , d0 // value 0.0
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#else
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movs r12 , #0
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vmov.f32 s0 , r12 // scale=0.0
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vmov.f32 s1 , #1.0 // ssq=1.0
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vmov.f32 s7 , s1 // value 1.0
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vmov.f32 s6 , s0 // value 0.0
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#endif
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cmp N, #0
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ble nrm2_kernel_L999
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cmp INC_X, #0
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beq nrm2_kernel_L999
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cmp INC_X, #1
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bne nrm2_kernel_S_BEGIN
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nrm2_kernel_F_BEGIN:
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asrs I, N, #3 // I = N / 8
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ble nrm2_kernel_F1
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nrm2_kernel_F8:
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KERNEL_F8
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subs I, I, #1
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bne nrm2_kernel_F8
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nrm2_kernel_F1:
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ands I, N, #7
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ble nrm2_kernel_L999
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nrm2_kernel_F10:
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KERNEL_F1
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subs I, I, #1
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bne nrm2_kernel_F10
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b nrm2_kernel_L999
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nrm2_kernel_S_BEGIN:
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#if defined(COMPLEX)
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#if defined(DOUBLE)
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lsl INC_X, INC_X, #4 // INC_X * SIZE * 2
|
|
#else
|
|
lsl INC_X, INC_X, #3 // INC_X * SIZE * 2
|
|
#endif
|
|
|
|
#else
|
|
|
|
#if defined(DOUBLE)
|
|
lsl INC_X, INC_X, #3 // INC_X * SIZE
|
|
#else
|
|
lsl INC_X, INC_X, #2 // INC_X * SIZE
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
nrm2_kernel_S1:
|
|
|
|
mov I, N
|
|
|
|
.align 5
|
|
|
|
nrm2_kernel_S10:
|
|
|
|
KERNEL_S1
|
|
|
|
subs I, I, #1
|
|
bne nrm2_kernel_S10
|
|
|
|
|
|
nrm2_kernel_L999:
|
|
|
|
#if defined(DOUBLE)
|
|
vsqrt.f64 d1, d1
|
|
vmul.f64 d0, d0, d1
|
|
#else
|
|
vsqrt.f32 s1, s1
|
|
vmul.f32 s0, s0, s1
|
|
#endif
|
|
|
|
#if !defined(__ARM_PCS_VFP)
|
|
#if defined(DOUBLE)
|
|
vmov r0, r1, d0
|
|
#else
|
|
vmov r0, s0
|
|
#endif
|
|
#endif
|
|
|
|
bx lr
|
|
|
|
EPILOGUE
|
|
|