656 lines
14 KiB
ArmAsm
656 lines
14 KiB
ArmAsm
/***************************************************************************
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Copyright (c) 2013-2016, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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3. Neither the name of the OpenBLAS project nor the names of
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its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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/**************************************************************************************
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* 2016/04/21 Werner Saar (wernsaar@googlemail.com)
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* BLASTEST : OK
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* CTEST : OK
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* TEST : OK
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* LAPACK-TEST : OK
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**************************************************************************************/
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/**********************************************************************************************
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* Macros for N=4 and M=16
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**********************************************************************************************/
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#if defined(_AIX)
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define(`COPY_4x16', `
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#else
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.macro COPY_4x16
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#endif
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lxvpx vs32, o0, A0
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lxvpx vs34, o32, A0
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addi A0, A0, 64
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lxvpx vs40, o0, A1
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lxvpx vs42, o32, A1
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addi A1, A1, 64
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lxvpx vs48, o0, A2
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lxvpx vs50, o32, A2
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addi A2, A2, 64
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lxvpx vs4, o0, A3
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lxvpx vs6, o32, A3
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addi A3, A3, 64
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lxvpx vs36, o0, A0
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lxvpx vs38, o32, A0
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addi A0, A0, 64
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lxvpx vs44, o0, A1
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lxvpx vs46, o32, A1
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addi A1, A1, 64
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lxvpx vs12, o0, A2
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lxvpx vs2, o32, A2
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addi A2, A2, 64
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lxvpx vs8, o0, A3
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lxvpx vs10, o32, A3
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addi A3, A3, 64
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mr T1, BO
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs32, o0, T1
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stxvd2x vs33, o16, T1
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stxvd2x vs34, o32, T1
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stxvd2x vs35, o48, T1
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#else
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stxvd2x vs33, o0, T1
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stxvd2x vs32, o16, T1
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stxvd2x vs35, o32, T1
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stxvd2x vs34, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs36, o0, T1
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stxvd2x vs37, o16, T1
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stxvd2x vs38, o32, T1
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stxvd2x vs39, o48, T1
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#else
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stxvd2x vs37, o0, T1
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stxvd2x vs36, o16, T1
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stxvd2x vs39, o32, T1
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stxvd2x vs38, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs40, o0, T1
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stxvd2x vs41, o16, T1
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stxvd2x vs42, o32, T1
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stxvd2x vs43, o48, T1
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#else
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stxvd2x vs41, o0, T1
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stxvd2x vs40, o16, T1
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stxvd2x vs43, o32, T1
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stxvd2x vs42, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs44, o0, T1
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stxvd2x vs45, o16, T1
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stxvd2x vs46, o32, T1
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stxvd2x vs47, o48, T1
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#else
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stxvd2x vs45, o0, T1
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stxvd2x vs44, o16, T1
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stxvd2x vs47, o32, T1
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stxvd2x vs46, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs48, o0, T1
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stxvd2x vs49, o16, T1
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stxvd2x vs50, o32, T1
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stxvd2x vs51, o48, T1
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#else
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stxvd2x vs49, o0, T1
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stxvd2x vs48, o16, T1
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stxvd2x vs51, o32, T1
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stxvd2x vs50, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs12, o0, T1
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stxvd2x vs13, o16, T1
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stxvd2x vs2, o32, T1
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stxvd2x vs3, o48, T1
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#else
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stxvd2x vs13, o0, T1
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stxvd2x vs12, o16, T1
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stxvd2x vs3, o32, T1
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stxvd2x vs2, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs4, o0, T1
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stxvd2x vs5, o16, T1
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stxvd2x vs6, o32, T1
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stxvd2x vs7, o48, T1
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#else
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stxvd2x vs5, o0, T1
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stxvd2x vs4, o16, T1
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stxvd2x vs7, o32, T1
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stxvd2x vs6, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs8, o0, T1
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stxvd2x vs9, o16, T1
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stxvd2x vs10, o32, T1
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stxvd2x vs11, o48, T1
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#else
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stxvd2x vs9, o0, T1
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stxvd2x vs8, o16, T1
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stxvd2x vs11, o32, T1
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stxvd2x vs10, o48, T1
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#endif
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#if defined(_AIX)
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')
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#else
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.endm
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#endif
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/**********************************************************************************************
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* Macros for N=4 and M=8
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**********************************************************************************************/
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#if defined(_AIX)
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define(`COPY_4x8', `
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#else
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.macro COPY_4x8
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#endif
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lxvpx vs32, o0, A0
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lxvpx vs34, o32, A0
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addi A0, A0, 64
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lxvpx vs36, o0, A1
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lxvpx vs38, o32, A1
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addi A1, A1, 64
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lxvpx vs40, o0, A2
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lxvpx vs42, o32, A2
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addi A2, A2, 64
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lxvpx vs44, o0, A3
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lxvpx vs46, o32, A3
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addi A3, A3, 64
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mr T1, BO
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs32, o0, T1
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stxvd2x vs33, o16, T1
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stxvd2x vs34, o32, T1
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stxvd2x vs35, o48, T1
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#else
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stxvd2x vs33, o0, T1
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stxvd2x vs32, o16, T1
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stxvd2x vs35, o32, T1
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stxvd2x vs34, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs36, o0, T1
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stxvd2x vs37, o16, T1
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stxvd2x vs38, o32, T1
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stxvd2x vs39, o48, T1
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#else
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stxvd2x vs37, o0, T1
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stxvd2x vs36, o16, T1
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stxvd2x vs39, o32, T1
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stxvd2x vs38, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs40, o0, T1
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stxvd2x vs41, o16, T1
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stxvd2x vs42, o32, T1
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stxvd2x vs43, o48, T1
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#else
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stxvd2x vs41, o0, T1
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stxvd2x vs40, o16, T1
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stxvd2x vs43, o32, T1
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stxvd2x vs42, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs44, o0, T1
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stxvd2x vs45, o16, T1
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stxvd2x vs46, o32, T1
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stxvd2x vs47, o48, T1
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#else
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stxvd2x vs45, o0, T1
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stxvd2x vs44, o16, T1
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stxvd2x vs47, o32, T1
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stxvd2x vs46, o48, T1
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#endif
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#if defined(_AIX)
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')
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#else
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.endm
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#endif
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/**********************************************************************************************
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* Macros for N=4 and M=4
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**********************************************************************************************/
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#if defined(_AIX)
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define(`COPY_4x4', `
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#else
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.macro COPY_4x4
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#endif
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lxvpx vs32, o0, A0
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addi A0, A0, 32
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lxvpx vs34, o0, A1
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addi A1, A1, 32
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lxvpx vs36, o0, A2
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addi A2, A2, 32
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lxvpx vs38, o0, A3
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addi A3, A3, 32
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mr T1, BO
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs32, o0, T1
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stxvd2x vs33, o16, T1
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stxvd2x vs34, o32, T1
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stxvd2x vs35, o48, T1
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#else
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stxvd2x vs33, o0, T1
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stxvd2x vs32, o16, T1
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stxvd2x vs35, o32, T1
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stxvd2x vs34, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs36, o0, T1
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stxvd2x vs37, o16, T1
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stxvd2x vs38, o32, T1
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stxvd2x vs39, o48, T1
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#else
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stxvd2x vs37, o0, T1
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stxvd2x vs36, o16, T1
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stxvd2x vs39, o32, T1
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stxvd2x vs38, o48, T1
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#endif
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#if defined(_AIX)
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')
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#else
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.endm
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#endif
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/**********************************************************************************************
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* Macros for N=2 and M=16
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**********************************************************************************************/
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#if defined(_AIX)
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define(`COPY_2x16', `
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#else
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.macro COPY_2x16
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#endif
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lxvpx vs32, o0, A0
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lxvpx vs34, o32, A0
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addi A0, A0, 64
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lxvpx vs36, o0, A0
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lxvpx vs38, o32, A0
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addi A0, A0, 64
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lxvpx vs40, o0, A1
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lxvpx vs42, o32, A1
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addi A1, A1, 64
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lxvpx vs44, o0, A1
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lxvpx vs46, o32, A1
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addi A1, A1, 64
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mr T1, BO
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs32, o0, T1
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stxvd2x vs33, o16, T1
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stxvd2x vs34, o32, T1
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stxvd2x vs35, o48, T1
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#else
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stxvd2x vs33, o0, T1
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stxvd2x vs32, o16, T1
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stxvd2x vs35, o32, T1
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stxvd2x vs34, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs36, o0, T1
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stxvd2x vs37, o16, T1
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stxvd2x vs38, o32, T1
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stxvd2x vs39, o48, T1
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#else
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stxvd2x vs37, o0, T1
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stxvd2x vs36, o16, T1
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stxvd2x vs39, o32, T1
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stxvd2x vs38, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs40, o0, T1
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stxvd2x vs41, o16, T1
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stxvd2x vs42, o32, T1
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stxvd2x vs43, o48, T1
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#else
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stxvd2x vs41, o0, T1
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stxvd2x vs40, o16, T1
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stxvd2x vs43, o32, T1
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stxvd2x vs42, o48, T1
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#endif
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addi T1, T1, 64
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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stxvd2x vs44, o0, T1
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stxvd2x vs45, o16, T1
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stxvd2x vs46, o32, T1
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stxvd2x vs47, o48, T1
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#else
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stxvd2x vs45, o0, T1
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stxvd2x vs44, o16, T1
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stxvd2x vs47, o32, T1
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stxvd2x vs46, o48, T1
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#endif
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#if defined(_AIX)
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')
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#else
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.endm
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#endif
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/**********************************************************************************************
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* Macros for N=2 and M=8
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**********************************************************************************************/
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#if defined(_AIX)
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define(`COPY_2x8', `
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#else
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.macro COPY_2x8
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#endif
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lxvpx vs32, o0, A0
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lxvpx vs34, o32, A0
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addi A0, A0, 64
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|
|
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lxvpx vs36, o0, A1
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lxvpx vs38, o0, A1
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addi A1, A1, 64
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|
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mr T1, BO
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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|
stxvd2x vs32, o0, T1
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stxvd2x vs33, o16, T1
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stxvd2x vs34, o32, T1
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stxvd2x vs35, o48, T1
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#else
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stxvd2x vs33, o0, T1
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stxvd2x vs32, o16, T1
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stxvd2x vs35, o32, T1
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stxvd2x vs34, o48, T1
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#endif
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addi T1, T1, 64
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|
|
#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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|
stxvd2x vs36, o0, T1
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|
stxvd2x vs37, o16, T1
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stxvd2x vs38, o32, T1
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stxvd2x vs39, o48, T1
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#else
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stxvd2x vs37, o0, T1
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stxvd2x vs36, o16, T1
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stxvd2x vs39, o32, T1
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stxvd2x vs38, o48, T1
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#endif
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#if defined(_AIX)
|
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')
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#else
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.endm
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#endif
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/**********************************************************************************************
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* Macros for N=2 and M=4
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**********************************************************************************************/
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#if defined(_AIX)
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define(`COPY_2x4', `
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#else
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.macro COPY_2x4
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|
#endif
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lxvpx vs32, o0, A0
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addi A0, A0, 32
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lxvpx vs34, o0, A1
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addi A1, A1, 32
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|
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mr T1, BO
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|
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#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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|
stxvd2x vs32, o0, T1
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|
stxvd2x vs33, o16, T1
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|
|
stxvd2x vs34, o32, T1
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|
stxvd2x vs35, o48, T1
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|
#else
|
|
stxvd2x vs33, o0, T1
|
|
stxvd2x vs32, o16, T1
|
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|
|
stxvd2x vs35, o32, T1
|
|
stxvd2x vs34, o48, T1
|
|
#endif
|
|
|
|
#if defined(_AIX)
|
|
')
|
|
#else
|
|
.endm
|
|
#endif
|
|
|
|
|
|
/**********************************************************************************************
|
|
* Macros for N=1 and M=16
|
|
**********************************************************************************************/
|
|
|
|
#if defined(_AIX)
|
|
define(`COPY_1x16', `
|
|
#else
|
|
.macro COPY_1x16
|
|
#endif
|
|
|
|
lxvpx vs32, o0, A0
|
|
lxvpx vs34, o32, A0
|
|
addi A0, A0, 64
|
|
|
|
lxvpx vs36, o0, A0
|
|
lxvpx vs38, o0, A0
|
|
addi A0, A0, 64
|
|
|
|
|
|
mr T1, BO
|
|
|
|
#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
|
|
stxvd2x vs32, o0, T1
|
|
stxvd2x vs33, o16, T1
|
|
stxvd2x vs34, o32, T1
|
|
stxvd2x vs35, o48, T1
|
|
#else
|
|
stxvd2x vs33, o0, T1
|
|
stxvd2x vs32, o16, T1
|
|
stxvd2x vs35, o32, T1
|
|
stxvd2x vs34, o48, T1
|
|
#endif
|
|
addi T1, T1, 64
|
|
|
|
#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
|
|
stxvd2x vs36, o0, T1
|
|
stxvd2x vs37, o16, T1
|
|
stxvd2x vs38, o32, T1
|
|
stxvd2x vs39, o48, T1
|
|
#else
|
|
stxvd2x vs37, o0, T1
|
|
stxvd2x vs36, o16, T1
|
|
stxvd2x vs39, o32, T1
|
|
stxvd2x vs38, o48, T1
|
|
#endif
|
|
|
|
#if defined(_AIX)
|
|
')
|
|
#else
|
|
.endm
|
|
#endif
|
|
|
|
|
|
/**********************************************************************************************
|
|
* Macros for N=1 and M=8
|
|
**********************************************************************************************/
|
|
|
|
#if defined(_AIX)
|
|
define(`COPY_1x8', `
|
|
#else
|
|
.macro COPY_1x8
|
|
#endif
|
|
|
|
lxvpx vs32, o0, A0
|
|
lxvpx vs34, o32, A0
|
|
addi A0, A0, 64
|
|
|
|
|
|
mr T1, BO
|
|
|
|
#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
|
|
stxvd2x vs32, o0, T1
|
|
stxvd2x vs33, o16, T1
|
|
stxvd2x vs34, o32, T1
|
|
stxvd2x vs35, o48, T1
|
|
#else
|
|
stxvd2x vs33, o0, T1
|
|
stxvd2x vs32, o16, T1
|
|
stxvd2x vs35, o32, T1
|
|
stxvd2x vs34, o48, T1
|
|
#endif
|
|
|
|
#if defined(_AIX)
|
|
')
|
|
#else
|
|
.endm
|
|
#endif
|
|
|
|
|
|
/**********************************************************************************************
|
|
* Macros for N=1 and M=4
|
|
**********************************************************************************************/
|
|
|
|
#if defined(_AIX)
|
|
define(`COPY_1x4', `
|
|
#else
|
|
.macro COPY_1x4
|
|
#endif
|
|
|
|
lxvpx vs32, o0, A0
|
|
addi A0, A0, 32
|
|
|
|
|
|
mr T1, BO
|
|
|
|
#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
|
|
stxvd2x vs32, o0, T1
|
|
stxvd2x vs33, o16, T1
|
|
#else
|
|
stxvd2x vs33, o0, T1
|
|
stxvd2x vs32, o16, T1
|
|
#endif
|
|
|
|
#if defined(_AIX)
|
|
')
|
|
#else
|
|
.endm
|
|
#endif
|
|
|