Xianyi Zhang
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fc35b72ae1
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Refs #2899
Merge branch 'openblas-open-910' of git://github.com/damonyu1989/OpenBLAS into damonyu1989-openblas-open-910
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2020-11-10 09:38:04 +08:00 |
damonyu
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ef8e7d0279
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Add the support for RISC-V Vector.
Change-Id: Iae7800a32f5af3903c330882cdf6f292d885f266
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2020-10-15 16:09:02 +08:00 |
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Xianyi Zhang
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265ab484c8
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Change default RISC-V 64-bit corename to RISCV64_GENERIC
e.g. make CC=riscv64-unknown-linux-gnu-gcc FC=riscv64-unknown-linux-gnu-gfortran TARGET=RISCV64_GENERIC HOSTCC=gcc
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2020-02-27 14:46:15 +08:00 |
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Xianyi Zhang
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44020a42a4
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Fixed compile bug for RV64.
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2020-02-27 14:29:42 +08:00 |
Jerry Zhao
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0ee395db35
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Fixed TRMM and SYMM for RISCV
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2018-04-18 18:03:32 -07:00 |
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Jerry Zhao
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c167a3d6f4
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Added RISCV build
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2018-04-16 14:08:31 -07:00 |