8df0289db6
Adds tail undisturbed for RVV Level 1 operations
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During the last iteration of some RVV operations, accumulators can get overwritten when VL < VLMAX and tail policy is agnostic.
Commit changes intrinsics tail policy to undistrubed.
2023-07-20 15:28:35 +01:00
e1958eb705
Fixes RVV masked intrinsics for iamax/iamin/imax/imin kernels
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Changes masked intrinsics from _m to _mu and reintroduces maskedoff argument.
2023-07-05 11:34:00 +01:00
1374a2d08b
This PR adapts latest spec changes
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Add prefix (_riscv) for all riscv intrinsics
Update some intrinsics' parameter, like vfredxxxx, vmerge
2023-03-19 23:59:03 -07:00
bef47917bd
Initial version for riscv sifive x280
2022-11-15 00:06:25 -08:00
Octavian Maghiar
Heller Zheng