Zhang Xianyi
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552119c484
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Fixed #407. Support outputing the CPU corename on runtime.
The user can use char * openblas_get_config() or char * openblas_get_corename().
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2014-07-08 12:48:08 +08:00 |
Timothy Gu
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6c2ead30f0
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Remove all trailing whitespace except lapack-netlib
Signed-off-by: Timothy Gu <timothygu99@gmail.com>
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2014-06-27 12:05:18 -07:00 |
wernsaar
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43fbdb7a5a
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added ARMV5 as reference platform
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2014-05-13 17:25:19 +02:00 |
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wernsaar
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b3254eecaf
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Merge remote branch 'origin/haswell' into develop
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2013-12-01 18:09:12 +01:00 |
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wernsaar
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d13aa79d26
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modified getarch.c
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2013-12-01 17:31:22 +01:00 |
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Zhang Xianyi
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2638370844
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Init code base for Intel Haswell.
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2013-08-13 00:54:59 +08:00 |
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Zhang Xianyi
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673e453b3f
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Enable bulldozer kernels.
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2013-08-05 16:07:54 +08:00 |
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Zhang Xianyi
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5b504d6c23
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Refs #263. Rollback bulldozer and piledriver kernels to barcelona kernels.
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2013-07-28 17:39:24 +08:00 |
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Zhang Xianyi
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fbb75e58b1
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Fixed the typo in getarch.c
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2013-07-09 16:26:59 +08:00 |
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Zhang Xianyi
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f54f5bac9e
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Refs #248. Fixed the LSB compatiable issue for BLAS only.
For example, make CC=lsbcc NO_LAPACK=1.
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2013-07-09 15:38:03 +08:00 |
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Zhang Xianyi
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886cbaf4e4
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Support AMD Piledriver by bulldozer kernels.
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2013-07-06 12:06:43 -03:00 |
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Zhang Xianyi
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48bdc1ad3b
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Added NO_PARALLEL_MAKE flag to disable parallel make.
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2013-04-15 21:37:30 +08:00 |
Explorer09
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53588bc786
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getarch.c: Minor re-ordering of architecture list
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2013-03-17 23:09:23 +08:00 |
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Explorer09
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b47f13ee4c
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getarch.c: Minor re-ordering of architecture list
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2013-03-17 23:07:48 +08:00 |
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Zhang Xianyi
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bfaaa975e6
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Added BULLDOZER target. So far it uses barcelona kernels.
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2012-12-07 00:53:31 +08:00 |
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Zhang Xianyi
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b7c0fa6bd2
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Init AMD Bulldozer codebase.
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2012-12-06 07:29:54 -05:00 |
Xianyi Zhang
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0a958b6a02
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Refs #118. Detect AMD Bulldozer as Barcelona.
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2012-06-25 17:28:49 +08:00 |
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Zhang Xianyi
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d3b67d0bd8
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Refs #113. Fixed the typo BOBCATE -> BOBCAT
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2012-05-31 22:40:15 +08:00 |
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Zhang Xianyi
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d6cab3f37e
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Refs #113. Support AMD Bobcate using Barcelona kernel codes. Replace 3DNow! with MMX.
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2012-05-31 18:17:45 +08:00 |
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Xianyi Zhang
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19a48b82cf
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Init Sandybridge codes based on Nehalem.
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2012-03-30 20:01:03 +08:00 |
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Xianyi Zhang
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b95ad4cfaf
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Support detecting ICT Loongson-3B CPU.
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2011-11-09 19:29:50 +00:00 |
|
traits
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9fc6764fa7
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refs #55. Added DTB_ENTRIES into dynamic arch setting parameters. Now, it can read DTB_ENTRIES on runtime.
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2011-09-05 17:37:07 +08:00 |
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Xianyi Zhang
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ff6ae89d3e
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Fixed #19. Provided an error msg when the arch is not supported.
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2011-04-22 20:21:42 +08:00 |
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Xianyi Zhang
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46ce7270d9
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fixed a typo.
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2011-01-25 15:55:56 +08:00 |
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Xianyi Zhang
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0597c1076f
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Added the configures of loongson 3a. refs #1
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2011-01-24 22:45:35 +00:00 |
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Xianyi Zhang
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342bbc3871
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Import GotoBLAS2 1.13 BSD version codes.
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2011-01-24 14:54:24 +00:00 |