21f46a1cf2
ARM64: Use THUNDERX2T99 Neon Kernels for ARMV8
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Currently the generic ARMV8 target uses C implementations
for many routines. Replace these with the neon implementations
written for THUNDERX2T99 target which are upto 6x faster for
certain routines.
2018-10-17 10:44:37 -07:00
4cf7315a5d
Adjust ARMV8 SGEMM unrolling when using the C fallback kernel_2x2 for IOS
2018-09-06 21:41:54 +02:00
6eb4b9ae7c
Tune HASWELL SWITCH_RATIO as well
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Similar to the SKYLAKEX patch, 32 seems to work best
(much better than 4 or 16)
Before (4)
Matrix SGEMM cycles MPC DGEMM cycles MPC
48 x 48 15554.3 7.2 0.2% 30353.8 3.7 0.3%
64 x 64 30346.8 8.7 1.6% 63495.0 4.1 -0.1%
65 x 65 81668.1 3.4 -123.3% 82705.2 3.3 -21.2%
80 x 80 105045.9 4.9 -95.5% 115226.0 4.5 -2.2%
96 x 96 152461.2 5.8 -74.3% 148156.3 6.0 16.4%
112 x 112 188505.2 7.5 -42.2% 171187.3 8.2 36.4%
128 x 128 257884.0 8.1 -39.5% 224764.8 9.3 46.0%
Intermediate (16)
Matrix SGEMM cycles MPC DGEMM cycles MPC
48 x 48 15565.7 7.2 0.2% 30378.9 3.7 0.2%
64 x 64 30430.2 8.7 1.3% 63046.4 4.2 0.6%
65 x 65 27306.0 10.1 25.3% 38879.2 7.1 43.0%
80 x 80 51008.7 10.1 5.1% 61007.6 8.4 45.9%
96 x 96 70856.7 12.5 19.0% 83403.1 10.6 53.0%
112 x 112 84769.9 16.6 36.0% 99920.1 14.1 62.9%
128 x 128 84213.2 25.0 54.5% 113024.2 18.6 72.8%
After (32)
Matrix SGEMM cycles MPC DGEMM cycles MPC
48 x 48 15537.3 7.2 0.3% 30537.0 3.6 -0.3%
64 x 64 30352.7 8.7 1.6% 62597.8 4.2 1.3%
65 x 65 36857.0 7.5 -0.8% 56167.6 4.9 17.7%
80 x 80 42552.6 12.1 20.8% 69536.7 7.4 38.3%
96 x 96 52101.5 17.1 40.5% 91016.1 9.7 48.7%
112 x 112 63853.7 22.1 51.8% 110507.4 12.7 58.9%
128 x 128 73966.1 28.4 60.0% 163146.4 12.9 60.8%
2018-06-17 17:08:36 +00:00
5c6f008365
Tune param.h for SkylakeX
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param.h defines a per-platform SWITCH_RATIO, which is used as a measure for how fine
grained the blocks for gemm need to be split up. Many platforms define this to 4.
The reality is that the gemm low level implementation for SkylakeX likes bigger blocks
due to the nature of SIMD... by tuning the SWITCH_RATIO to 32 the threading performance
improves significantly:
Before
Matrix SGEMM cycles MPC DGEMM cycles MPC
48 x 48 10756.0 10.5 -0.5% 18296.7 6.1 -1.7%
64 x 64 20490.0 12.9 1.4% 40615.0 6.5 0.0%
65 x 65 83528.3 3.3 -210.9% 96319.0 2.9 -83.3%
80 x 80 101453.5 5.1 -166.3% 128021.7 4.0 -76.6%
96 x 96 149795.1 5.9 -143.1% 168059.4 5.3 -47.4%
112 x 112 191481.2 7.3 -105.8% 204165.0 6.9 -14.6%
128 x 128 265019.2 7.9 -99.0% 272006.4 7.7 -5.3%
After
Matrix SGEMM cycles MPC DGEMM cycles MPC
48 x 48 10666.3 10.6 0.4% 18236.9 6.2 -1.4%
64 x 64 20410.1 13.0 1.8% 39925.8 6.6 1.7%
65 x 65 34983.0 7.9 -30.2% 51494.6 5.4 2.0%
80 x 80 39769.1 13.0 -4.4% 63805.2 8.1 12.0%
96 x 96 45169.6 19.7 26.7% 80065.8 11.1 29.8%
112 x 112 57026.1 24.7 38.7% 99535.5 14.2 44.1%
128 x 128 64789.8 32.5 51.3% 117407.2 17.9 54.6%
With this change, threading starts to be a win already at 96x96
2018-06-17 15:47:50 +00:00
99c7bba8e4
Initial support for SkylakeX / AVX512
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This patch adds the basic infrastructure for adding the SkylakeX (Intel Skylake server)
target. The SkylakeX target will use the AVX512 (AVX512VL level) instruction set,
which brings 2 basic things:
1) 512 bit wide SIMD (2x width of AVX2)
2) 32 SIMD registers (2x the number on AVX2)
This initial patch only contains a trivial transofrmation of the Haswell SGEMM kernel
to AVX512VL; more will follow later but this patch aims to get the infrastructure
in place for this "later".
Full performance tuning has not been done yet; with more registers and wider SIMD
it's in theory possible to retune the kernels but even without that there's an
interesting enough performance increase (30-40% range) with just this change.
2018-06-03 07:58:52 +00:00
d94d7baf7e
Add mips32r2 api target
2018-05-02 20:17:26 +02:00
e3d844b062
Added mips I6500 core
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2017-09-22 11:57:43 +05:30
832a272784
Revert Zen param.h to Haswell values (instead of Excavator).
2017-04-18 12:40:25 +02:00
c9ff735da6
Add ZEN support (tested for auto-detected static backend)
2017-03-19 15:32:50 +01:00
cd135e2b59
Merge pull request #1130 from quickwritereader/develop
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Blas 3 for single precision
2017-03-15 10:00:52 +01:00
08786c4b95
strmm and ctrmm
2017-03-13 01:23:16 +04:00
82e80fa82b
initial strmm(sgemm). not tuned yet
2017-03-06 04:27:40 +04:00
ffc1d6c468
Merge pull request #1108 from ashwinyes/develop_20170203_thunderx2t99
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Optimized Implementations for ThunderX2T99
2017-02-28 16:02:19 +01:00
19ba133383
THUNDERX2T99: Add Optimized ZGEMM Implementation
2017-02-28 05:31:41 +00:00
0d96b0e2a7
Merge branch 'z13' into develop
2017-02-26 06:17:33 +04:00
848cb27b1e
ztrmm kernel.
2017-02-26 06:14:12 +04:00
2757b49767
THUNDERX2T99: Add Optimized CGEMM Implementation
2017-01-30 17:44:26 +05:30
f279ff4789
THUNDERX2T99: Add Optimized SGEMM Implementation
2017-01-16 21:44:33 +05:30
4b55fae337
ARM64: Add Cavium THUNDERX2T99 Target
2017-01-11 11:18:40 +05:30
fb200c7245
ARM64: Add Cavium THUNDERX Target
2017-01-10 15:01:37 +05:30
4713e7c47f
ARM64: Add the VULCAN Target
2017-01-10 15:01:17 +05:30
b678471d65
Merge branch 'z13' into develop
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Conflicts:
CONTRIBUTORS.md
2017-01-09 05:52:42 -05:00
6418667818
dtrmm and dgemm for z13
2017-01-04 19:32:33 +04:00
9687437928
MIPS n32 ABI and build time mips simd support check
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-08-10 17:44:22 +05:30
d1c6469283
MIPS n32 ABI support, MSA support detection and rename ARCH, ARCHFLAGS
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-08-08 11:58:01 +05:30
beb1d076a4
Added MSA optimization for GEMV_N, GEMV_T, ASUM, DOT functions
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-07-15 18:38:25 +05:30
8a592ee386
Merge pull request #924 from ashwinyes/develop_aarch64_improvements_20160714
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Improvements to Aarch64 kernels
2016-07-14 15:47:55 -04:00
0a5ff9f9f9
Improvements to TRMM and GEMM kernels
2016-07-14 13:56:04 +05:30
57df7956ee
Added CGEMM, ZGEMM, STRMM, DTRMM, CTRMM, ZTRMM. Updated macros in SGEMM, DGEMM, STRMM.
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-06-28 17:51:10 +05:30
c4ba40e308
SGEMM optimization for MIPS P5600 and I6400 using MSA. Unrolled k loop in DGEMM kernel function
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-05-19 11:04:42 +05:30
88011f625d
Merge pull request #876 from wernsaar/develop
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optimized dgemm on power8 for 20 threads
2016-05-16 14:52:40 +02:00
8310d4d3f7
optimized dgemm for 20 threads
2016-05-16 14:14:25 +02:00
085cf236c2
conflict resolved by syncing with 'xianyi:develop'
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-05-04 11:07:14 +05:30
b7b3d8ec8e
DGEMM optimization for MIPS P5600 and I6400 using MSA
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-05-03 14:42:26 +05:30
cd7af5260a
Merge pull request #847 from sva-img/develop
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MIPS P5600(32 bit) and I6400(64 bit) cores support added.
2016-04-29 11:44:36 -04:00
782f75ba94
optimized param.h for POWER8
2016-04-27 15:48:09 +02:00
0d0c6f7d7d
optimized dgemm for POWER8
2016-04-27 14:01:08 +02:00
40ac64ae4f
updated param.h for EXCAVATOR
2016-04-25 10:40:04 +02:00
089aad57f7
updated param.h for POWER8
2016-04-23 14:26:24 +02:00
879a51165f
Optimized zgemm and tested zgemm again
2016-04-22 13:07:12 +02:00
2c3dfe2bf3
MIPS P5600(32 bit) and I6400(64 bit) cores support added.
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Seperated mips and mips64 files.
Configurations support for mips 32 bit.
Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-04-22 14:03:18 +05:30
3c6294ca3d
added optimized sgemm_tcopy for power8
2016-04-19 16:08:54 +02:00
dd43661cfd
Init IBM z system (s390x) porting.
2016-04-15 18:02:24 -04:00
e173c51c04
updated zgemm- and ztrmm-kernel for POWER8
2016-04-08 09:05:37 +02:00
9c42f0374a
Updated cgemm- and sgemm-kernel for POWER8 SMP
2016-04-07 15:08:15 +02:00
a51102e9b7
bugfixes for sgemm- and cgemm-kernel
2016-04-06 11:15:21 +02:00
c5b1fbcb2e
updated optimized cgemm- and ctrmm-kernel for POWER8
2016-04-04 09:12:08 +02:00
6a9bbfc227
updated sgemm- and strmm-kernel for POWER8
2016-04-02 17:16:36 +02:00
e1df5a6e23
fixed sgemm- and strmm-kernel
2016-03-18 12:12:03 +01:00
5c658f8746
add optimized cgemm- and ctrmm-kernel for POWER8
2016-03-18 08:17:25 +01:00
96284ab295
added sgemm- and strmm-kernel for POWER8
2016-03-14 13:52:44 +01:00
91e1c5080c
modified configuration, to use power6 sgemm kernel for power8
2016-03-04 13:38:57 +01:00
b752858d6c
added dgemm-, dtrmm-, zgemm- and ztrmm-kernel for power8
2016-03-01 07:33:56 +01:00
3e8d6ea74f
Init POWER8 kernels by POWER6.
2015-11-03 12:34:23 +08:00
b07d733a71
added updates for syrk and syr2k
2016-01-21 13:16:44 +01:00
39937d15cd
Change BUFFER_SIZE for Cortex A57 to 20 MB
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Change the GEMM_P, GEMM_Q, GEMM_R values for Cortex A57
2015-11-20 01:12:04 +05:30
1397b47197
Optimized zgemm kernel for CORTEXA57
2015-11-09 14:15:53 +05:30
45f78963ac
Optimized cgemm kernel for CORTEXA57
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Also, add a generic ztrmm 4x4 kernel
2015-11-09 14:15:53 +05:30
402443bf9c
Optimized dgemm kernel for CORTEXA57
2015-11-09 14:15:53 +05:30
f2f8a0fe8b
Adding arm64 target CORTEXA57
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Co-Authored-By: Ralph Campbell <ralph.campbell@broadcom.com>
2015-11-09 14:15:50 +05:30
9bd962f655
modified haswell parameter dgemm_unroll_n
2015-06-13 10:28:27 +02:00
51ff17d46e
Add AMD Excavator target.
2015-05-13 16:16:30 -05:00
229ce2ccd1
Add cortex-a9 and cortex-a15 targets.
2015-01-12 08:55:29 +00:00
ddf983d643
added optimizations for steamroller
2014-12-30 20:14:45 +08:00
4319769b79
added target processor STEAMROLLER
2014-12-28 20:16:46 +08:00
587e16fba3
Ref #458 : Backport, sandybrigde uses nehalem zgemm kernel
2014-12-22 17:01:18 +01:00
2fb02626da
Update organization info.
2014-11-25 15:28:58 +08:00
a85c2785ae
Refs #467 . Added generic kernel file for x86_64.
2014-11-24 15:34:48 +08:00
58c90d5937
# The first commit's message is:
...
Optimizations for APM's xgene-1 (aarch64).
1) general system updates to support armv8 better. Make all did not work, one needed to supply TARGET=ARMV8.
2) sgem 4x4 kernel in assembler using SIMD, and configuration changes to use it.
3) strmm 4x4 kernel in C. Since the sgem kernel does 4x4, the trmm kernel must also do 4xN.
Added Dave Nuechterlein to the contributors list.
2014-11-11 22:19:23 +08:00
9d7057366d
bugfix for GEMM3M functions
2014-09-21 11:41:43 +02:00
7aae4a62e7
enabled use of GEMM3M functions
2014-09-20 14:27:10 +02:00
5087096711
optimization of sandybridge cgemm-kernel
2014-07-29 19:07:21 +02:00
1cc02b4337
optimized sgemm kernel for haswell
2014-07-28 11:50:01 +02:00
125610d23b
allow to set custom value for ?GEMM_DEFAULT_UNROLL_MN, optimizations for syrk
2014-07-24 18:43:31 +02:00
99efbbbad5
Fixed #395 . Enable optimized cgemm for Sandybridge. Added optimized sdot kernel.
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Fixed c/zgemm, zgemv computational error of haswell, piledriver, bullldozer, and
barcelona on Windows.
Merge branch 'develop' of https://github.com/wernsaar/OpenBLAS into wernsaar-develop
Conflicts:
kernel/Makefile.L1
kernel/x86_64/KERNEL
param.h
2014-06-29 10:34:51 +08:00
6c2ead30f0
Remove all trailing whitespace except lapack-netlib
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Signed-off-by: Timothy Gu <timothygu99@gmail.com>
2014-06-27 12:05:18 -07:00
365e8de346
added optimized cgemm-kernel for SANDYBRIDGE
2014-06-27 13:40:29 +02:00
dabab2b5f4
added new optimized sgemm kernel for SANDYBRIGE
2014-06-26 21:42:08 +02:00
aa2709c4e0
enabled optimized dgemm kernel for NEHALEM
2014-06-26 12:22:29 +02:00
d83373db61
added parameter for gemm3m kernels
2014-06-25 10:40:25 +02:00
43fbdb7a5a
added ARMV5 as reference platform
2014-05-13 17:25:19 +02:00
5f3b68b4d4
replaced sgemm and cgemm kernels because lapack bugs
2014-05-10 11:24:07 +02:00
2424af62fd
replaced dgemm-kernel because bug in lapack
2014-05-10 10:52:37 +02:00
47b22763f8
reduced stack usage on windows to 16K
2014-04-24 14:09:26 +02:00
aae75b2461
modified param.h
2013-12-01 18:43:24 +01:00
b3254eecaf
Merge remote branch 'origin/haswell' into develop
2013-12-01 18:09:12 +01:00
ecbc85b954
modified param.h
2013-12-01 17:54:53 +01:00
afe44b0241
tests and code cleanup of gemm_kernels for HASWELL
2013-10-28 14:23:48 +01:00
a77c71eaf5
added highly optimized dgemm_kernel for HASWELL
2013-10-28 10:23:47 +01:00
fe8c5666f9
optimized dgemm_kernel for HASWELL
2013-10-20 16:52:26 +02:00
2638370844
Init code base for Intel Haswell.
2013-08-13 00:54:59 +08:00
886cbaf4e4
Support AMD Piledriver by bulldozer kernels.
2013-07-06 12:06:43 -03:00
6e8501c8a1
Fixed #239 bug in param.h about BARCELONA and BULLDOZER.
2013-06-29 10:36:01 +08:00
f67fa62851
added dgemv_n_bulldozer.S
2013-06-15 16:42:37 +02:00
d65bbec99b
added new sgemm kernel for BULLDOZER
2013-06-09 15:57:42 +02:00
ba800f0883
correct GEMM_THREAD in param.h
2013-06-08 10:03:59 +02:00
25491e42f9
New dgemm kernel for BULLDOZER: dgemm_kernel_8x2_bulldozer.S
2013-06-08 09:40:17 +02:00
731220f870
changed DGEMM_DEFAULT_P and DGEMM_DEFAULT_Q to 248 for BULLDOZER 64bit
2013-04-30 10:07:17 +02:00
b7c0fa6bd2
Init AMD Bulldozer codebase.
2012-12-06 07:29:54 -05:00
01e3c984ce
Fix compilation with TARGET=GENERIC
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Patch applied to Debian package
2012-11-14 21:04:05 +01:00
Ashwin Sekhar T K
Martin Kroeker
Arjan van de Ven
Shivraj Patil
Gian-Carlo Pascutto
Denis Steckelmacher
Abdurrauf
Andrew Pinski
Zhang Xianyi
Ashwin Sekhar T K
Werner Saar
Benedikt Huber
Timothy Gu
Sébastien Villemot