9687437928
MIPS n32 ABI and build time mips simd support check
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-08-10 17:44:22 +05:30
d1c6469283
MIPS n32 ABI support, MSA support detection and rename ARCH, ARCHFLAGS
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-08-08 11:58:01 +05:30
beb1d076a4
Added MSA optimization for GEMV_N, GEMV_T, ASUM, DOT functions
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-07-15 18:38:25 +05:30
8a592ee386
Merge pull request #924 from ashwinyes/develop_aarch64_improvements_20160714
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Improvements to Aarch64 kernels
2016-07-14 15:47:55 -04:00
0a5ff9f9f9
Improvements to TRMM and GEMM kernels
2016-07-14 13:56:04 +05:30
57df7956ee
Added CGEMM, ZGEMM, STRMM, DTRMM, CTRMM, ZTRMM. Updated macros in SGEMM, DGEMM, STRMM.
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-06-28 17:51:10 +05:30
c4ba40e308
SGEMM optimization for MIPS P5600 and I6400 using MSA. Unrolled k loop in DGEMM kernel function
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-05-19 11:04:42 +05:30
88011f625d
Merge pull request #876 from wernsaar/develop
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optimized dgemm on power8 for 20 threads
2016-05-16 14:52:40 +02:00
8310d4d3f7
optimized dgemm for 20 threads
2016-05-16 14:14:25 +02:00
085cf236c2
conflict resolved by syncing with 'xianyi:develop'
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-05-04 11:07:14 +05:30
b7b3d8ec8e
DGEMM optimization for MIPS P5600 and I6400 using MSA
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Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-05-03 14:42:26 +05:30
cd7af5260a
Merge pull request #847 from sva-img/develop
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MIPS P5600(32 bit) and I6400(64 bit) cores support added.
2016-04-29 11:44:36 -04:00
782f75ba94
optimized param.h for POWER8
2016-04-27 15:48:09 +02:00
0d0c6f7d7d
optimized dgemm for POWER8
2016-04-27 14:01:08 +02:00
40ac64ae4f
updated param.h for EXCAVATOR
2016-04-25 10:40:04 +02:00
089aad57f7
updated param.h for POWER8
2016-04-23 14:26:24 +02:00
879a51165f
Optimized zgemm and tested zgemm again
2016-04-22 13:07:12 +02:00
2c3dfe2bf3
MIPS P5600(32 bit) and I6400(64 bit) cores support added.
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Seperated mips and mips64 files.
Configurations support for mips 32 bit.
Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
2016-04-22 14:03:18 +05:30
3c6294ca3d
added optimized sgemm_tcopy for power8
2016-04-19 16:08:54 +02:00
e173c51c04
updated zgemm- and ztrmm-kernel for POWER8
2016-04-08 09:05:37 +02:00
9c42f0374a
Updated cgemm- and sgemm-kernel for POWER8 SMP
2016-04-07 15:08:15 +02:00
a51102e9b7
bugfixes for sgemm- and cgemm-kernel
2016-04-06 11:15:21 +02:00
c5b1fbcb2e
updated optimized cgemm- and ctrmm-kernel for POWER8
2016-04-04 09:12:08 +02:00
6a9bbfc227
updated sgemm- and strmm-kernel for POWER8
2016-04-02 17:16:36 +02:00
e1df5a6e23
fixed sgemm- and strmm-kernel
2016-03-18 12:12:03 +01:00
5c658f8746
add optimized cgemm- and ctrmm-kernel for POWER8
2016-03-18 08:17:25 +01:00
96284ab295
added sgemm- and strmm-kernel for POWER8
2016-03-14 13:52:44 +01:00
91e1c5080c
modified configuration, to use power6 sgemm kernel for power8
2016-03-04 13:38:57 +01:00
b752858d6c
added dgemm-, dtrmm-, zgemm- and ztrmm-kernel for power8
2016-03-01 07:33:56 +01:00
3e8d6ea74f
Init POWER8 kernels by POWER6.
2015-11-03 12:34:23 +08:00
b07d733a71
added updates for syrk and syr2k
2016-01-21 13:16:44 +01:00
39937d15cd
Change BUFFER_SIZE for Cortex A57 to 20 MB
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Change the GEMM_P, GEMM_Q, GEMM_R values for Cortex A57
2015-11-20 01:12:04 +05:30
1397b47197
Optimized zgemm kernel for CORTEXA57
2015-11-09 14:15:53 +05:30
45f78963ac
Optimized cgemm kernel for CORTEXA57
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Also, add a generic ztrmm 4x4 kernel
2015-11-09 14:15:53 +05:30
402443bf9c
Optimized dgemm kernel for CORTEXA57
2015-11-09 14:15:53 +05:30
f2f8a0fe8b
Adding arm64 target CORTEXA57
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Co-Authored-By: Ralph Campbell <ralph.campbell@broadcom.com>
2015-11-09 14:15:50 +05:30
9bd962f655
modified haswell parameter dgemm_unroll_n
2015-06-13 10:28:27 +02:00
51ff17d46e
Add AMD Excavator target.
2015-05-13 16:16:30 -05:00
229ce2ccd1
Add cortex-a9 and cortex-a15 targets.
2015-01-12 08:55:29 +00:00
ddf983d643
added optimizations for steamroller
2014-12-30 20:14:45 +08:00
4319769b79
added target processor STEAMROLLER
2014-12-28 20:16:46 +08:00
587e16fba3
Ref #458 : Backport, sandybrigde uses nehalem zgemm kernel
2014-12-22 17:01:18 +01:00
2fb02626da
Update organization info.
2014-11-25 15:28:58 +08:00
a85c2785ae
Refs #467 . Added generic kernel file for x86_64.
2014-11-24 15:34:48 +08:00
58c90d5937
# The first commit's message is:
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Optimizations for APM's xgene-1 (aarch64).
1) general system updates to support armv8 better. Make all did not work, one needed to supply TARGET=ARMV8.
2) sgem 4x4 kernel in assembler using SIMD, and configuration changes to use it.
3) strmm 4x4 kernel in C. Since the sgem kernel does 4x4, the trmm kernel must also do 4xN.
Added Dave Nuechterlein to the contributors list.
2014-11-11 22:19:23 +08:00
9d7057366d
bugfix for GEMM3M functions
2014-09-21 11:41:43 +02:00
7aae4a62e7
enabled use of GEMM3M functions
2014-09-20 14:27:10 +02:00
5087096711
optimization of sandybridge cgemm-kernel
2014-07-29 19:07:21 +02:00
1cc02b4337
optimized sgemm kernel for haswell
2014-07-28 11:50:01 +02:00
125610d23b
allow to set custom value for ?GEMM_DEFAULT_UNROLL_MN, optimizations for syrk
2014-07-24 18:43:31 +02:00
Shivraj Patil
Zhang Xianyi
Ashwin Sekhar T K
Werner Saar
Benedikt Huber