3ce28fb81a
Merge pull request #2055 from martin-frbg/atomid
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Add CPUID data for Intel Denverton (as Nehalem)
2019-03-12 22:57:07 +01:00
04f2226ea6
Add Intel Denverton
2019-03-12 16:09:55 +01:00
4741ce803b
Merge pull request #2045 from martin-frbg/2033-3
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Do not compile in AVX512 check if AVX support is disabled
2019-03-06 22:40:26 +01:00
11cfd0bd75
Do not compile in AVX512 check if AVX support is disabled
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xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway
2019-03-05 16:04:25 +01:00
d7b2c53c0b
Merge pull request #2039 from brada4/meminit
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Address warning in memory.c
2019-03-05 12:11:15 +01:00
10d841d8b9
Merge pull request #2026 from martin-frbg/trmv_threads
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Correct range limiting in trmv_thread and re-enable TRMV multithreading
2019-03-04 15:08:31 +01:00
6c83b878f6
Merge pull request #2040 from martin-frbg/locks2002
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Restore locking optimizations for OpenMP case
2019-03-04 15:07:14 +01:00
af480b02a4
Restore locking optimizations for OpenMP case
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restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461
2019-03-03 14:17:07 +01:00
e4a79be6bb
address warning introed with #1814 et al
2019-03-03 09:05:11 +02:00
45333d5793
Fix error introduced during cleanup
2019-02-19 22:16:33 +01:00
78d9910236
Correct range_n limiting
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same bug as seen in #1388 , somehow missed in corresponding PR #1389
2019-02-19 20:59:48 +01:00
03a2bf2602
Fix potential memory leak in cpu enumeration on Linux ( #2008 )
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* Fix potential memory leak in cpu enumeration with glibc
An early return after a failed call to sched_getaffinity would leak the previously allocated cpu_set_t. Wrong calculation of the size argument in that call increased the likelyhood of that failure. Fixes #2003
2019-02-10 23:24:45 +01:00
69edc5bbe7
Restore dropped patches in the non-TLS branch of memory.c ( #2004 )
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* Restore dropped patches in the non-TLS branch of memory.c
As discovered in #2002 , the reintroduction of the "original" non-TLS version of memory.c as an alternate branch had inadvertently used ba1f91fa8002e2#1450 , #1468 , #1501 , #1504 and #1520 .
2019-02-07 20:06:13 +01:00
29dc72889f
Add support for Hygon Dhyana
2019-01-16 14:25:19 +08:00
dbc9a060ef
Fix missing braces in support_av() call
2019-01-14 22:41:31 +01:00
21c0f2af7b
Merge pull request #1957 from martin-frbg/issue1954
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Move TLS key deletion to openblas_quit
2019-01-10 12:04:08 +01:00
ad2c386d6a
Move TLS key deletion to openblas_quit
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fixes #1954 (as suggested by thrasibule in that issue)
2019-01-10 00:32:50 +01:00
31ed19e8b9
Add message for SkylakeX and KNL fallbacks to Haswell
2019-01-05 19:41:13 +01:00
e1574fa2b4
Add xcr0 (os support) check
2019-01-05 18:08:02 +01:00
ae1d1f74f7
Query AVX2 and AVX512 capability for runtime cpu selection
2019-01-05 16:55:33 +01:00
8643521127
Merge pull request #1943 from martin-frbg/issue1748
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Re-enable loop unrolling in trmv and remove the scary warning
2018-12-30 20:07:01 +01:00
5a720cf9ca
Re-enable loop unrolling in trmv and remove the scary warning
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fixes #1748 as that half of the fix for #1332 appears to have been an overreaction on my part.
2018-12-30 15:22:37 +01:00
ccd5945d38
Merge pull request #1942 from martin-frbg/issue1720
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Delete the pthread key on cleanup in TLS mode
2018-12-30 14:47:05 +01:00
bba1e67269
Delete the pthread key on cleanup in TLS mode
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to avoid a crash when OpenBLAS was loaded via dlopen and libc tries to clean up the leaked TLS after dlclose
Fixes #1720
2018-12-29 21:59:31 +01:00
f343ed65b5
Avoid taking the root of a negative number
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Fixes #1924 where numpy 1.17+ would report the (transient) FE_INVALID exception raised for the domain error.
2018-12-22 22:30:29 +01:00
0bf6d74e5f
Fix typo in previous commit for arm dynamic arch
2018-12-07 19:37:33 +01:00
2b355592e3
Make sure to use the arm version of dynamic.c in ARM64 DYNAMIC_ARCH
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cf. #1908
2018-12-07 16:25:55 +01:00
2601cd58ab
remove surplus locking code , only enabled w x86, disabled or never enabled on all others
2018-11-30 11:38:19 +01:00
97d7298973
call it OpenBLAS not just version
2018-11-29 11:52:08 +01:00
de0d0ed52f
Improve formatting of config output
2018-11-29 11:28:19 +01:00
816775e309
Add version information to openblas_get_config output
2018-11-29 00:06:44 +01:00
f72fdf525c
Merge pull request #1875 from martin-frbg/issue1851
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Serialize accesses to parallelized level3 functions from multiple cal…
2018-11-25 20:53:46 +01:00
113cb00b95
fix missing parenthesis
2018-11-19 21:01:36 +01:00
5192651706
Add CriticalSection handling instead of mutexes for Windows
2018-11-19 17:58:22 +01:00
2e6fae2aad
Serialize accesses to parallelized level3 functions from multiple callers
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for #1851
2018-11-19 14:02:50 +01:00
368d14f8c8
Fix harmless typo
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fixes #1872
2018-11-16 14:58:28 +01:00
0427277cef
Allow optimization for small m, large n only if it can be made threadsafe
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otherwise the introduction of a static array in 8e5a108#532 breaks concurrent calls from multiple threads as seen in #1844
2018-11-10 15:45:54 +01:00
5b708e5eb1
sgemm/dgemm: add a way for an arch kernel to specify prefered sizes
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The current gemm threading code can make very unfortunate choices, for
example on my 10 core system a 1024x1024x1024 matrix multiply ends up
chunking into blocks of 102... which is not a vector friendly size
and performance ends up horrible.
this patch adds a helper define where an architecture can specify
a preference for size multiples.
This is different from existing defines that are minimum sizes and such.
The performance increase with this patch for the 1024x1024x1024 sgemm
is 2.3x (!!)
2018-11-01 01:43:20 +00:00
f5595d0262
Merge pull request #1843 from martin-frbg/aix_numprocs
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Add get_num_procs implementation for AIX
2018-10-31 21:25:15 +01:00
326d394a0f
Add get_num_procs implementation for AIX
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(and copy HAIKU implementation to the non-TLS version of the code as well)
2018-10-31 18:38:22 +01:00
38cf5d9364
ensure that threading has been initialized in the first place before calling openblas_set_num_threads
2018-10-28 21:16:52 +00:00
d5aeff636f
ARM64: Enable DYNAMIC_ARCH
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Enable DYNAMIC_ARCH feature on ARM64. This patch uses the cpuid
feature in linux kernel to detect the core type at runtime
(https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt ).
If this feature is missing in kernel, then the user should use the
OPENBLAS_CORETYPE env variable to select the desired core type.
2018-10-22 01:49:35 -07:00
d50abc8903
ARM64: Move parameters from parameter.c to param.h
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Remove the runtime setting of P, Q, R parameters for
targets ARMV8, THUNDERX2T99. Instead set them as constants
in param.h at compile time.
2018-10-22 01:45:51 -07:00
21f46a1cf2
ARM64: Use THUNDERX2T99 Neon Kernels for ARMV8
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Currently the generic ARMV8 target uses C implementations
for many routines. Replace these with the neon implementations
written for THUNDERX2T99 target which are upto 6x faster for
certain routines.
2018-10-17 10:44:37 -07:00
3439158dea
address #1782 2nd loop
2018-10-03 21:20:50 +02:00
28aa94bf4b
Include thread numbers in failure message from blas_thread_init
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to aid in debugging cases like #1767
2018-09-22 14:00:15 +02:00
1ad1e79062
Catch inadvertent USE_TLS=0 declaration
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for #1766
2018-09-19 18:03:43 +02:00
b402626509
Do not use the new TLS code for non-threaded builds even if USE_TLS is set
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Workaround for #1761 as that exposed a problem in the new code (which was intended to speed up multithreaded code only anyway).
2018-09-16 12:43:36 +02:00
b55690a659
typo fix
2018-08-26 11:31:07 +02:00
b902a40986
Rewrite glibc version check
2018-08-26 11:18:02 +02:00
Martin Kroeker
Andrew
caiyu
Arjan van de Ven
Erik M. Bray
Ashwin Sekhar T K