Commit Graph

7452 Commits

Author SHA1 Message Date
Bine Brank 3c7eed0e53 add remaining trmm copy rutines for SVE 2021-11-14 16:00:10 +01:00
Martin Kroeker 8f6c8d1a9e Merge pull request #3449 from martin-frbg/mips_msa
Fix MIPS/MIPS64 compilation querying compiler rather than cpu for MSA capability
2021-11-14 12:01:53 +01:00
Martin Kroeker 46947efb83
Ignore compiler support for MIPS MSA if the cpu lacks this capability 2021-11-13 23:32:26 +01:00
Martin Kroeker a569fa1540
MIPS P5600 and 24KC,1004K cpus do not support MSA 2021-11-13 23:26:48 +01:00
Martin Kroeker d6194d6a0c
get MSA capability from feature flags 2021-11-13 23:25:34 +01:00
Bine Brank 7d996b1c36 dtrmm_utcopy sve function 2021-11-13 18:48:53 +01:00
Martin Kroeker 5b7a3c0e1b
Merge pull request #3447 from martin-frbg/issue3446
Fix potentially wrong HOSTARCH definition in cross-compilation
2021-11-11 09:29:36 +01:00
Martin Kroeker 9cc0098ce2
Fix potentially wrong HOSTARCH definition in cross-compilation 2021-11-10 22:27:14 +01:00
Bine Brank ab7917910d add v2x8 kernel + fix sve dtrmm 2021-11-07 20:37:51 +01:00
Martin Kroeker 2d7ca63e21
Merge pull request #3443 from martin-frbg/issue3441
Fix NULL pointer checks in blas_memory_alloc
2021-11-05 12:23:47 +01:00
Martin Kroeker 4f057bffd6
Fix NULL pointer checks in blas_memory_alloc 2021-11-05 10:43:17 +01:00
Martin Kroeker 2c32e462ac
Merge pull request #3431 from MehdiChinoune/export-shared-only
Fix exported OpenBLASTargets.cmake
2021-11-04 23:48:02 +01:00
Martin Kroeker 7bcd64357d
Merge pull request #3442 from martin-frbg/cpuid_x86
Add CPUID recognition of Intel Alder Lake
2021-11-04 23:47:11 +01:00
Martin Kroeker 08f8bb66c0
Add CPUIDs for Alder Lake and other recent Intel cpus 2021-11-04 20:36:39 +01:00
Martin Kroeker faae86fba2
Add CPUIDs for Alder Lake and some other recent Intel cpus 2021-11-04 20:35:41 +01:00
Martin Kroeker 4ea9a14567
Merge pull request #3429 from martin-frbg/issue3428
Adjust compiler options for nvc after 21.9 (and fix typo in DYNAMIC_ARCH settings)
2021-11-04 12:13:22 +01:00
Martin Kroeker 3737766bdd
Merge pull request #3440 from mhillenbrand/fix_gemv_indices
Fix flipped indices in benchmark for gemv
2021-11-04 12:11:50 +01:00
Martin Kroeker efb16fafb0
Fix miscounting of threadpool size on Linux with OMP_PROC_BIND=TRUE (#3437)
*  return OMP places (if available, or SC_NPROCESSORS_CONF) for maximum thread count when built with OpenMP
2021-11-04 12:11:16 +01:00
Marius Hillenbrand f119e26354 Fix flipped indices in benchmark for gemv
Fixes #3439
2021-11-03 12:45:09 +01:00
Bine Brank 7093372e32 add ARMV8SVE target 2021-11-01 22:53:21 +01:00
Martin Kroeker abf45f7235
Merge pull request #3427 from mhillenbrand/zarch-detection-notes
cpuid_zarch/hwcaps: add documentation and dump hwcaps in init
2021-11-01 21:45:33 +01:00
Martin Kroeker 2847a24498
Merge pull request #3434 from gxw-loongson/develop
Add cblas_{c/z}srot cblas_{c/z}rotg support
2021-11-01 21:44:49 +01:00
gxw 25f99fa9f8 Add cblas_{c/z}srot cblas_{c/z}rotg support 2021-11-01 20:19:13 +08:00
Bine Brank a8fbdbac34 fix sve dgemm kernel + sve dtrmm 2021-10-31 10:24:25 +01:00
Martin Kroeker a6fd497820
Fix nvidia HPC version checks 2021-10-30 17:31:19 +02:00
Bine Brank 746b4f0f17 added SVE ncopy and tcopy 2021-10-30 12:11:44 +02:00
Mehdi Chinoune 9874cd11cb Fix exported OpenBLASTargets.cmake
When both BUILD_SHARED_LIBS and BUILD_STATIC_LIBS are enabled,
cmake export both of them to OpenBLASTargets under tha same name `OpenBLAS::OpenBLAS`
which leads to fatal error about OpenBLAS::OpenBLAS being both static and shared target.
This change makes cmake export only the shared library in that case.
There is another solution to treat them as components,
but I am afraid that will make it backward incompatible.
2021-10-30 04:37:41 +01:00
Martin Kroeker bb01e26cfe
Adjust compiler options for nvidia hpc 21.9 (and fix a long-standing typo in dynamic_arch settings) 2021-10-29 16:39:03 +02:00
Marius Hillenbrand 77747bc536 cpuid_zarch/hwcaps: add documentation and dump hwcaps in init
Add pointers to the definition of the hardware capability flags in glibc
and describe how they relate to the levels CPU_Z13 and CPU_Z14 for
optimized kernels.

To aid identifying available hardware capabilities and in debugging
potential build issues, dump their value in dynamic_arch_init() when
OPENBLAS_VERBOSE is set to 2 or higher.

Signed-off-by: Marius Hillenbrand <mhillen@linux.ibm.com>
2021-10-28 12:08:48 +02:00
Martin Kroeker aa231b5875
Merge pull request #3426 from martin-frbg/pr3424
Add runtime DYNAMIC_ARCH cpu detection for Tiger Lake H
2021-10-28 07:31:12 +02:00
Martin Kroeker 22a616bd8f
Add model number for Tiger Lake H (mobile variant) 2021-10-27 22:17:58 +02:00
Bine Brank 1a10d3e09d add sve dgemm prototype 2021-10-27 16:37:18 +02:00
Martin Kroeker f573ccd107
Merge pull request #3424 from Neutron3529/patch-1
auto-detect for Intel i7-11800H
2021-10-27 16:28:12 +02:00
Martin Kroeker dd103eac93
Merge pull request #3423 from mhillenbrand/fix-static-detection
s390x: use DYNAMIC_ARCH's cpu detection for compile-time choice
2021-10-27 16:27:47 +02:00
Neutron3529 ead476025d
auto-detect for Intel i7-11800H 2021-10-27 14:16:37 +08:00
Marius Hillenbrand 44950ca173 s390x: use DYNAMIC_ARCH's cpu detection for compile-time choice
On s390x, the run-time detection for DYNAMIC_ARCH and the compile-time
choice in cpuid_zarch use different methods for identifying the
supported CPU features. To make cpuid_zarch future-proof and both easier
to maintain, switch cpuid_zarch to the same mechanism as DYNAMIC_ZARCH
(i.e., derive the supported CPU features from hwcap flags) and share
code between both (in a new header cpuid_zarch.h).

Signed-off-by: Marius Hillenbrand <mhillen@linux.ibm.com>
2021-10-26 16:19:14 +02:00
Martin Kroeker 03f1354336
Merge pull request #3422 from martin-frbg/issue3421
Revert invalid trsv shortcut from PR #3252
2021-10-25 23:37:28 +02:00
Martin Kroeker 4b3769823a
Revert #3252 2021-10-24 23:57:06 +02:00
Martin Kroeker 059d3a04c1
Merge pull request #3420 from martin-frbg/issue3419
Revert wrong ZTRSV optimization from #3252
2021-10-20 12:00:06 +02:00
Martin Kroeker 2845f54eb8
Remove dangerous optimization from previous #3252 - buffer is never unused here 2021-10-20 10:50:02 +02:00
Martin Kroeker c6208bbb45
Merge pull request #3418 from martin-frbg/issue2927-2
Enable SVE for A64FX
2021-10-20 08:23:53 +02:00
Martin Kroeker 6975cbe1f0
Enable SVE for A64FX 2021-10-19 23:23:40 +02:00
Martin Kroeker 22bf5c27ba
Add basic support for the Fujitsu A64FX (#3415)
* Add initial support for Fujitsu A64FX as generic ARMV8
2021-10-18 15:00:19 +02:00
Martin Kroeker 8cbf61792d
Merge pull request #3416 from guowangy/spr-bf16
sbgemm: add AMX-BF16 based kernel for Sapphire Rapids
2021-10-18 14:59:21 +02:00
Wangyang Guo 63a103ba6e sbgemm: spr: disable small matrix path by default 2021-10-17 19:08:03 -07:00
Wangyang Guo 82194ea9d2 sbgemm: spr: implement otcopy_16 2021-10-17 19:08:03 -07:00
Wangyang Guo 8632380a96 sbgemm: spr: reuse ncopy_16 from cooperlake as incopy 2021-10-17 19:08:03 -07:00
Wangyang Guo 6bc8204ce5 sbgemm: spr: optimization for tmp_c buffer 2021-10-17 19:08:03 -07:00
Wangyang Guo f018aa342a sbgemm: spr: kernel handle alpha != 1.0 2021-10-17 19:08:03 -07:00
Wangyang Guo a52456b168 sbgemm: spr: oncopy: use tile load/store instead 2021-10-17 19:08:03 -07:00