Rajalakshmi Srinivasaraghavan
|
b62173c5a0
|
POWER10: Changing store instructions for Level1 functions
This patch changes 32 bytes stores to two 16 bytes stores
to fix a recent degradation due to 32 bytes stores.
|
2022-05-12 11:17:33 -05:00 |
kavanabhat
|
fe3c778c51
|
AIX changes for P10 with GNU Compiler
|
2021-09-30 06:06:27 -05:00 |
Rajalakshmi Srinivasaraghavan
|
2dbcddd83d
|
POWER10: Adding check for little endian
This patch makes sure that recent POWER10 patches are used
only for little endian.
|
2021-03-31 21:32:42 -05:00 |
Rajalakshmi Srinivasaraghavan
|
601b711c78
|
Optimize swap function for POWER10
This patch makes use of new POWER10 vector pair instructions for
loads and stores.
|
2021-01-08 08:01:36 -06:00 |
Martin Kroeker
|
661c6bfa5a
|
Exclude altivec code paths if the compiler does not support them
|
2020-07-23 17:08:20 +02:00 |
Rajalakshmi Srinivasaraghavan
|
9fe930f205
|
powerpc: Add support for future processor
This is the initial patch to support build infrastructure
for POWER10 architecture.
|
2020-06-11 15:47:20 -05:00 |
AbdelRauf
|
853a18bc17
|
power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself
|
2019-03-29 15:49:40 +00:00 |
Werner Saar
|
3d9a50e841
|
added optimized sswap kernel for POWER8
|
2016-03-25 17:34:55 +01:00 |