3518617f5b
Add Intel Goldmont+ cpuid
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was originally in #2228 but that PR had misplaced the file in the toplevel directory
2019-12-03 08:32:29 +01:00
f95989cbc1
Fix AVX512 capability test (always returning zero)
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from #2322
2019-11-23 22:38:07 +01:00
3d36c45116
Add CPUID identification of Intel Ice Lake
2019-08-01 22:52:35 +02:00
3ce28fb81a
Merge pull request #2055 from martin-frbg/atomid
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Add CPUID data for Intel Denverton (as Nehalem)
2019-03-12 22:57:07 +01:00
04f2226ea6
Add Intel Denverton
2019-03-12 16:09:55 +01:00
11cfd0bd75
Do not compile in AVX512 check if AVX support is disabled
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xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway
2019-03-05 16:04:25 +01:00
29dc72889f
Add support for Hygon Dhyana
2019-01-16 14:25:19 +08:00
dbc9a060ef
Fix missing braces in support_av() call
2019-01-14 22:41:31 +01:00
31ed19e8b9
Add message for SkylakeX and KNL fallbacks to Haswell
2019-01-05 19:41:13 +01:00
e1574fa2b4
Add xcr0 (os support) check
2019-01-05 18:08:02 +01:00
ae1d1f74f7
Query AVX2 and AVX512 capability for runtime cpu selection
2019-01-05 16:55:33 +01:00
504310eeb9
Merge pull request #1665 from martin-frbg/cpuid-ryzen2
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Add cpuid for AMD Ryzen 2
2018-07-04 08:19:40 +02:00
d0ec4325cf
Add cpuid for AMD Ryzen 2
2018-07-03 21:03:24 +02:00
9d15a3bd16
Fix typo that broke compilation with DYNAMIC_ARCH and NO_AVX2
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fixes 1659
2018-07-02 14:40:41 +02:00
750162a05f
Try gradual fallback for cores not in the dynamic core list
2018-06-25 21:02:31 +02:00
1833a67071
Add support for a user-defined list of dynamic targets
2018-06-23 19:42:15 +02:00
63f7395fb4
Move some DYNAMIC_ARCH targets to new DYNAMIC_OLDER option
2018-06-09 16:31:38 +02:00
38ad05bd04
Extend loop range to find SkylakeX in force_coretype
2018-06-05 10:26:49 +02:00
8be027e4c6
Update dynamic.c
2018-06-04 14:36:39 +02:00
ac7b6e3e9a
Fix misplaced endif
2018-06-04 08:23:40 +02:00
ef626c6824
typo fix
2018-06-04 00:13:19 +02:00
5a51cf4576
Separate Skylake X from Skylake
2018-06-03 23:41:33 +02:00
99c7bba8e4
Initial support for SkylakeX / AVX512
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This patch adds the basic infrastructure for adding the SkylakeX (Intel Skylake server)
target. The SkylakeX target will use the AVX512 (AVX512VL level) instruction set,
which brings 2 basic things:
1) 512 bit wide SIMD (2x width of AVX2)
2) 32 SIMD registers (2x the number on AVX2)
This initial patch only contains a trivial transofrmation of the Haswell SGEMM kernel
to AVX512VL; more will follow later but this patch aims to get the infrastructure
in place for this "later".
Full performance tuning has not been done yet; with more registers and wider SIMD
it's in theory possible to retune the kernels but even without that there's an
interesting enough performance increase (30-40% range) with just this change.
2018-06-03 07:58:52 +00:00
2f12ea017b
No strncasecmp with MSVC
2017-08-08 00:07:25 +05:30
9c884986ad
Add an extra familiy/model combination used by AMD Steamrolller (Godavari).
2017-04-19 19:15:47 +02:00
0cbd2d34e4
Recognize ZEN when passed as OPENBLAS_CORETYPE.
2017-04-10 20:05:16 +02:00
62979fd104
Fix dynamic detection for ZEN CPUs.
2017-04-10 19:08:37 +02:00
c9ff735da6
Add ZEN support (tested for auto-detected static backend)
2017-03-19 15:32:50 +01:00
5088523786
detect apollo lake for real
2017-02-20 23:54:59 +01:00
1d8ab99e09
Add `exfamily == 9` case (Kaby Lake) to dynamic arch detection
2017-02-10 15:23:55 -08:00
76c6e33e54
Enable EXCAVATOR kernels for A12-9800
2017-02-07 21:38:28 +01:00
596ead0f8d
Add files via upload
2016-11-06 23:26:39 +01:00
8a8f3932eb
Update dynamic.c
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Add Bay Trail "Pentium N3520" atom
2016-10-16 22:40:00 +02:00
7de829f713
Update dynamic.c
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Add Braswell (extended model 4, model 12) N3150 as Nehalem
2016-07-14 12:22:55 +02:00
2b967590a0
bugfix in dynamic.c
2016-04-25 09:08:38 +02:00
1edf30b790
Change Opteron(SSE3) to Opteron_SSE3 at dyanmaic core name.
2016-03-01 20:13:08 +08:00
935356c34f
Update dynamic.c and cpuid_x86.c for Intel Avoton.
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Second part of "support Intel Avoton via Nehalem kernel"
2016-02-02 13:42:55 -05:00
839395fc25
Detect AMD Trinity and Richland.
2015-10-29 02:53:29 +08:00
cc7cab8a45
Detect other Intel Skylake cores.
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http://users.atw.hu/instlatx64/
2015-09-09 10:47:17 -05:00
61ae47eb99
Ref #632 . Support Intel Skylake by Haswell kernels.
2015-09-09 11:07:33 -04:00
51ff17d46e
Add AMD Excavator target.
2015-05-13 16:16:30 -05:00
8977b3f235
Refs #529 . Support Intel Broadwell by Haswell kernels.
2015-04-02 11:08:03 -05:00
e95d64333a
Refs #519 . Avoid calling strncpy.
2015-03-19 15:57:22 -05:00
0dc559ed30
bugfix in dynamic.c
2014-12-28 17:15:42 +01:00
4319769b79
added target processor STEAMROLLER
2014-12-28 20:16:46 +08:00
c94762bb56
Refs #401 . Added NO_AVX2 flag for old binutils (e.g. RHEL6)
2014-07-16 08:38:25 +08:00
6c2ead30f0
Remove all trailing whitespace except lapack-netlib
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Signed-off-by: Timothy Gu <timothygu99@gmail.com>
2014-06-27 12:05:18 -07:00
53bfa51ee0
Ref #385 : fixed warnings in dynamic.c
2014-06-12 18:17:08 +02:00
a86d349a51
Ref #380 : enhancements for dynamic_arch
2014-06-12 14:20:03 +02:00
8c7687b419
Refs #338 . Added OPENBLAS_VERBOSE environment variable on runtime
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By default, OpenBLAS doesn't output the warning message. You can set
OPENBLAS_VERBOSE (e.g. export OPENBLAS_VERBOSE=1) to enable the warning
message on runtime.
2014-01-24 02:05:59 +08:00
Martin Kroeker
caiyu
Arjan van de Ven
Isuru Fernando
Gian-Carlo Pascutto
Gian-Carlo Pascutto
Denis Steckelmacher
Andrew
Elliot Saba
Martin Koehler
Werner Saar
Zhang Xianyi
Yichao Yu
Timothy Gu