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234 Commits

Author SHA1 Message Date
Bine Brank 39ab219704 sve copy functions for cgemm chemm zsymm 2022-01-05 09:12:22 +01:00
Martin Kroeker 697e2752d7
Merge pull request #3464 from binebrank/arm_sve_sgemm 
Add sgemm part for Arm SVE
 2021-12-11 20:35:22 +01:00
Bine Brank a8f62a347b fix UNROLL_MN and add to targets for SVE 2021-12-11 16:37:23 +01:00
Martin Kroeker f7f7fea0dc
Merge pull request #3472 from kavanabhat/p10_aixas_p8 
Fallback for Power kernels
 2021-12-09 07:28:57 +01:00
kavanabhat eee3381cbe Fallback for Power kernels 2021-12-08 03:52:23 -06:00
Martin Kroeker dd1f645371
switch DGEMM unroll parameters for SkylakeX if DYNAMIC_ARCH 2021-12-06 19:42:51 +01:00
Bine Brank 86ae89bf33 add sgemm kernel and copy functions for sgemm and ssymm 2021-11-28 18:12:47 +01:00
Martin Kroeker 454edd741c
Merge pull request #3425 from binebrank/arm_sve_dgemm 
Add dgemm kernel for arm64 SVE
 2021-11-26 16:14:55 +01:00
Bine Brank f4da23dcb6 reduced dgemm_unroll_m to work with 128-bit sve 2021-11-23 21:18:08 +01:00
Bine Brank 9388f05a3c configure SVE Makefile 2021-11-21 18:33:43 +01:00
Martin Kroeker 52a3f004a0
Fix unintended reversion of recent CortexA53 changes 2021-11-20 23:54:48 +01:00
Martin Kroeker 19ccef5fb1
Add generic MIPS32 target 2021-11-20 17:31:11 +01:00
Jia-Chen 302f22693a MOD: optimize normal DGEMM on ARMV8 cortex-A53 & cortex-A55 2021-11-18 21:14:43 +08:00
Martin Kroeker 46947efb83
Ignore compiler support for MIPS MSA if the cpu lacks this capability 2021-11-13 23:32:26 +01:00
Bine Brank ab7917910d add v2x8 kernel + fix sve dtrmm 2021-11-07 20:37:51 +01:00
Bine Brank 7093372e32 add ARMV8SVE target 2021-11-01 22:53:21 +01:00
Wangyang Guo 7b2f5cb3b7 sbgemm: spr: enlarge P to 256 for performance 2021-10-17 19:08:03 -07:00
Wangyang Guo 0abbcd19c1 sbgemm: spr: tuning for blocking params 2021-10-17 19:08:03 -07:00
Wangyang Guo 3dc6052c7e initial support for Sapphire Rapids platform 2021-10-12 01:30:40 -07:00
Martin Kroeker 24233b7c49
Use "big arm server" GEMM defaults for Vortex 2021-10-06 11:10:19 +02:00
kavanabhat fe3c778c51 AIX changes for P10 with GNU Compiler 2021-09-30 06:06:27 -05:00
Wangyang Guo 8356a604f0 sbgemm: cooperlake: tuning for block params 2021-09-07 21:30:46 +08:00
Niyas Sait 7cddbf99b1 Make explicit conversion condition on _WIN64 flag 2021-08-31 14:36:44 +01:00
Niyas Sait d1ed72fa87 [win/arm64]: Explicit casting for GMEMM_DEFAULT_ALIGN to create 64-bit value 
Win64 uses LLP64 datamodel and unsigned long is only 32-bit. For 64-bit
architecture we need 64-bit mask to correctly generate address
 2021-08-31 11:56:10 +01:00
gxw af0a69f355 Add support for LOONGARCH64 2021-07-27 15:29:12 +08:00
Martin Kroeker a6351e32f0
Remove BLASLONG casts from SPARC entries 
in response to https://github.com/xianyi/OpenBLAS/pull/3266#issuecomment-878637675
 2021-07-14 21:09:36 +02:00
User User-User b7da75e4fd WiP CORTEX A55 support 2021-06-19 21:37:51 +02:00
Martin Kroeker 7dfc45e840
Remove casts for PPC/POWER and complete parameters for POWER3/4 2021-06-10 11:09:50 +02:00
Gordon Fossum 198adea961 Changed default P/Q values for CGEMM and ZGEMM (Power10 only) 2021-03-19 10:05:23 -04:00
Martin Kroeker 8cdf0825de
Add workaround for older gcc on ppc64be not supporting casts in defines 2021-03-16 21:20:05 +01:00
Martin Kroeker ecb4babcf4
remove inclusion of common.h again to avoid circular dependency 2021-03-14 17:36:51 +01:00
Martin Kroeker 30d835168a
Merge pull request #3088 from xoviat/msvc 
add misc fixes.
 2021-03-14 17:14:28 +01:00
austinpagan 9579bd47e5 Modifying a couple paramaters in the "POWER10"-specific section of param.h, for performance enhancements for SGEMM and DGEMM. 2021-03-10 18:19:12 -05:00
Rajalakshmi Srinivasaraghavan 63fa6c832e Fix build issue on POWER8 with DYNAMIC_ARCH 
Running make DYNAMIC_ARCH=1 on POWER 8 BE with gcc10.2 version, gives
the following error due to the difference in UNROLL_M/N.
'No rule to make target 'dgemm_incopy_POWER10.o', needed by kernel'
 2021-02-11 21:28:03 -06:00
xoviat 457ccc42c9
Merge branch 'develop' into msvc 2021-01-27 14:15:59 -06:00
Gordon Fossum ed652d8136 Added definitions for GEMM_PREFERED_SIZE and SWITCH_RATIO to the POWER9 and POWER10 specific sections of param.h. 2021-01-11 21:13:53 -05:00
Martin Kroeker 83de62c20d
Merge pull request #3026 from martin-frbg/revert747 
Revert PR747 - SYRK parameter changes for Haswell and related targets
 2020-12-10 16:29:41 +01:00
gxw 4b548857d6 Add msa support for loongson 
1. Using core loongson3r3 and loongson3r4 for loongson
2. Add DYNAMIC_ARCH for loongson

Change-Id: I1c6b54dbeca3a0cc31d1222af36a7e9bd6ab54c1
 2020-12-09 10:28:46 +08:00
Martin Kroeker d71fe4ed4e
Remove GEMM_DEFAULT_UNROLL_MN parameters for Haswell and ZEN (introduced in PR747) 2020-12-08 21:07:57 +01:00
Martin Kroeker b0b14f4e9b
Change comments to C style for compatibility 2020-12-06 19:12:02 +01:00
Rajalakshmi Srinivasaraghavan 41fe6e864e POWER10: Update param.h 
Increasing the values of DGEMM_DEFAULT_P and DGEMM_DEFAULT_Q helps
in improving performance ~10% for DGEMM.
 2020-12-03 14:40:11 -06:00
Xianyi Zhang fc35b72ae1 Refs #2899 
Merge branch 'openblas-open-910' of git://github.com/damonyu1989/OpenBLAS into damonyu1989-openblas-open-910
 2020-11-10 09:38:04 +08:00
Xianyi Zhang 913cc9a4ca Merge branch 'develop' into risc-v 2020-11-10 09:18:25 +08:00
Rajalakshmi Srinivasaraghavan dd7a9cc5bf POWER10: Change dgemm unroll factors 
Changing the unroll factors for dgemm to 8 shows improved performance with
POWER10 MMA feature.   Also made some minor changes in sgemm for edge cases.
 2020-10-31 18:28:57 -05:00
Zhang Xianyi d7ba7679b6 Merge branch 'develop' into risc-v 2020-10-16 23:27:38 +08:00
damonyu ef8e7d0279 Add the support for RISC-V Vector. 
Change-Id: Iae7800a32f5af3903c330882cdf6f292d885f266
 2020-10-15 16:09:02 +08:00
Martin Kroeker ca31c32693
Rename "HALF" and "sh" to "BFLOAT16" and "sb" 2020-10-11 23:49:22 +02:00
Chen, Guobing e740c4873d Enable COOPERLAKE build target 
Enable new build target platform -- COOPERLAKE. This target platform
supports all the SKYLAKEX supported ISAs + avx512bf16. So all the
SKYLAKEX specific kernels/drivers and related code are now extended
to be also active on COOPERLAKE. Besides, new BF16 related kernels
are active under this target.
 2020-08-13 06:18:00 +08:00
Marius Hillenbrand e115c97e05 s390x/SGEMM: adjust default P and Q to multiples of M 
We recently changed the register blocking for SGEMM on s390x to 16x4.
However, we did not adjust Q to a multiple of 16 and thus fell back to
the 8x4 kernel at each block's margin, without need. Adjust P and Q to
multiples of 16 to employ the faster 16x4 kernel for complete full-sized
blocks.

Signed-off-by: Marius Hillenbrand <mhillen@linux.ibm.com>
 2020-08-11 12:56:46 +02:00
Ashwin Sekhar T K 4e1be0e481 ARM64: Add THUNDERX3T110 Target 2020-07-26 23:32:24 -07:00