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32 Commits

Author SHA1 Message Date
Zhang Xianyi
51ff17d46e Add AMD Excavator target. 2015-05-13 16:16:30 -05:00
Zhang Xianyi
c674fa32be Add ARM targets. 2015-03-24 12:17:04 -05:00
Zhang Xianyi
229ce2ccd1 Add cortex-a9 and cortex-a15 targets. 2015-01-12 08:55:29 +00:00
Werner Saar
4319769b79 added target processor STEAMROLLER 2014-12-28 20:16:46 +08:00
Zhang Xianyi
2fb02626da Update organization info. 2014-11-25 15:28:58 +08:00
Benedikt Huber
58c90d5937 # The first commit's message is: 
Optimizations for APM's xgene-1 (aarch64).

1) general system updates to support armv8 better.  Make all did not work, one needed to supply TARGET=ARMV8.
2) sgem 4x4 kernel in assembler using SIMD, and configuration changes to use it.
3) strmm 4x4 kernel in C.  Since the sgem kernel does 4x4, the trmm kernel must also do 4xN.

Added Dave Nuechterlein to the contributors list.
 2014-11-11 22:19:23 +08:00
Zhang Xianyi
552119c484 Fixed #407. Support outputing the CPU corename on runtime. 
The user can use char * openblas_get_config() or char * openblas_get_corename().
 2014-07-08 12:48:08 +08:00
Timothy Gu
6c2ead30f0 Remove all trailing whitespace except lapack-netlib 
Signed-off-by: Timothy Gu <timothygu99@gmail.com>
 2014-06-27 12:05:18 -07:00
wernsaar
43fbdb7a5a added ARMV5 as reference platform 2014-05-13 17:25:19 +02:00
wernsaar
b3254eecaf Merge remote branch 'origin/haswell' into develop 2013-12-01 18:09:12 +01:00
wernsaar
d13aa79d26 modified getarch.c 2013-12-01 17:31:22 +01:00
Zhang Xianyi
2638370844 Init code base for Intel Haswell. 2013-08-13 00:54:59 +08:00
Zhang Xianyi
673e453b3f Enable bulldozer kernels. 2013-08-05 16:07:54 +08:00
Zhang Xianyi
5b504d6c23 Refs #263. Rollback bulldozer and piledriver kernels to barcelona kernels. 2013-07-28 17:39:24 +08:00
Zhang Xianyi
fbb75e58b1 Fixed the typo in getarch.c 2013-07-09 16:26:59 +08:00
Zhang Xianyi
f54f5bac9e Refs #248. Fixed the LSB compatiable issue for BLAS only. 
For example, make CC=lsbcc NO_LAPACK=1.
 2013-07-09 15:38:03 +08:00
Zhang Xianyi
886cbaf4e4 Support AMD Piledriver by bulldozer kernels. 2013-07-06 12:06:43 -03:00
Zhang Xianyi
48bdc1ad3b Added NO_PARALLEL_MAKE flag to disable parallel make. 2013-04-15 21:37:30 +08:00
Explorer09
53588bc786 getarch.c: Minor re-ordering of architecture list 2013-03-17 23:09:23 +08:00
Explorer09
b47f13ee4c getarch.c: Minor re-ordering of architecture list 2013-03-17 23:07:48 +08:00
Zhang Xianyi
bfaaa975e6 Added BULLDOZER target. So far it uses barcelona kernels. 2012-12-07 00:53:31 +08:00
Zhang Xianyi
b7c0fa6bd2 Init AMD Bulldozer codebase. 2012-12-06 07:29:54 -05:00
Xianyi Zhang
0a958b6a02 Refs #118. Detect AMD Bulldozer as Barcelona. 2012-06-25 17:28:49 +08:00
Zhang Xianyi
d3b67d0bd8 Refs #113. Fixed the typo BOBCATE -> BOBCAT 2012-05-31 22:40:15 +08:00
Zhang Xianyi
d6cab3f37e Refs #113. Support AMD Bobcate using Barcelona kernel codes. Replace 3DNow! with MMX. 2012-05-31 18:17:45 +08:00
Xianyi Zhang
19a48b82cf Init Sandybridge codes based on Nehalem. 2012-03-30 20:01:03 +08:00
Xianyi Zhang
b95ad4cfaf Support detecting ICT Loongson-3B CPU. 2011-11-09 19:29:50 +00:00
traits
9fc6764fa7 refs #55. Added DTB_ENTRIES into dynamic arch setting parameters. Now, it can read DTB_ENTRIES on runtime. 2011-09-05 17:37:07 +08:00
Xianyi Zhang
ff6ae89d3e Fixed #19. Provided an error msg when the arch is not supported. 2011-04-22 20:21:42 +08:00
Xianyi Zhang
46ce7270d9 fixed a typo. 2011-01-25 15:55:56 +08:00
Xianyi Zhang
0597c1076f Added the configures of loongson 3a. refs #1 2011-01-24 22:45:35 +00:00
Xianyi Zhang
342bbc3871 Import GotoBLAS2 1.13 BSD version codes. 2011-01-24 14:54:24 +00:00