Merge pull request #2565 from martin-frbg/mips24k
Support MIPS32 24K family as P5600
This commit is contained in:
commit
fa42588e1f
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@ -17,7 +17,11 @@ ifdef CPUIDEMU
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EXFLAGS = -DCPUIDEMU -DVENDOR=99
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EXFLAGS = -DCPUIDEMU -DVENDOR=99
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endif
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endif
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ifeq ($(TARGET), 1004K)
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ifeq ($(TARGET), MIPS24K)
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TARGET_FLAGS = -mips32r2
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endif
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ifeq ($(TARGET), MIPS1004K)
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TARGET_FLAGS = -mips32r2
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TARGET_FLAGS = -mips32r2
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endif
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endif
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@ -690,7 +690,12 @@ CCOMMON_OPT += -march=mips64
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FCOMMON_OPT += -march=mips64
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FCOMMON_OPT += -march=mips64
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endif
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endif
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ifeq ($(CORE), 1004K)
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ifeq ($(CORE), MIPS24K)
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CCOMMON_OPT += -mips32r2 -mtune=24kc $(MSA_FLAGS)
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FCOMMON_OPT += -mips32r2 -mtune=24kc $(MSA_FLAGS)
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endif
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ifeq ($(CORE), MIPS1004K)
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CCOMMON_OPT += -mips32r2 $(MSA_FLAGS)
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CCOMMON_OPT += -mips32r2 $(MSA_FLAGS)
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FCOMMON_OPT += -mips32r2 $(MSA_FLAGS)
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FCOMMON_OPT += -mips32r2 $(MSA_FLAGS)
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endif
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endif
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@ -122,6 +122,11 @@ Please read `GotoBLAS_01Readme.txt` for older CPU models already supported by th
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- **AMD STEAMROLLER**: Uses Bulldozer codes with some optimizations.
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- **AMD STEAMROLLER**: Uses Bulldozer codes with some optimizations.
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- **AMD ZEN**: Uses Haswell codes with some optimizations.
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- **AMD ZEN**: Uses Haswell codes with some optimizations.
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#### MIPS32
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- **MIPS 1004K**: uses P5600 codes
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- **MIPS 24K**: uses P5600 codes
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#### MIPS64
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#### MIPS64
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- **ICT Loongson 3A**: Optimized Level-3 BLAS and the part of Level-1,2.
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- **ICT Loongson 3A**: Optimized Level-3 BLAS and the part of Level-1,2.
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@ -58,7 +58,8 @@ CELL
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3.MIPS CPU:
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3.MIPS CPU:
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P5600
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P5600
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1004K
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MIPS1004K
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MIPS24K
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4.MIPS64 CPU:
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4.MIPS64 CPU:
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SICORTEX
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SICORTEX
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@ -43,6 +43,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#ifndef ASSEMBLER
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#ifndef ASSEMBLER
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#if !defined(MIPS24K)
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static inline unsigned int rpcc(void){
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static inline unsigned int rpcc(void){
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unsigned long ret;
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unsigned long ret;
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@ -53,6 +54,7 @@ static inline unsigned int rpcc(void){
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return ret;
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return ret;
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}
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}
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#define RPCC_DEFINED
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#define RPCC_DEFINED
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#endif
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static inline int blas_quickdivide(blasint x, blasint y){
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static inline int blas_quickdivide(blasint x, blasint y){
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return x / y;
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return x / y;
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22
cpuid_mips.c
22
cpuid_mips.c
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@ -73,11 +73,13 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#define CPU_UNKNOWN 0
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#define CPU_UNKNOWN 0
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#define CPU_P5600 1
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#define CPU_P5600 1
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#define CPU_1004K 2
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#define CPU_1004K 2
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#define CPU_24K 3
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static char *cpuname[] = {
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static char *cpuname[] = {
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"UNKNOWN",
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"UNKNOWN",
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"P5600",
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"P5600",
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"1004K"
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"MIPS1004K",
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"MIPS24K"
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};
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};
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int detect(void){
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int detect(void){
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@ -105,6 +107,8 @@ int detect(void){
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return CPU_P5600;
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return CPU_P5600;
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} else if (strstr(p, "1004K")) {
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} else if (strstr(p, "1004K")) {
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return CPU_1004K;
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return CPU_1004K;
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} else if (strstr(p, " 24K")) {
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return CPU_24K;
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} else
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} else
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return CPU_UNKNOWN;
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return CPU_UNKNOWN;
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}
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}
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@ -121,7 +125,7 @@ void get_architecture(void){
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}
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}
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void get_subarchitecture(void){
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void get_subarchitecture(void){
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if(detect()==CPU_P5600|| detect()==CPU_1004K){
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if(detect()==CPU_P5600|| detect()==CPU_1004K|| detect()==CPU_24K){
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printf("P5600");
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printf("P5600");
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}else{
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}else{
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printf("UNKNOWN");
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printf("UNKNOWN");
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@ -146,7 +150,15 @@ void get_cpuconfig(void){
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printf("#define MIPS1004K\n");
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printf("#define MIPS1004K\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 32\n");
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printf("#define L1_DATA_LINESIZE 32\n");
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printf("#define L2_SIZE 26144\n");
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printf("#define L2_SIZE 262144\n");
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printf("#define DTB_DEFAULT_ENTRIES 8\n");
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printf("#define DTB_SIZE 4096\n");
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printf("#define L2_ASSOCIATIVE 4\n");
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} else if (detect()==CPU_24K) {
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printf("#define MIPS24K\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 32\n");
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printf("#define L2_SIZE 32768\n");
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printf("#define DTB_DEFAULT_ENTRIES 8\n");
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printf("#define DTB_DEFAULT_ENTRIES 8\n");
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printf("#define DTB_SIZE 4096\n");
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printf("#define DTB_SIZE 4096\n");
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printf("#define L2_ASSOCIATIVE 4\n");
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printf("#define L2_ASSOCIATIVE 4\n");
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@ -159,7 +171,9 @@ void get_libname(void){
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if(detect()==CPU_P5600) {
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if(detect()==CPU_P5600) {
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printf("p5600\n");
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printf("p5600\n");
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} else if (detect()==CPU_1004K) {
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} else if (detect()==CPU_1004K) {
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printf("1004K\n");
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printf("mips1004K\n");
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} else if (detect()==CPU_24K) {
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printf("mips24K\n");
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}else{
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}else{
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printf("mips\n");
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printf("mips\n");
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}
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}
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28
getarch.c
28
getarch.c
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@ -812,6 +812,34 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#else
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#else
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#endif
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#endif
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#ifdef FORCE_MIPS1004K
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#define FORCE
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#define ARCHITECTURE "MIPS"
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#define SUBARCHITECTURE "MIPS1004K"
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#define SUBDIRNAME "mips"
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#define ARCHCONFIG "-DMIPS1004K " \
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"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
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"-DL2_SIZE=262144 -DL2_LINESIZE=32 " \
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"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=8 "
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#define LIBNAME "mips1004K"
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#define CORENAME "MIPS1004K"
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#else
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#endif
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#ifdef FORCE_MIPS24K
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#define FORCE
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#define ARCHITECTURE "MIPS"
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#define SUBARCHITECTURE "MIPS24K"
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#define SUBDIRNAME "mips"
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#define ARCHCONFIG "-DMIPS24K " \
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"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
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"-DL2_SIZE=32768 -DL2_LINESIZE=32 " \
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"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=8 "
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#define LIBNAME "mips24K"
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#define CORENAME "MIPS24K"
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#else
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#endif
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#ifdef FORCE_I6500
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#ifdef FORCE_I6500
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#define FORCE
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#define FORCE
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#define ARCHITECTURE "MIPS"
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#define ARCHITECTURE "MIPS"
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@ -0,0 +1 @@
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include $(KERNELDIR)/KERNEL.P5600
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2
param.h
2
param.h
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#define SYMV_P 16
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#define SYMV_P 16
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#endif
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#endif
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#if defined(P5600) || defined(MIPS1004K) || defined(I6400) || defined(P6600) || defined(I6500)
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#if defined(P5600) || defined(MIPS1004K) || defined(MIPS24K) || defined(I6400) || defined(P6600) || defined(I6500)
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#define SNUMOPT 2
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#define SNUMOPT 2
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#define DNUMOPT 2
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#define DNUMOPT 2
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