LoongArch: Small matrix opt
This commit is contained in:
gxw
parent
1e49771660
commit
f077419652
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@ -269,6 +269,7 @@ else ifeq ($(ARCH), power)
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SMALL_MATRIX_OPT = 1
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BUILD_BFLOAT16 = 1
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endif
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SMALL_MATRIX_OPT = 1
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ifeq ($(SMALL_MATRIX_OPT), 1)
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CCOMMON_OPT += -DSMALL_MATRIX_OPT
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endif
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@ -162,4 +162,8 @@ STRSMKERNEL_LN = ../generic/trsm_kernel_LN.c
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STRSMKERNEL_LT = ../generic/trsm_kernel_LT.c
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STRSMKERNEL_RN = ../generic/trsm_kernel_RN.c
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STRSMKERNEL_RT = ../generic/trsm_kernel_RT.c
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DGEMM_SMALL_M_PERMIT = dgemm_small_matrix_permit.c
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DGEMM_SMALL_K_NN = dgemm_small_kernel_nn_lasx.S
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DGEMM_SMALL_K_B0_NN = dgemm_small_kernel_nn_lasx.S
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endif
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@ -0,0 +1,549 @@
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/***************************************************************************
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Copyright (c) 2023, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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3. Neither the name of the OpenBLAS project nor the names of
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its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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#define ASSEMBLER
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#include "common.h"
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#include "loongarch64_asm.S"
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#define M $a0
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#define N $a1
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#define K $a2
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#define A $a3
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#define LDA $a4
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#define ALPHA $f0
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#define B $a5
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#define LDB $a6
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#define C $a7
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#define LDC $t0
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#ifdef B0
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#define BETA $f1
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#endif
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#undef ZERO
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#define ZERO $r0
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#define M16 $t1
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#define M8 $t1
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#define M4 $t1
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#define M2 $t1
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#define M1 $t1
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#define N4 $t2
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#define N2 $t2
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#define N1 $t2
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#define K8 $t3
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#define A0 $t4
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#define X0 $t5
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#define B1 $t6
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#define B2 $t7
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#define B3 $t8
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#define C0 $s0
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#define C1 $s1
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#define C2 $s2
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#define C3 $s3
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#define K1 $s4
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#define VALPHA $xr0
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#ifndef B0
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#define VBETA $xr1
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#endif
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#define D0 $xr2
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#define D1 $xr3
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#define D2 $xr4
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#define D3 $xr5
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#define D4 $xr6
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#define D5 $xr7
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#define D6 $xr8
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#define D7 $xr9
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#define D8 $xr10
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#define D9 $xr11
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#define D10 $xr12
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#define D11 $xr13
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#define D12 $xr14
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#define D13 $xr15
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#define D14 $xr16
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#define D15 $xr17
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#define S0 $xr18
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#define S1 $xr19
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#define S2 $xr20
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#define S3 $xr21
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#define Z0 $xr22
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#define Z1 $xr23
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#define Z2 $xr24
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#define Z3 $xr25
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#define V0 $vr2
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#define V1 $vr3
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#define V2 $vr4
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#define V3 $vr5
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#define F0 $f2
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#define F1 $f3
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#define F2 $f4
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#define F3 $f5
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.macro DGEMM_SMALL_KERNEL_NN_TAIL M
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PTR_SRAI N4, N, 2 // N >> 2
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move A0, A // Restore A0
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move X0, B // Restore X0
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PTR_ADD B1, X0, LDB
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PTR_ADD B2, B1, LDB
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PTR_ADD B3, B2, LDB
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move C0, C // Restore C0
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PTR_ADD C1, C0, LDC
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PTR_ADD C2, C1, LDC
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PTR_ADD C3, C2, LDC
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beqz N4, .L_M\M\()_N3
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.L_M\M\()_N4:
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GXOR xv, v, D0, D0, D0, D1, D1, D1, D2, D2, D2, D3, D3, D3
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move K1, K // Restore K1
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PTR_ADDI N4, N4, -1
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bge ZERO, K, .L_M\M\()_N4_END
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.L_M\M\()_N4_K1:
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PTR_ADDI K1, K1, -1
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GLD xv, , S0, A0, 0x00
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GLDREPL xv, d, Z0, X0, 0x00, Z1, B1, 0x00, Z2, B2, 0x00, Z3, B3, 0x00
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GMADD xvf, d, D0, S0, Z0, D0, D1, S0, Z1, D1, D2, S0, Z2, D2, D3, S0, Z3, D3
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PTR_ADDI X0, X0, 0x08
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PTR_ADDI B1, B1, 0x08
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PTR_ADDI B2, B2, 0x08
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PTR_ADDI B3, B3, 0x08
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PTR_ADD A0, A0, LDA
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bnez K1, .L_M\M\()_N4_K1
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.L_M\M\()_N4_END:
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GMUL xvf, d, D0, D0, VALPHA, D1, D1, VALPHA, D2, D2, VALPHA, D3, D3, VALPHA
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#ifndef B0
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GLD xv, , S0, C0, 0x00
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GMADD xvf, d, D0, S0, VBETA, D0
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GLD xv, , S0, C1, 0x00
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GMADD xvf, d, D1, S0, VBETA, D1
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GLD xv, , S0, C2, 0x00
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GMADD xvf, d, D2, S0, VBETA, D2
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GLD xv, , S0, C3, 0x00
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GMADD xvf, d, D3, S0, VBETA, D3
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#endif
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.if \M == 4
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GST xv, , D0, C0, 0x00, D1, C1, 0x00, D2, C2, 0x00, D3, C3, 0x00
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.elseif \M == 2
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GST v, , V0, C0, 0x00, V1, C1, 0x00, V2, C2, 0x00, V3, C3, 0x00
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.elseif \M == 1
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GST f, d, F0, C0, 0x00, F1, C1, 0x00, F2, C2, 0x00, F3, C3, 0x00
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.endif
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// Update C0, C1, C2, C3
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PTR_ALSL C0, LDC, C0, 2
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PTR_ALSL C1, LDC, C1, 2
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PTR_ALSL C2, LDC, C2, 2
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PTR_ALSL C3, LDC, C3, 2
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// Update X0, B1, B2, B3
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PTR_SUB X0, X0, K8
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PTR_SUB B1, B1, K8
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PTR_SUB B2, B2, K8
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PTR_SUB B3, B3, K8
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PTR_ALSL X0, LDB, X0, 2
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PTR_ALSL B1, LDB, B1, 2
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PTR_ALSL B2, LDB, B2, 2
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PTR_ALSL B3, LDB, B3, 2
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// Restore A0
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move A0, A
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bnez N4, .L_M\M\()_N4
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.L_M\M\()_N3:
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andi N2, N, 0x02
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beqz N2, .L_M\M\()_N1
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.L_M\M\()_N2:
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GXOR xv, v, D0, D0, D0, D1, D1, D1
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move K1, K // Restore K1
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bge ZERO, K, .L_M\M\()_N2_END
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.L_M\M\()_N2_K1:
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PTR_ADDI K1, K1, -1
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GLD xv, , S0, A0, 0x00
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GLDREPL xv, d, Z0, X0, 0x00, Z1, B1, 0x00
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GMADD xvf, d, D0, S0, Z0, D0, D1, S0, Z1, D1
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PTR_ADDI X0, X0, 0x08
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PTR_ADDI B1, B1, 0x08
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PTR_ADD A0, A0, LDA
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bnez K1, .L_M\M\()_N2_K1
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.L_M\M\()_N2_END:
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GMUL xvf, d, D0, D0, VALPHA, D1, D1, VALPHA
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#ifndef B0
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GLD xv, , S0, C0, 0x00
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GMADD xvf, d, D0, S0, VBETA, D0
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GLD xv, , S0, C1, 0x00
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GMADD xvf, d, D1, S0, VBETA, D1
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#endif
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.if \M == 4
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GST xv, , D0, C0, 0x00, D1, C1, 0x00
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.elseif \M == 2
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GST v, , V0, C0, 0x00, V1, C1, 0x00
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.elseif \M == 1
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GST f, d, F0, C0, 0x00, F1, C1, 0x00
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.endif
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// Update C0, C1
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PTR_ALSL C0, LDC, C0, 1
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PTR_ALSL C1, LDC, C1, 1
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// Update X0, B1
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PTR_SUB X0, X0, K8
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PTR_SUB B1, B1, K8
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PTR_ALSL X0, LDB, X0, 1
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PTR_ALSL B1, LDB, B1, 1
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// Restore A0
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move A0, A
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.L_M\M\()_N1:
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andi N1, N, 0x01
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beqz N1, .L_M\M\()_END
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GXOR xv, v, D0, D0, D0
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move K1, K // Restore K1
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bge ZERO, K, .L_M\M\()_N1_END
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.L_M\M\()_N1_K1:
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PTR_ADDI K1, K1, -1
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GLD xv, , S0, A0, 0x00
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GLDREPL xv, d, Z0, X0, 0x00
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GMADD xvf, d, D0, S0, Z0, D0
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PTR_ADDI X0, X0, 0x08
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PTR_ADD A0, A0, LDA
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bnez K1, .L_M\M\()_N1_K1
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.L_M\M\()_N1_END:
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GMUL xvf, d, D0, D0, VALPHA
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#ifndef B0
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GLD xv, , S0, C0, 0x00
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GMADD xvf, d, D0, S0, VBETA, D0
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#endif
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.if \M == 4
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GST xv, , D0, C0, 0x00
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.elseif \M == 2
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GST v, , V0, C0, 0x00
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.elseif \M == 1
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GST f, d, F0, C0, 0x00
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.endif
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.L_M\M\()_END:
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.if \M == 4
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PTR_ADDI A, A, 0x20
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PTR_ADDI C, C, 0x20
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.elseif \M == 2
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PTR_ADDI A, A, 0x10
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PTR_ADDI C, C, 0x10
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.elseif \M == 1
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.endif
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.endm
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PROLOGUE
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PTR_LD LDC, $sp, 0
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push_if_used 5, 2
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xvreplve0.d VALPHA, VALPHA
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#ifndef B0
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xvreplve0.d VBETA, VBETA
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#endif
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PTR_SLLI LDA, LDA, 3
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PTR_SLLI LDB, LDB, 3
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PTR_SLLI LDC, LDC, 3
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PTR_SLLI K8, K, 3
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PTR_SRAI M16, M, 4 // M >> 4
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beqz M16, .L_M15
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.L_M16:
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PTR_SRAI N4, N, 2 // N >> 2
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move A0, A // Restore A0
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move X0, B // Restore X0
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PTR_ADD B1, X0, LDB
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PTR_ADD B2, B1, LDB
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PTR_ADD B3, B2, LDB
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move C0, C // Restore C0
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PTR_ADD C1, C0, LDC
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PTR_ADD C2, C1, LDC
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PTR_ADD C3, C2, LDC
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beqz N4, .L_M16_N3
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.L_M16_N4:
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GXOR xv, v, D0, D0, D0, D1, D1, D1, D2, D2, D2, D3, D3, D3, \
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D4, D4, D4, D5, D5, D5, D6, D6, D6, D7, D7, D7, \
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D8, D8, D8, D9, D9, D9, D10, D10, D10, D11, D11, D11, \
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D12, D12, D12, D13, D13, D13, D14, D14, D14, D15, D15, D15
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move K1, K // Restore K1
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PTR_ADDI N4, N4, -1
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bge ZERO, K, .L_M16_N4_END
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.L_M16_N4_K1:
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PTR_ADDI K1, K1, -1
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GLD xv, , S0, A0, 0x00, S1, A0, 0x20, S2, A0, 0x40, S3, A0, 0x60
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GLDREPL xv, d, Z0, X0, 0x00, Z1, B1, 0x00, Z2, B2, 0x00, Z3, B3, 0x00
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GMADD xvf, d, D0, S0, Z0, D0, D1, S1, Z0, D1, D2, S2, Z0, D2, D3, S3, Z0, D3, \
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D4, S0, Z1, D4, D5, S1, Z1, D5, D6, S2, Z1, D6, D7, S3, Z1, D7, \
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D8, S0, Z2, D8, D9, S1, Z2, D9, D10, S2, Z2, D10, D11, S3, Z2, D11, \
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D12, S0, Z3, D12, D13, S1, Z3, D13, D14, S2, Z3, D14, D15, S3, Z3, D15
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PTR_ADDI X0, X0, 0x08
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PTR_ADDI B1, B1, 0x08
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PTR_ADDI B2, B2, 0x08
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PTR_ADDI B3, B3, 0x08
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PTR_ADD A0, A0, LDA
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bnez K1, .L_M16_N4_K1
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.L_M16_N4_END:
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GMUL xvf, d, D0, D0, VALPHA, D1, D1, VALPHA, D2, D2, VALPHA, D3, D3, VALPHA, \
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D4, D4, VALPHA, D5, D5, VALPHA, D6, D6, VALPHA, D7, D7, VALPHA, \
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D8, D8, VALPHA, D9, D9, VALPHA, D10, D10, VALPHA, D11, D11, VALPHA, \
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D12, D12, VALPHA, D13, D13, VALPHA, D14, D14, VALPHA, D15, D15, VALPHA
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#ifndef B0
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GLD xv, , S0, C0, 0x00, S1, C0, 0x20, S2, C0, 0x40, S3, C0, 0x60
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GMADD xvf, d, D0, S0, VBETA, D0, D1, S1, VBETA, D1, D2, S2, VBETA, D2, D3, S3, VBETA, D3
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GLD xv, , S0, C1, 0x00, S1, C1, 0x20, S2, C1, 0x40, S3, C1, 0x60
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GMADD xvf, d, D4, S0, VBETA, D4, D5, S1, VBETA, D5, D6, S2, VBETA, D6, D7, S3, VBETA, D7
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GLD xv, , S0, C2, 0x00, S1, C2, 0x20, S2, C2, 0x40, S3, C2, 0x60
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GMADD xvf, d, D8, S0, VBETA, D8, D9, S1, VBETA, D9, D10, S2, VBETA, D10, D11, S3, VBETA, D11
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GLD xv, , S0, C3, 0x00, S1, C3, 0x20, S2, C3, 0x40, S3, C3, 0x60
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GMADD xvf, d, D12, S0, VBETA, D12, D13, S1, VBETA, D13, D14, S2, VBETA, D14, D15, S3, VBETA, D15
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#endif
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GST xv, , D12, C3, 0x00, D13, C3, 0x20, D14, C3, 0x40, D15, C3, 0x60, \
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D8, C2, 0x00, D9, C2, 0x20, D10, C2, 0x40, D11, C2, 0x60, \
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D4, C1, 0x00, D5, C1, 0x20, D6, C1, 0x40, D7, C1, 0x60, \
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D0, C0, 0x00, D1, C0, 0x20, D2, C0, 0x40, D3, C0, 0x60
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// Update C0, C1, C2, C3
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PTR_ALSL C0, LDC, C0, 2
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PTR_ALSL C1, LDC, C1, 2
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PTR_ALSL C2, LDC, C2, 2
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PTR_ALSL C3, LDC, C3, 2
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// Update X0, B1, B2, B3
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PTR_SUB X0, X0, K8
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PTR_SUB B1, B1, K8
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PTR_SUB B2, B2, K8
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PTR_SUB B3, B3, K8
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PTR_ALSL X0, LDB, X0, 2
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PTR_ALSL B1, LDB, B1, 2
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PTR_ALSL B2, LDB, B2, 2
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PTR_ALSL B3, LDB, B3, 2
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// Restore A0
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move A0, A
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bnez N4, .L_M16_N4
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.L_M16_N3:
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andi N2, N, 0x02
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beqz N2, .L_M16_N1
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.L_M16_N2:
|
||||
GXOR xv, v, D0, D0, D0, D1, D1, D1, D2, D2, D2, D3, D3, D3, \
|
||||
D4, D4, D4, D5, D5, D5, D6, D6, D6, D7, D7, D7
|
||||
move K1, K // Restore K1
|
||||
bge ZERO, K, .L_M16_N2_END
|
||||
.L_M16_N2_K1:
|
||||
PTR_ADDI K1, K1, -1
|
||||
GLD xv, , S0, A0, 0x00, S1, A0, 0x20, S2, A0, 0x40, S3, A0, 0x60
|
||||
GLDREPL xv, d, Z0, X0, 0x00, Z1, B1, 0x00
|
||||
GMADD xvf, d, D0, S0, Z0, D0, D1, S1, Z0, D1, D2, S2, Z0, D2, D3, S3, Z0, D3, \
|
||||
D4, S0, Z1, D4, D5, S1, Z1, D5, D6, S2, Z1, D6, D7, S3, Z1, D7
|
||||
PTR_ADDI X0, X0, 0x08
|
||||
PTR_ADDI B1, B1, 0x08
|
||||
PTR_ADD A0, A0, LDA
|
||||
bnez K1, .L_M16_N2_K1
|
||||
.L_M16_N2_END:
|
||||
GMUL xvf, d, D0, D0, VALPHA, D1, D1, VALPHA, D2, D2, VALPHA, D3, D3, VALPHA, \
|
||||
D4, D4, VALPHA, D5, D5, VALPHA, D6, D6, VALPHA, D7, D7, VALPHA
|
||||
#ifndef B0
|
||||
GLD xv, , S0, C0, 0x00, S1, C0, 0x20, S2, C0, 0x40, S3, C0, 0x60
|
||||
GMADD xvf, d, D0, S0, VBETA, D0, D1, S1, VBETA, D1, D2, S2, VBETA, D2, D3, S3, VBETA, D3
|
||||
GLD xv, , S0, C1, 0x00, S1, C1, 0x20, S2, C1, 0x40, S3, C1, 0x60
|
||||
GMADD xvf, d, D4, S0, VBETA, D4, D5, S1, VBETA, D5, D6, S2, VBETA, D6, D7, S3, VBETA, D7
|
||||
#endif
|
||||
GST xv, , D4, C1, 0x00, D5, C1, 0x20, D6, C1, 0x40, D7, C1, 0x60, \
|
||||
D0, C0, 0x00, D1, C0, 0x20, D2, C0, 0x40, D3, C0, 0x60
|
||||
// Update C0, C1, C2, C3
|
||||
PTR_ALSL C0, LDC, C0, 1
|
||||
PTR_ALSL C1, LDC, C1, 1
|
||||
// Update X0, B1, B2, B3
|
||||
PTR_SUB X0, X0, K8
|
||||
PTR_SUB B1, B1, K8
|
||||
PTR_ALSL X0, LDB, X0, 1
|
||||
PTR_ALSL B1, LDB, B1, 1
|
||||
// Restore A0
|
||||
move A0, A
|
||||
.L_M16_N1:
|
||||
andi N1, N, 0x01
|
||||
beqz N1, .L_M16_END
|
||||
GXOR xv, v, D0, D0, D0, D1, D1, D1, D2, D2, D2, D3, D3, D3
|
||||
move K1, K // Restore K1
|
||||
bge ZERO, K, .L_M16_N1_END
|
||||
.L_M16_N1_K1:
|
||||
PTR_ADDI K1, K1, -1
|
||||
GLD xv, , S0, A0, 0x00, S1, A0, 0x20, S2, A0, 0x40, S3, A0, 0x60
|
||||
GLDREPL xv, d, Z0, X0, 0x00
|
||||
GMADD xvf, d, D0, S0, Z0, D0, D1, S1, Z0, D1, D2, S2, Z0, D2, D3, S3, Z0, D3
|
||||
PTR_ADDI X0, X0, 0x08
|
||||
PTR_ADD A0, A0, LDA
|
||||
bnez K1, .L_M16_N1_K1
|
||||
.L_M16_N1_END:
|
||||
GMUL xvf, d, D0, D0, VALPHA, D1, D1, VALPHA, D2, D2, VALPHA, D3, D3, VALPHA
|
||||
#ifndef B0
|
||||
GLD xv, , S0, C0, 0x00, S1, C0, 0x20, S2, C0, 0x40, S3, C0, 0x60
|
||||
GMADD xvf, d, D0, S0, VBETA, D0, D1, S1, VBETA, D1, D2, S2, VBETA, D2, D3, S3, VBETA, D3
|
||||
#endif
|
||||
GST xv, , D0, C0, 0x00, D1, C0, 0x20, D2, C0, 0x40, D3, C0, 0x60
|
||||
// Update C0, C1, C2, C3
|
||||
PTR_ALSL C0, LDC, C0, 2
|
||||
// Update X0, B1, B2, B3
|
||||
PTR_SUB X0, X0, K8
|
||||
PTR_ALSL X0, LDB, X0, 2
|
||||
// Restore A0
|
||||
move A0, A
|
||||
.L_M16_END:
|
||||
PTR_ADDI M16, M16, -1
|
||||
PTR_ADDI A, A, 0x80
|
||||
PTR_ADDI C, C, 0x80
|
||||
bnez M16, .L_M16
|
||||
.L_M15:
|
||||
andi M8, M, 0x08
|
||||
beqz M8, .L_M7
|
||||
.L_M8:
|
||||
PTR_SRAI N4, N, 2 // N >> 2
|
||||
move A0, A // Restore A0
|
||||
move X0, B // Restore X0
|
||||
PTR_ADD B1, X0, LDB
|
||||
PTR_ADD B2, B1, LDB
|
||||
PTR_ADD B3, B2, LDB
|
||||
move C0, C // Restore C0
|
||||
PTR_ADD C1, C0, LDC
|
||||
PTR_ADD C2, C1, LDC
|
||||
PTR_ADD C3, C2, LDC
|
||||
beqz N4, .L_M8_N3
|
||||
.L_M8_N4:
|
||||
GXOR xv, v, D0, D0, D0, D1, D1, D1, D2, D2, D2, D3, D3, D3, \
|
||||
D4, D4, D4, D5, D5, D5, D6, D6, D6, D7, D7, D7
|
||||
move K1, K // Restore K1
|
||||
PTR_ADDI N4, N4, -1
|
||||
bge ZERO, K, .L_M8_N4_END
|
||||
.L_M8_N4_K1:
|
||||
PTR_ADDI K1, K1, -1
|
||||
GLD xv, , S0, A0, 0x00, S1, A0, 0x20
|
||||
GLDREPL xv, d, Z0, X0, 0x00, Z1, B1, 0x00, Z2, B2, 0x00, Z3, B3, 0x00
|
||||
GMADD xvf, d, D0, S0, Z0, D0, D1, S1, Z0, D1, \
|
||||
D2, S0, Z1, D2, D3, S1, Z1, D3, \
|
||||
D4, S0, Z2, D4, D5, S1, Z2, D5, \
|
||||
D6, S0, Z3, D6, D7, S1, Z3, D7,
|
||||
PTR_ADDI X0, X0, 0x08
|
||||
PTR_ADDI B1, B1, 0x08
|
||||
PTR_ADDI B2, B2, 0x08
|
||||
PTR_ADDI B3, B3, 0x08
|
||||
PTR_ADD A0, A0, LDA
|
||||
bnez K1, .L_M8_N4_K1
|
||||
.L_M8_N4_END:
|
||||
GMUL xvf, d, D0, D0, VALPHA, D1, D1, VALPHA, D2, D2, VALPHA, D3, D3, VALPHA, \
|
||||
D4, D4, VALPHA, D5, D5, VALPHA, D6, D6, VALPHA, D7, D7, VALPHA
|
||||
#ifndef B0
|
||||
GLD xv, , S0, C0, 0x00, S1, C0, 0x20
|
||||
GMADD xvf, d, D0, S0, VBETA, D0, D1, S1, VBETA, D1
|
||||
GLD xv, , S0, C1, 0x00, S1, C1, 0x20
|
||||
GMADD xvf, d, D2, S0, VBETA, D2, D3, S1, VBETA, D3
|
||||
GLD xv, , S0, C2, 0x00, S1, C2, 0x20
|
||||
GMADD xvf, d, D4, S0, VBETA, D4, D5, S1, VBETA, D5
|
||||
GLD xv, , S0, C3, 0x00, S1, C3, 0x20
|
||||
GMADD xvf, d, D6, S0, VBETA, D6, D7, S1, VBETA, D7
|
||||
#endif
|
||||
GST xv, , D4, C2, 0x00, D5, C2, 0x20, D6, C3, 0x00, D7, C3, 0x20, \
|
||||
D0, C0, 0x00, D1, C0, 0x20, D2, C1, 0x00, D3, C1, 0x20
|
||||
// Update C0, C1, C2, C3
|
||||
PTR_ALSL C0, LDC, C0, 2
|
||||
PTR_ALSL C1, LDC, C1, 2
|
||||
PTR_ALSL C2, LDC, C2, 2
|
||||
PTR_ALSL C3, LDC, C3, 2
|
||||
// Update X0, B1, B2, B3
|
||||
PTR_SUB X0, X0, K8
|
||||
PTR_SUB B1, B1, K8
|
||||
PTR_SUB B2, B2, K8
|
||||
PTR_SUB B3, B3, K8
|
||||
PTR_ALSL X0, LDB, X0, 2
|
||||
PTR_ALSL B1, LDB, B1, 2
|
||||
PTR_ALSL B2, LDB, B2, 2
|
||||
PTR_ALSL B3, LDB, B3, 2
|
||||
// Restore A0
|
||||
move A0, A
|
||||
bnez N4, .L_M8_N4
|
||||
.L_M8_N3:
|
||||
andi N2, N, 0x02
|
||||
beqz N2, .L_M8_N1
|
||||
.L_M8_N2:
|
||||
GXOR xv, v, D0, D0, D0, D1, D1, D1, D2, D2, D2, D3, D3, D3
|
||||
move K1, K // Restore K1
|
||||
bge ZERO, K, .L_M8_N2_END
|
||||
.L_M8_N2_K1:
|
||||
PTR_ADDI K1, K1, -1
|
||||
GLD xv, , S0, A0, 0x00, S1, A0, 0x20
|
||||
GLDREPL xv, d, Z0, X0, 0x00, Z1, B1, 0x00
|
||||
GMADD xvf, d, D0, S0, Z0, D0, D1, S1, Z0, D1, \
|
||||
D2, S0, Z1, D2, D3, S1, Z1, D3
|
||||
PTR_ADDI X0, X0, 0x08
|
||||
PTR_ADDI B1, B1, 0x08
|
||||
PTR_ADD A0, A0, LDA
|
||||
bnez K1, .L_M8_N2_K1
|
||||
.L_M8_N2_END:
|
||||
GMUL xvf, d, D0, D0, VALPHA, D1, D1, VALPHA, D2, D2, VALPHA, D3, D3, VALPHA
|
||||
#ifndef B0
|
||||
GLD xv, , S0, C0, 0x00, S1, C0, 0x20
|
||||
GMADD xvf, d, D0, S0, VBETA, D0, D1, S1, VBETA, D1
|
||||
GLD xv, , S0, C1, 0x00, S1, C1, 0x20
|
||||
GMADD xvf, d, D2, S0, VBETA, D2, D3, S1, VBETA, D3
|
||||
#endif
|
||||
GST xv, , D0, C0, 0x00, D1, C0, 0x20, D2, C1, 0x00, D3, C1, 0x20
|
||||
// Update C0, C1
|
||||
PTR_ALSL C0, LDC, C0, 1
|
||||
PTR_ALSL C1, LDC, C1, 1
|
||||
// Update X0, B1
|
||||
PTR_SUB X0, X0, K8
|
||||
PTR_SUB B1, B1, K8
|
||||
PTR_ALSL X0, LDB, X0, 1
|
||||
PTR_ALSL B1, LDB, B1, 1
|
||||
// Restore A0
|
||||
move A0, A
|
||||
.L_M8_N1:
|
||||
andi N1, N, 0x01
|
||||
beqz N1, .L_M8_END
|
||||
GXOR xv, v, D0, D0, D0, D1, D1, D1
|
||||
move K1, K // Restore K1
|
||||
bge ZERO, K, .L_M8_N1_END
|
||||
.L_M8_N1_K1:
|
||||
PTR_ADDI K1, K1, -1
|
||||
GLD xv, , S0, A0, 0x00, S1, A0, 0x20
|
||||
GLDREPL xv, d, Z0, X0, 0x00
|
||||
GMADD xvf, d, D0, S0, Z0, D0, D1, S1, Z0, D1
|
||||
PTR_ADDI X0, X0, 0x08
|
||||
PTR_ADD A0, A0, LDA
|
||||
bnez K1, .L_M8_N1_K1
|
||||
.L_M8_N1_END:
|
||||
GMUL xvf, d, D0, D0, VALPHA, D1, D1, VALPHA
|
||||
#ifndef B0
|
||||
GLD xv, , S0, C0, 0x00, S1, C0, 0x20
|
||||
GMADD xvf, d, D0, S0, VBETA, D0, D1, S1, VBETA, D1
|
||||
#endif
|
||||
GST xv, , D0, C0, 0x00, D1, C0, 0x20
|
||||
.L_M8_END:
|
||||
PTR_ADDI A, A, 0x40
|
||||
PTR_ADDI C, C, 0x40
|
||||
.L_M7:
|
||||
andi M4, M, 0x04
|
||||
beqz M4, .L_M3
|
||||
.L_M4:
|
||||
DGEMM_SMALL_KERNEL_NN_TAIL 4
|
||||
.L_M3:
|
||||
andi M2, M, 0x02
|
||||
beqz M2, .L_M1
|
||||
.L_M2:
|
||||
DGEMM_SMALL_KERNEL_NN_TAIL 2
|
||||
.L_M1:
|
||||
andi M1, M, 0x01
|
||||
beqz M1, .L_M0
|
||||
DGEMM_SMALL_KERNEL_NN_TAIL 1
|
||||
.L_M0:
|
||||
pop_if_used 5, 2
|
||||
jirl $r0, $r1, 0x0
|
||||
EPILOGUE
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
/***************************************************************************
|
||||
Copyright (c) 2021, The OpenBLAS Project
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are
|
||||
met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
|
||||
3. Neither the name of the OpenBLAS project nor the names of
|
||||
its contributors may be used to endorse or promote products
|
||||
derived from this software without specific prior written permission.
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
|
||||
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*****************************************************************************/
|
||||
|
||||
#include "common.h"
|
||||
|
||||
int CNAME(int transa, int transb, BLASLONG M, BLASLONG N, BLASLONG K, FLOAT alpha, FLOAT beta)
|
||||
{
|
||||
double MNK = (double) M * (double) N * (double) K;
|
||||
|
||||
if (MNK <= 64.0 * 64.0 * 64.0)
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue