Contribution note

This commit is contained in:
River Dillon 2021-07-10 01:34:47 -07:00
parent cecc2c65aa
commit ddb6cee0d5
1 changed files with 3 additions and 0 deletions

View File

@ -194,3 +194,6 @@ In chronological order:
* PingTouGe Semiconductor Co., Ltd.
* [2020-10] Add RISC-V Vector (0.7.1) support. Optimize BLAS kernels for Xuantie C910
* River Dillon <oss@outerpassage.net>
* [2021-07-10] fix compilation with musl libc