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loongarch: Optimizing the performance of the GEMM on servers

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gxw
2024-03-25 04:56:13 -04:00
parent b1e8ba5017
commit d8c4ea8793
8 changed files with 256 additions and 25 deletions
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driver/others/blas_server.c
+9 -1
View File
@@ -484,6 +484,14 @@ blas_queue_t *tscq;
main_status[cpu] = MAIN_RUNNING1;
#endif
//For Loongson servers, like the 3C5000 (featuring 16 cores), applying an
//offset to the buffer is essential for minimizing cache conflicts and optimizing performance.
#if defined(LOONGSON3R5) && !defined(NO_AFFINITY)
char model_name[128];
get_cpu_model(model_name);
if ((strstr(model_name, "3C5000") != NULL) || (strstr(model_name, "3D5000") != NULL))
if (sa == NULL) sa = (void *)((BLASLONG)buffer + (WhereAmI() & 0xf) * GEMM_OFFSET_A);
#endif
if (sa == NULL) sa = (void *)((BLASLONG)buffer + GEMM_OFFSET_A);
if (sb == NULL) {
@@ -1006,7 +1014,7 @@ void goto_set_num_threads(int num_threads) {
blas_cpu_number = num_threads;
#if defined(ARCH_MIPS64)
#if defined(ARCH_MIPS64) || defined(ARCH_LOONGARCH64)
#ifndef DYNAMIC_ARCH
//set parameters for different number of threads.
blas_set_parameter();
driver/others/blas_server_omp.c
+1 -1
View File
@@ -113,7 +113,7 @@ void goto_set_num_threads(int num_threads) {
blas_cpu_number = num_threads;
adjust_thread_buffers();
#if defined(ARCH_MIPS64)
#if defined(ARCH_MIPS64) || defined(ARCH_LOONGARCH64)
//set parameters for different number of threads.
blas_set_parameter();
#endif
driver/others/memory.c
+2 -2
View File
@@ -1219,7 +1219,7 @@ UNLOCK_COMMAND(&alloc_lock);
if (!blas_num_threads) blas_cpu_number = blas_get_cpu_number();
#endif
#if defined(ARCH_X86) || defined(ARCH_X86_64) || defined(ARCH_IA64) || defined(ARCH_MIPS64) || defined(ARCH_ARM64)
#if defined(ARCH_X86) || defined(ARCH_X86_64) || defined(ARCH_IA64) || defined(ARCH_MIPS64) || defined(ARCH_ARM64) || defined(ARCH_LOONGARCH64)
#ifndef DYNAMIC_ARCH
blas_set_parameter();
#endif
@@ -2814,7 +2814,7 @@ void *blas_memory_alloc(int procpos){
if (!blas_num_threads) blas_cpu_number = blas_get_cpu_number();
#endif
#if defined(ARCH_X86) || defined(ARCH_X86_64) || defined(ARCH_IA64) || defined(ARCH_MIPS64) || defined(ARCH_ARM64)
#if defined(ARCH_X86) || defined(ARCH_X86_64) || defined(ARCH_IA64) || defined(ARCH_MIPS64) || defined(ARCH_ARM64) || defined(ARCH_LOONGARCH64)
#ifndef DYNAMIC_ARCH
blas_set_parameter();
#endif
driver/others/parameter.c
+94
View File
@@ -739,6 +739,100 @@ void blas_set_parameter(void){
}
#endif
#if defined(ARCH_LOONGARCH64)
int get_L3_size() {
int ret = 0, id = 0x14;
__asm__ volatile (
"cpucfg %[ret], %[id]"
: [ret]"=r"(ret)
: [id]"r"(id)
: "memory"
);
return ((ret & 0xffff) + 1) * pow(2, ((ret >> 16) & 0xff)) * pow(2, ((ret >> 24) & 0x7f)) / 1024 / 1024; // MB
}
void blas_set_parameter(void){
#if defined(LOONGSON3R5)
int L3_size = get_L3_size();
#ifdef SMP
if(blas_num_threads == 1){
#endif
//single thread
if (L3_size == 32){ // 3C5000 and 3D5000
sgemm_p = 256;
sgemm_q = 384;
sgemm_r = 8192;
dgemm_p = 112;
dgemm_q = 289;
dgemm_r = 4096;
cgemm_p = 128;
cgemm_q = 256;
cgemm_r = 4096;
zgemm_p = 128;
zgemm_q = 128;
zgemm_r = 2048;
} else { // 3A5000 and 3C5000L
sgemm_p = 256;
sgemm_q = 384;
sgemm_r = 4096;
dgemm_p = 112;
dgemm_q = 300;
dgemm_r = 3024;
cgemm_p = 128;
cgemm_q = 256;
cgemm_r = 2048;
zgemm_p = 128;
zgemm_q = 128;
zgemm_r = 1024;
}
#ifdef SMP
}else{
//multi thread
if (L3_size == 32){ // 3C5000 and 3D5000
sgemm_p = 256;
sgemm_q = 384;
sgemm_r = 1024;
dgemm_p = 112;
dgemm_q = 289;
dgemm_r = 342;
cgemm_p = 128;
cgemm_q = 256;
cgemm_r = 512;
zgemm_p = 128;
zgemm_q = 128;
zgemm_r = 512;
} else { // 3A5000 and 3C5000L
sgemm_p = 256;
sgemm_q = 384;
sgemm_r = 2048;
dgemm_p = 112;
dgemm_q = 300;
dgemm_r = 738;
cgemm_p = 128;
cgemm_q = 256;
cgemm_r = 1024;
zgemm_p = 128;
zgemm_q = 128;
zgemm_r = 1024;
}
}
#endif
#endif
}
#endif
#if defined(ARCH_ARM64)
void blas_set_parameter(void)