From d7351deccfcc617db0b8caa687b5e10f0defee7d Mon Sep 17 00:00:00 2001 From: Martin Kroeker Date: Mon, 4 Oct 2021 17:58:29 +0200 Subject: [PATCH] Fix cache reporting for Apple M1 --- cpuid_arm64.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/cpuid_arm64.c b/cpuid_arm64.c index 430429cd3..73a82d188 100644 --- a/cpuid_arm64.c +++ b/cpuid_arm64.c @@ -30,6 +30,8 @@ #include int32_t value; size_t length=sizeof(value); +int64_t value64; +size_t length64=sizeof(value64); #endif #define CPU_UNKNOWN 0 @@ -423,14 +425,14 @@ void get_cpuconfig(void) #ifdef __APPLE__ case CPU_VORTEX: printf("#define VORTEX \n"); - sysctlbyname("hw.l1icachesize",&value,&length,NULL,0); - printf("#define L1_CODE_SIZE %d \n",value); - sysctlbyname("hw.cachelinesize",&value,&length,NULL,0); - printf("#define L1_CODE_LINESIZE %d \n",value); - sysctlbyname("hw.l1dcachesize",&value,&length,NULL,0); - printf("#define L1_DATA_SIZE %d \n",value); - sysctlbyname("hw.l2dcachesize",&value,&length,NULL,0); - printf("#define L2_SIZE %d \n",value); + sysctlbyname("hw.l1icachesize",&value64,&length64,NULL,0); + printf("#define L1_CODE_SIZE %lld \n",value64); + sysctlbyname("hw.cachelinesize",&value64,&length64,NULL,0); + printf("#define L1_CODE_LINESIZE %lld \n",value64); + sysctlbyname("hw.l1dcachesize",&value64,&length64,NULL,0); + printf("#define L1_DATA_SIZE %lld \n",value64); + sysctlbyname("hw.l2cachesize",&value64,&length64,NULL,0); + printf("#define L2_SIZE %lld \n",value64); printf("#define DTB_DEFAULT_ENTRIES 64 \n"); printf("#define DTB_SIZE 4096 \n"); break;