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Merge pull request #2553 from martin-frbg/issue2444 

Add a read memory barrier to the traversal of the buffer slot list
This commit is contained in:
Martin Kroeker 2020-04-13 21:28:59 +02:00 committed by GitHub
parent cf62adffbb 3eec7d382c
commit c861b2a7bd
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
12 changed files with 16 additions and 3 deletions
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1
common_alpha.h
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@ -43,6 +43,7 @@
#define MB asm("mb") #define MB asm("mb")
#define WMB asm("wmb") #define WMB asm("wmb")
#define RMB asm("rmb")
static void __inline blas_lock(unsigned long *address){ static void __inline blas_lock(unsigned long *address){
#ifndef __DECC #ifndef __DECC

2
common_arm.h
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@ -37,11 +37,13 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define MB #define MB
#define WMB #define WMB
#define RMB
#else #else
#define MB __asm__ __volatile__ ("dmb ish" : : : "memory") #define MB __asm__ __volatile__ ("dmb ish" : : : "memory")
#define WMB __asm__ __volatile__ ("dmb ishst" : : : "memory") #define WMB __asm__ __volatile__ ("dmb ishst" : : : "memory")
#define RMB __asm__ __volatile__ ("dmb ish" : : : "memory")
#endif #endif

2
common_arm64.h
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@ -35,7 +35,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define MB __asm__ __volatile__ ("dmb ish" : : : "memory") #define MB __asm__ __volatile__ ("dmb ish" : : : "memory")
#define WMB __asm__ __volatile__ ("dmb ishst" : : : "memory") #define WMB __asm__ __volatile__ ("dmb ishst" : : : "memory")
#define RMB __asm__ __volatile__ ("dmb ishld" : : : "memory")
#define INLINE inline #define INLINE inline

1
common_ia64.h
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@ -47,6 +47,7 @@
#define MB #define MB
#define WMB #define WMB
#define RMB
#ifdef __ECC #ifdef __ECC
#include <ia64intrin.h> #include <ia64intrin.h>

1
common_mips.h
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@ -35,6 +35,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define MB __sync_synchronize() #define MB __sync_synchronize()
#define WMB __sync_synchronize() #define WMB __sync_synchronize()
#define RMB __sync_synchronize()
#define INLINE inline #define INLINE inline

1
common_mips64.h
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@ -73,6 +73,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define MB __sync_synchronize() #define MB __sync_synchronize()
#define WMB __sync_synchronize() #define WMB __sync_synchronize()
#define RMB __sync_synchronize()
#define INLINE inline #define INLINE inline

2
common_power.h
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@ -71,9 +71,11 @@
#if defined(POWER8) || defined(POWER9) #if defined(POWER8) || defined(POWER9)
#define MB __asm__ __volatile__ ("eieio":::"memory") #define MB __asm__ __volatile__ ("eieio":::"memory")
#define WMB __asm__ __volatile__ ("eieio":::"memory") #define WMB __asm__ __volatile__ ("eieio":::"memory")
#define RMB __asm__ __volatile__ ("eieio":::"memory")
#else #else
#define MB __asm__ __volatile__ ("sync") #define MB __asm__ __volatile__ ("sync")
#define WMB __asm__ __volatile__ ("sync") #define WMB __asm__ __volatile__ ("sync")
#define RMB __asm__ __volatile__ ("sync")
#endif #endif
#define INLINE inline #define INLINE inline

1
common_sparc.h
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@ -41,6 +41,7 @@
#define MB __asm__ __volatile__ ("nop") #define MB __asm__ __volatile__ ("nop")
#define WMB __asm__ __volatile__ ("nop") #define WMB __asm__ __volatile__ ("nop")
#define RMB __asm__ __volatile__ ("nop")
#ifndef ASSEMBLER #ifndef ASSEMBLER

1
common_x86.h
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@ -47,6 +47,7 @@
#define MB #define MB
#define WMB #define WMB
#define RMB
#ifdef C_SUN #ifdef C_SUN
#define __asm__ __asm #define __asm__ __asm

3
common_x86_64.h
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@ -63,13 +63,16 @@
#ifdef __GNUC__ #ifdef __GNUC__
#define MB do { __asm__ __volatile__("": : :"memory"); } while (0) #define MB do { __asm__ __volatile__("": : :"memory"); } while (0)
#define WMB do { __asm__ __volatile__("": : :"memory"); } while (0) #define WMB do { __asm__ __volatile__("": : :"memory"); } while (0)
#define RMB
#else #else
#define MB do {} while (0) #define MB do {} while (0)
#define WMB do {} while (0) #define WMB do {} while (0)
#define RMB
#endif #endif
static void __inline blas_lock(volatile BLASULONG *address){ static void __inline blas_lock(volatile BLASULONG *address){
#ifndef C_MSVC #ifndef C_MSVC
int ret; int ret;
#else #else

3
common_zarch.h
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@ -34,9 +34,8 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define COMMON_ZARCH #define COMMON_ZARCH
#define MB #define MB
//__asm__ __volatile__ ("dmb ish" : : : "memory")
#define WMB #define WMB
//__asm__ __volatile__ ("dmb ishst" : : : "memory") #define RMB
#define INLINE inline #define INLINE inline

1
driver/others/memory.c
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@ -2741,6 +2741,7 @@ void *blas_memory_alloc(int procpos){
LOCK_COMMAND(&alloc_lock); LOCK_COMMAND(&alloc_lock);
#endif #endif
do { do {
RMB;
#if defined(USE_OPENMP) #if defined(USE_OPENMP)
if (!memory[position].used) { if (!memory[position].used) {
blas_lock(&memory[position].lock); blas_lock(&memory[position].lock);