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loongarch64: Refine amax,amin,max,min optimization.

This commit is contained in:
Shiyou Yin 2023-12-08 16:06:17 +08:00
parent 3b520a56a9
commit c6996a80e9
27 changed files with 1881 additions and 2826 deletions
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24
common_loongarch64.h
View File

@ -120,6 +120,10 @@ static inline int WhereAmI(void){
#define CMOVT fsel
#define MTC movgr2fr.d
#define FABS fabs.d
#define FMIN fmin.d
#define FMINA fmina.d
#define FMAX fmax.d
#define FMAXA fmaxa.d
#define CMPEQ fcmp.ceq.d
#define CMPLE fcmp.cle.d
#define CMPLT fcmp.clt.d
@ -128,10 +132,18 @@ static inline int WhereAmI(void){
#define XVFSUB xvfsub.d
#define XVFADD xvfadd.d
#define XVFMADD xvfmadd.d
#define XVFMIN xvfmin.d
#define XVFMINA xvfmina.d
#define XVFMAX xvfmax.d
#define XVFMAXA xvfmaxa.d
#define VFSUB vfsub.d
#define VFADD vfadd.d
#define VFMADD vfmadd.d
#define VFMIN vfmin.d
#define VFMINA vfmina.d
#define VFMAX vfmax.d
#define VFMAXA vfmaxa.d
#else
@ -148,6 +160,10 @@ static inline int WhereAmI(void){
#define CMOVT fsel
#define MTC movgr2fr.w
#define FABS fabs.s
#define FMIN fmin.s
#define FMINA fmina.s
#define FMAX fmax.s
#define FMAXA fmaxa.s
#define CMPEQ fcmp.ceq.s
#define CMPLE fcmp.cle.s
#define CMPLT fcmp.clt.s
@ -156,10 +172,18 @@ static inline int WhereAmI(void){
#define XVFSUB xvfsub.s
#define XVFADD xvfadd.s
#define XVFMADD xvfmadd.s
#define XVFMIN xvfmin.s
#define XVFMINA xvfmina.s
#define XVFMAX xvfmax.s
#define XVFMAXA xvfmaxa.s
#define VFSUB vfsub.s
#define VFADD vfadd.s
#define VFMADD vfmadd.s
#define VFMIN vfmin.s
#define VFMINA vfmina.s
#define VFMAX vfmax.s
#define VFMAXA vfmaxa.s
#endif /* defined(DOUBLE) */

16
kernel/loongarch64/KERNEL.LOONGSON2K1000
View File

@ -7,17 +7,17 @@ DDOTKERNEL = dot_lsx.S
SSCALKERNEL = sscal_lsx.S
DSCALKERNEL = dscal_lsx.S
SAMAXKERNEL = samax_lsx.S
DAMAXKERNEL = damax_lsx.S
SAMAXKERNEL = amax_lsx.S
DAMAXKERNEL = amax_lsx.S
SAMINKERNEL = samin_lsx.S
DAMINKERNEL = damin_lsx.S
SAMINKERNEL = amin_lsx.S
DAMINKERNEL = amin_lsx.S
SMAXKERNEL = smax_lsx.S
DMAXKERNEL = dmax_lsx.S
SMAXKERNEL = max_lsx.S
DMAXKERNEL = max_lsx.S
SMINKERNEL = smin_lsx.S
DMINKERNEL = dmin_lsx.S
SMINKERNEL = min_lsx.S
DMINKERNEL = min_lsx.S
ISMAXKERNEL = ismax_lsx.S
IDMAXKERNEL = idmax_lsx.S

16
kernel/loongarch64/KERNEL.LOONGSON3R5
View File

@ -7,17 +7,17 @@ DDOTKERNEL = dot_lasx.S
SSCALKERNEL = sscal_lasx.S
DSCALKERNEL = dscal_lasx.S
SAMAXKERNEL = samax_lasx.S
DAMAXKERNEL = damax_lasx.S
SAMAXKERNEL = amax_lasx.S
DAMAXKERNEL = amax_lasx.S
SAMINKERNEL = samin_lasx.S
DAMINKERNEL = damin_lasx.S
SAMINKERNEL = amin_lasx.S
DAMINKERNEL = amin_lasx.S
SMAXKERNEL = smax_lasx.S
DMAXKERNEL = dmax_lasx.S
SMAXKERNEL = max_lsx.S
DMAXKERNEL = max_lsx.S
SMINKERNEL = smin_lasx.S
DMINKERNEL = dmin_lasx.S
SMINKERNEL = min_lsx.S
DMINKERNEL = min_lsx.S
ISMAXKERNEL = ismax_lasx.S
IDMAXKERNEL = idmax_lasx.S

232
kernel/loongarch64/amax_lasx.S Normal file
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@ -0,0 +1,232 @@
/***************************************************************************
Copyright (c) 2023, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define TEMP $r13
#define VM0 $xr0
#define VM1 $xr1
#define VM2 $xr2
#define VX0 $xr3
#define VX1 $xr4
#define VX2 $xr5
#define VX3 $xr6
#define t1 $r14
#define t2 $r15
#define t3 $r16
#define t4 $r17
PROLOGUE
#ifdef F_INTERFACE
LDINT N, 0(N)
LDINT INCX, 0(INCX)
#endif
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
#ifdef DOUBLE
xvldrepl.d VM0, X, 0
#else
xvldrepl.w VM0, X, 0
#endif
XVFSUB VM0, VM0, VM0
bne INCX, TEMP, .L20
srai.d I, N, 4
bge $r0, I, .L11
.align 3
.L10:
#ifdef DOUBLE
xvld VX0, X, 0
xvld VX1, X, 32
xvld VX2, X, 64
xvld VX3, X, 96
addi.d I, I, -1
addi.d X, X, 128
XVFMAXA VM1, VX0, VX1
XVFMAXA VM2, VX2, VX3
XVFMAXA VM0, VM0, VM1
XVFMAXA VM0, VM0, VM2
#else
xvld VX0, X, 0
xvld VX1, X, 32
addi.d I, I, -1
addi.d X, X, 64
XVFMAXA VM1, VX0, VX1
XVFMAXA VM0, VM0, VM1
#endif
blt $r0, I, .L10
#ifdef DOUBLE
xvrepl128vei.d VX0, VM0, 0
xvrepl128vei.d VX1, VM0, 1
XVFMAXA VM0, VX0, VX1
#else
xvrepl128vei.w VX0, VM0, 0
xvrepl128vei.w VX1, VM0, 1
xvrepl128vei.w VX2, VM0, 2
xvrepl128vei.w VX3, VM0, 3
XVFMAXA VM1, VX0, VX1
XVFMAXA VM2, VX2, VX3
XVFMAXA VM0, VM1, VM2
#endif
xvpermi.q VM1, VM0, 0x1
XVFMAXA VM0, VM0, VM1
.align 3
.L11:
andi I, N, 0x0f
bge $r0, I, .L13
.align 3
.L12: /* 0 < N < 16 */
LD $f1, X, 0
addi.d I, I, -1
addi.d X, X, SIZE
FMAXA $f0, $f0, $f1
bnez I, .L12
.align 3
.L13:
FABS $f0, $f0
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
srai.d I, N, 3
bge $r0, I, .L23
.align 3
.L21:
#ifdef DOUBLE
ld.d t1, X, 0
add.d X, X, INCX
ld.d t2, X, 0
add.d X, X, INCX
ld.d t3, X, 0
add.d X, X, INCX
ld.d t4, X, 0
add.d X, X, INCX
xvinsgr2vr.d VX0, t1, 0
xvinsgr2vr.d VX0, t2, 1
xvinsgr2vr.d VX0, t3, 2
xvinsgr2vr.d VX0, t4, 3
ld.d t1, X, 0
add.d X, X, INCX
ld.d t2, X, 0
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX1, t1, 0
xvinsgr2vr.d VX1, t2, 1
xvinsgr2vr.d VX1, t3, 2
xvinsgr2vr.d VX1, t4, 3
xvfmaxa.d VM1, VX0, VX1
xvfmaxa.d VM0, VM0, VM1
#else
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
xvinsgr2vr.w VM1, t1, 0
xvinsgr2vr.w VM1, t2, 1
xvinsgr2vr.w VM1, t3, 2
xvinsgr2vr.w VM1, t4, 3
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
xvinsgr2vr.w VM1, t1, 4
xvinsgr2vr.w VM1, t2, 5
xvinsgr2vr.w VM1, t3, 6
xvinsgr2vr.w VM1, t4, 7
xvfmaxa.s VM0, VM0, VM1
#endif
addi.d I, I, -1
blt $r0, I, .L21
.align 3
.L22:
#ifdef DOUBLE
xvrepl128vei.d VX0, VM0, 0
xvrepl128vei.d VX1, VM0, 1
XVFMAXA VM0, VX0, VX1
#else
xvrepl128vei.w VX0, VM0, 0
xvrepl128vei.w VX1, VM0, 1
xvrepl128vei.w VX2, VM0, 2
xvrepl128vei.w VX3, VM0, 3
XVFMAXA VM1, VX0, VX1
XVFMAXA VM2, VX2, VX3
XVFMAXA VM0, VM1, VM2
#endif
xvpermi.q VM1, VM0, 1
XVFMAXA VM0, VM0, VM1
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24: /* 0 < N < 8 */
LD $f1, X, 0
addi.d I, I, -1
add.d X, X, INCX
FMAXA $f0, $f0, $f1
bnez I, .L24
.align 3
.L999:
FABS $f0, $f0
jirl $r0, $r1, 0x0
EPILOGUE

231
kernel/loongarch64/amax_lsx.S Normal file
View File

@ -0,0 +1,231 @@
/***************************************************************************
Copyright (c) 2023, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define TEMP $r13
#define VM0 $vr0
#define VM1 $vr1
#define VM2 $vr2
#define VX0 $vr3
#define VX1 $vr4
#define VX2 $vr5
#define VX3 $vr6
#define t1 $r14
#define t2 $r15
#define t3 $r16
#define t4 $r17
PROLOGUE
#ifdef F_INTERFACE
LDINT N, 0(N)
LDINT INCX, 0(INCX)
#endif
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
#ifdef DOUBLE
vldrepl.d VM0, X, 0
#else
vldrepl.w VM0, X, 0
#endif
VFSUB VM0, VM0, VM0
bne INCX, TEMP, .L20
srai.d I, N, 3
bge $r0, I, .L11
.align 3
.L10:
#ifdef DOUBLE
vld VX0, X, 0
vld VX1, X, 16
vld VX2, X, 32
vld VX3, X, 48
addi.d I, I, -1
addi.d X, X, 64
VFMAXA VM1, VX0, VX1
VFMAXA VM2, VX2, VX3
VFMAXA VM0, VM0, VM1
VFMAXA VM0, VM0, VM2
#else
vld VX0, X, 0
vld VX1, X, 16
addi.d I, I, -1
addi.d X, X, 32
VFMAXA VM1, VX0, VX1
VFMAXA VM0, VM0, VM1
#endif
blt $r0, I, .L10
#ifdef DOUBLE
vreplvei.d VX0, VM0, 0
vreplvei.d VX1, VM0, 1
VFMAXA VM0, VX0, VX1
#else
vreplvei.w VX0, VM0, 0
vreplvei.w VX1, VM0, 1
vreplvei.w VX2, VM0, 2
vreplvei.w VX3, VM0, 3
VFMAXA VM1, VX0, VX1
VFMAXA VM2, VX2, VX3
VFMAXA VM0, VM1, VM2
#endif
.align 3
.L11:
andi I, N, 7
bge $r0, I, .L13
.align 3
.L12:
LD $f1, X, 0
addi.d I, I, -1
addi.d X, X, SIZE
FMAXA $f0, $f0, $f1
bnez I, .L12
.align 3
.L13:
FABS $f0, $f0
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
srai.d I, N, 3
bge $r0, I, .L23
.align 3
.L21:
#ifdef DOUBLE
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmaxa.d VM1, VX0, VX1
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmaxa.d VM2, VX0, VX1
vfmaxa.d VM1, VM1, VM2
vfmaxa.d VM0, VM0, VM1
#else
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
vinsgr2vr.w VX0, t1, 0
vinsgr2vr.w VX0, t2, 1
vinsgr2vr.w VX0, t3, 2
vinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
vinsgr2vr.w VX1, t1, 0
vinsgr2vr.w VX1, t2, 1
vinsgr2vr.w VX1, t3, 2
vinsgr2vr.w VX1, t4, 3
vfmaxa.s VM1, VX0, VX1
vfmaxa.s VM0, VM0, VM1
#endif
addi.d I, I, -1
blt $r0, I, .L21
.align 3
.L22:
#ifdef DOUBLE
vreplvei.d VX0, VM0, 0
vreplvei.d VX1, VM0, 1
VFMAXA VM0, VX0, VX1
#else
vreplvei.w VX0, VM0, 0
vreplvei.w VX1, VM0, 1
vreplvei.w VX2, VM0, 2
vreplvei.w VX3, VM0, 3
VFMAXA VM1, VX0, VX1
VFMAXA VM2, VX2, VX3
VFMAXA VM0, VM1, VM2
#endif
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
LD $f1, X, 0
addi.d I, I, -1
add.d X, X, INCX
FMAXA $f0, $f0, $f1
bnez I, .L24
.align 3
.L999:
FABS $f0, $f0
jirl $r0, $r1, 0x0
EPILOGUE

232
kernel/loongarch64/amin_lasx.S Normal file
View File

@ -0,0 +1,232 @@
/***************************************************************************
Copyright (c) 2023, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define TEMP $r13
#define VM0 $xr0
#define VM1 $xr1
#define VM2 $xr2
#define VX0 $xr3
#define VX1 $xr4
#define VX2 $xr5
#define VX3 $xr6
#define t1 $r14
#define t2 $r15
#define t3 $r16
#define t4 $r17
PROLOGUE
#ifdef F_INTERFACE
LDINT N, 0(N)
LDINT INCX, 0(INCX)
#endif
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
#ifdef DOUBLE
xvldrepl.d VM0, X, 0
#else
xvldrepl.w VM0, X, 0
#endif
XVFSUB VM0, VM0, VM0
bne INCX, TEMP, .L20
srai.d I, N, 4
bge $r0, I, .L11
.align 3
.L10:
#ifdef DOUBLE
xvld VX0, X, 0
xvld VX1, X, 32
xvld VX2, X, 64
xvld VX3, X, 96
addi.d I, I, -1
addi.d X, X, 128
XVFMINA VM1, VX0, VX1
XVFMINA VM2, VX2, VX3
XVFMINA VM0, VM0, VM1
XVFMINA VM0, VM0, VM2
#else
xvld VX0, X, 0
xvld VX1, X, 32
addi.d I, I, -1
addi.d X, X, 64
XVFMINA VM1, VX0, VX1
XVFMINA VM0, VM0, VM1
#endif
blt $r0, I, .L10
#ifdef DOUBLE
xvrepl128vei.d VX0, VM0, 0
xvrepl128vei.d VX1, VM0, 1
XVFMINA VM0, VX0, VX1
#else
xvrepl128vei.w VX0, VM0, 0
xvrepl128vei.w VX1, VM0, 1
xvrepl128vei.w VX2, VM0, 2
xvrepl128vei.w VX3, VM0, 3
XVFMINA VM1, VX0, VX1
XVFMINA VM2, VX2, VX3
XVFMINA VM0, VM1, VM2
#endif
xvpermi.q VM1, VM0, 0x1
XVFMINA VM0, VM0, VM1
.align 3
.L11:
andi I, N, 0x0f
bge $r0, I, .L13
.align 3
.L12: /* 0 < N < 16 */
LD $f1, X, 0
addi.d I, I, -1
addi.d X, X, SIZE
FMINA $f0, $f0, $f1
bnez I, .L12
.align 3
.L13:
FABS $f0, $f0
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
srai.d I, N, 3
bge $r0, I, .L23
.align 3
.L21:
#ifdef DOUBLE
ld.d t1, X, 0
add.d X, X, INCX
ld.d t2, X, 0
add.d X, X, INCX
ld.d t3, X, 0
add.d X, X, INCX
ld.d t4, X, 0
add.d X, X, INCX
xvinsgr2vr.d VX0, t1, 0
xvinsgr2vr.d VX0, t2, 1
xvinsgr2vr.d VX0, t3, 2
xvinsgr2vr.d VX0, t4, 3
ld.d t1, X, 0
add.d X, X, INCX
ld.d t2, X, 0
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX1, t1, 0
xvinsgr2vr.d VX1, t2, 1
xvinsgr2vr.d VX1, t3, 2
xvinsgr2vr.d VX1, t4, 3
xvfmaxa.d VM1, VX0, VX1
xvfmaxa.d VM0, VM0, VM1
#else
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
xvinsgr2vr.w VM1, t1, 0
xvinsgr2vr.w VM1, t2, 1
xvinsgr2vr.w VM1, t3, 2
xvinsgr2vr.w VM1, t4, 3
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
xvinsgr2vr.w VM1, t1, 4
xvinsgr2vr.w VM1, t2, 5
xvinsgr2vr.w VM1, t3, 6
xvinsgr2vr.w VM1, t4, 7
xvfmaxa.s VM0, VM0, VM1
#endif
addi.d I, I, -1
blt $r0, I, .L21
.align 3
.L22:
#ifdef DOUBLE
xvrepl128vei.d VX0, VM0, 0
xvrepl128vei.d VX1, VM0, 1
XVFMINA VM0, VX0, VX1
#else
xvrepl128vei.w VX0, VM0, 0
xvrepl128vei.w VX1, VM0, 1
xvrepl128vei.w VX2, VM0, 2
xvrepl128vei.w VX3, VM0, 3
XVFMINA VM1, VX0, VX1
XVFMINA VM2, VX2, VX3
XVFMINA VM0, VM1, VM2
#endif
xvpermi.q VM1, VM0, 1
XVFMINA VM0, VM0, VM1
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24: /* 0 < N < 8 */
LD $f1, X, 0
addi.d I, I, -1
add.d X, X, INCX
FMINA $f0, $f0, $f1
bnez I, .L24
.align 3
.L999:
FABS $f0, $f0
jirl $r0, $r1, 0x0
EPILOGUE

232
kernel/loongarch64/amin_lsx.S Normal file
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/***************************************************************************
Copyright (c) 2023, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define TEMP $r13
#define VM0 $vr0
#define VM1 $vr1
#define VM2 $vr2
#define VX0 $vr3
#define VX1 $vr4
#define VX2 $vr5
#define VX3 $vr6
#define t1 $r14
#define t2 $r15
#define t3 $r16
#define t4 $r17
PROLOGUE
#ifdef F_INTERFACE
LDINT N, 0(N)
LDINT INCX, 0(INCX)
#endif
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
#ifdef DOUBLE
vldrepl.d VM0, X, 0
#else
vldrepl.w VM0, X, 0
#endif
VFSUB VM0, VM0, VM0
bne INCX, TEMP, .L20
srai.d I, N, 3
bge $r0, I, .L11
.align 3
.L10:
#ifdef DOUBLE
vld VX0, X, 0
vld VX1, X, 16
vld VX2, X, 32
vld VX3, X, 48
addi.d I, I, -1
addi.d X, X, 64
VFMINA VM1, VX0, VX1
VFMINA VM2, VX2, VX3
VFMINA VM0, VM0, VM1
VFMINA VM0, VM0, VM2
#else
vld VX0, X, 0
vld VX1, X, 16
addi.d I, I, -1
addi.d X, X, 32
VFMINA VM1, VX0, VX1
VFMINA VM0, VM0, VM1
#endif
blt $r0, I, .L10
#ifdef DOUBLE
vreplvei.d VX0, VM0, 0
vreplvei.d VX1, VM0, 1
VFMINA VM0, VX0, VX1
#else
vreplvei.w VX0, VM0, 0
vreplvei.w VX1, VM0, 1
vreplvei.w VX2, VM0, 2
vreplvei.w VX3, VM0, 3
VFMINA VM1, VX0, VX1
VFMINA VM2, VX2, VX3
VFMINA VM0, VM1, VM2
#endif
.align 3
.L11:
andi I, N, 7
bge $r0, I, .L13
.align 3
.L12:
LD $f1, X, 0
addi.d I, I, -1
addi.d X, X, SIZE
FMINA $f0, $f0, $f1
bnez I, .L12
.align 3
.L13:
FABS $f0, $f0
SUB $f0, $f0, $f0
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
srai.d I, N, 3
bge $r0, I, .L23
.align 3
.L21:
#ifdef DOUBLE
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmaxa.d VM1, VX0, VX1
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmaxa.d VM2, VX0, VX1
vfmaxa.d VM1, VM1, VM2
vfmaxa.d VM0, VM0, VM1
#else
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
vinsgr2vr.w VX0, t1, 0
vinsgr2vr.w VX0, t2, 1
vinsgr2vr.w VX0, t3, 2
vinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
vinsgr2vr.w VX1, t1, 0
vinsgr2vr.w VX1, t2, 1
vinsgr2vr.w VX1, t3, 2
vinsgr2vr.w VX1, t4, 3
vfmaxa.s VM1, VX0, VX1
vfmaxa.s VM0, VM0, VM1
#endif
addi.d I, I, -1
blt $r0, I, .L21
.align 3
.L22:
#ifdef DOUBLE
vreplvei.d VX0, VM0, 0
vreplvei.d VX1, VM0, 1
VFMINA VM0, VX0, VX1
#else
vreplvei.w VX0, VM0, 0
vreplvei.w VX1, VM0, 1
vreplvei.w VX2, VM0, 2
vreplvei.w VX3, VM0, 3
VFMINA VM1, VX0, VX1
VFMINA VM2, VX2, VX3
VFMINA VM0, VM1, VM2
#endif
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
LD $f1, X, 0
addi.d I, I, -1
add.d X, X, INCX
FMINA $f0, $f0, $f1
bnez I, .L24
.align 3
.L999:
FABS $f0, $f0
jirl $r0, $r1, 0x0
EPILOGUE

183
kernel/loongarch64/damax_lasx.S
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@ -1,183 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $xr8
#define x1 $xr9
#define x2 $xr10
#define x3 $xr11
#define x4 $xr12
#define x5 $xr13
#define x6 $xr14
#define x7 $xr15
#define x8 $xr16
#define VX0 $xr20
#define VX1 $xr21
#define VM0 $xr22
#define VM1 $xr23
#define VM2 $xr18
#define VM3 $xr19
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
xvld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
xvld VX0, X, 0 * SIZE
xvld VX1, X, 4 * SIZE
addi.d I, I, -1
xvfmaxa.d VM1, VX1, VX0
addi.d X, X, 8 * SIZE
xvfmaxa.d VM0, VM0, VM1
blt $r0, I, .L10
.align 3
.L11:
xvpickve.d x1, VM0, 0
xvpickve.d x2, VM0, 1
xvpickve.d x3, VM0, 2
xvpickve.d x4, VM0, 3
xvfmaxa.d VM1, x1, x2
xvfmaxa.d VM2, x3, x4
xvfmaxa.d VM0, VM1, VM2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
xvld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
xvldx VX1, X, I
xvfmaxa.d m0, VX0, VX1 //patial repeat read
xvpickve.d x1, m0, 0
xvpickve.d x2, m0, 1
xvpickve.d x3, m0, 2
xvpickve.d x4, m0, 3
xvfmaxa.d VM1, x1, x2
xvfmaxa.d m0, x3, x4
xvfmaxa.d m0, m0, VM1
xvfmaxa.d VM0, m0, VM0
fabs.d $f22, $f22
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
xvld x1, X, 0
addi.d I, I, -1
xvfmaxa.d VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fabs.d $f22, $f22
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the maxa value
ld.d t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.d VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.d t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.d t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.d t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.d VM0, t2, 1
xvinsgr2vr.d VM0, t3, 2
xvinsgr2vr.d VM0, t4, 3
.align 3
.L21:
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX0, t1, 0
xvinsgr2vr.d VX0, t2, 1
xvinsgr2vr.d VX0, t3, 2
xvinsgr2vr.d VX0, t4, 3
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX1, t1, 0
xvinsgr2vr.d VX1, t2, 1
xvinsgr2vr.d VX1, t3, 2
xvinsgr2vr.d VX1, t4, 3
addi.d I, I, -1
xvfmaxa.d VM1, VX1, VX0
xvfmaxa.d VM0, VM1, VM0
blt $r0, I, .L21
.align 3
.L22:
xvpickve.d x1, VM0, 0
xvpickve.d x2, VM0, 1
xvpickve.d x3, VM0, 2
xvpickve.d x4, VM0, 3
xvfmaxa.d VM1, x1, x2
xvfmaxa.d VM2, x3, x4
xvfmaxa.d VM0, VM1, VM2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
xvld x1, X, 0
addi.d I, I, -1
xvfmaxa.d VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fabs.d $f22, $f22
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

145
kernel/loongarch64/damax_lsx.S
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#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define x1 $vr9
#define x2 $vr10
#define VX0 $vr20
#define VX1 $vr21
#define VM0 $vr22
#define VM1 $vr23
#define VM2 $vr18
#define VM3 $vr19
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
vld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
vld VX0, X, 0 * SIZE
vld VX1, X, 2 * SIZE
addi.d I, I, -1
vfmaxa.d VM1, VX1, VX0
vld VX0, X, 4 * SIZE
vld VX1, X, 6 * SIZE
vfmaxa.d VM2, VX1, VX0
vfmaxa.d VM3, VM1, VM2
addi.d X, X, 8 * SIZE
vfmaxa.d VM0, VM0, VM3
blt $r0, I, .L10
.align 3
.L11:
vreplvei.d x1, VM0, 0
vreplvei.d x2, VM0, 1
vfmaxa.d VM0, x1, x2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
bge $r0, I, .L14
.align 3
.L13:
vld x1, X, 0
addi.d I, I, -1
vfmaxa.d VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L13
.align 3
.L14:
fabs.d $f22, $f22
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the maxa value
ld.d t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.d VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.d t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.d VM0, t2, 1
.align 3
.L21:
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmaxa.d VM1, VX0, VX1
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmaxa.d VM2, VX0, VX1
vfmaxa.d VM3, VM1, VM2
vfmaxa.d VM0, VM0, VM3
addi.d I, I, -1
blt $r0, I, .L21
.align 3
.L22:
vreplvei.d x1, VM0, 0
vreplvei.d x2, VM0, 1
vfmaxa.d VM0, x1, x2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
vld x1, X, 0
addi.d I, I, -1
vfmaxa.d VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fabs.d $f22, $f22
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

178
kernel/loongarch64/damin_lasx.S
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#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $xr8
#define x1 $xr9
#define x2 $xr10
#define x3 $xr11
#define x4 $xr12
#define VX0 $xr20
#define VX1 $xr21
#define VM0 $xr22
#define VM1 $xr23
#define VM2 $xr19
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
xvld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
xvld VX0, X, 0 * SIZE
addi.d I, I, -1
xvld VX1, X, 4 * SIZE
xvfmina.d VM1, VX1, VX0
addi.d X, X, 8 * SIZE
xvfmina.d VM0, VM0, VM1
blt $r0, I, .L10
.align 3
.L11:
xvpickve.d x1, VM0, 0
xvpickve.d x2, VM0, 1
xvpickve.d x3, VM0, 2
xvpickve.d x4, VM0, 3
xvfmina.d VM1, x1, x2
xvfmina.d VM2, x3, x4
xvfmina.d VM0, VM1, VM2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
xvld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
xvldx VX1, X, I
xvfmina.d m0, VX0, VX1 //patial repeat read
xvpickve.d x1, m0, 0
xvpickve.d x2, m0, 1
xvpickve.d x3, m0, 2
xvpickve.d x4, m0, 3
xvfmina.d VM1, x1, x2
xvfmina.d m0, x3, x4
xvfmina.d m0, m0, VM1
xvfmina.d VM0, m0, VM0
fabs.d $f22, $f22
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
xvld x1, X, 0
addi.d I, I, -1
xvfmina.d VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fabs.d $f22, $f22
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the mina value
ld.d t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.d VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.d t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.d t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.d t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.d VM0, t2, 1
xvinsgr2vr.d VM0, t3, 2
xvinsgr2vr.d VM0, t4, 3
.align 3
.L21:
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX0, t1, 0
xvinsgr2vr.d VX0, t2, 1
xvinsgr2vr.d VX0, t3, 2
xvinsgr2vr.d VX0, t4, 3
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX1, t1, 0
xvinsgr2vr.d VX1, t2, 1
xvinsgr2vr.d VX1, t3, 2
xvinsgr2vr.d VX1, t4, 3
addi.d I, I, -1
xvfmina.d VM1, VX1, VX0
xvfmina.d VM0, VM1, VM0
blt $r0, I, .L21
.align 3
.L22:
xvpickve.d x1, VM0, 0
xvpickve.d x2, VM0, 1
xvpickve.d x3, VM0, 2
xvpickve.d x4, VM0, 3
xvfmina.d VM1, x1, x2
xvfmina.d VM2, x3, x4
xvfmina.d VM0, VM1, VM2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
xvld x1, X, 0
addi.d I, I, -1
xvfmina.d VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fabs.d $f22, $f22
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

145
kernel/loongarch64/damin_lsx.S
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@ -1,145 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define x1 $vr9
#define x2 $vr10
#define VX0 $vr20
#define VX1 $vr21
#define VM0 $vr22
#define VM1 $vr23
#define VM2 $vr18
#define VM3 $vr19
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
vld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
vld VX0, X, 0 * SIZE
vld VX1, X, 2 * SIZE
addi.d I, I, -1
vfmina.d VM1, VX1, VX0
vld VX0, X, 4 * SIZE
vld VX1, X, 6 * SIZE
vfmina.d VM2, VX1, VX0
vfmina.d VM3, VM1, VM2
addi.d X, X, 8 * SIZE
vfmina.d VM0, VM0, VM3
blt $r0, I, .L10
.align 3
.L11:
vreplvei.d x1, VM0, 0
vreplvei.d x2, VM0, 1
vfmina.d VM0, x1, x2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
bge $r0, I, .L14
.align 3
.L13:
vld x1, X, 0
addi.d I, I, -1
vfmina.d VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L13
.align 3
.L14:
fabs.d $f22, $f22
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the mina value
ld.d t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.d VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.d t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.d VM0, t2, 1
.align 3
.L21:
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmina.d VM1, VX0, VX1
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
addi.d I, I, -1
vfmina.d VM2, VX0, VX1
vfmina.d VM3, VM1, VM2
vfmina.d VM0, VM0, VM3
blt $r0, I, .L21
.align 3
.L22:
vreplvei.d x1, VM0, 0
vreplvei.d x2, VM0, 1
vfmina.d VM0, x1, x2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
vld x1, X, 0
vfmina.d VM0, VM0, x1
addi.d I, I, -1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fabs.d $f22, $f22
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

175
kernel/loongarch64/dmax_lasx.S
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@ -1,175 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $xr8
#define x1 $xr9
#define x2 $xr10
#define x3 $xr11
#define x4 $xr12
#define VX0 $xr20
#define VX1 $xr21
#define VM0 $xr22
#define VM1 $xr23
#define VM2 $xr19
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
xvld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
xvld VX0, X, 0 * SIZE
xvld VX1, X, 4 * SIZE
addi.d I, I, -1
xvfmax.d VM1, VX1, VX0
addi.d X, X, 8 * SIZE
xvfmax.d VM0, VM0, VM1
blt $r0, I, .L10
.align 3
.L11:
xvpickve.d x1, VM0, 0
xvpickve.d x2, VM0, 1
xvpickve.d x3, VM0, 2
xvpickve.d x4, VM0, 3
xvfmax.d VM1, x1, x2
xvfmax.d VM2, x3, x4
xvfmax.d VM0, VM1, VM2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
xvld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
xvldx VX1, X, I
xvfmax.d m0, VX0, VX1 //patial repeat read
xvpickve.d x1, m0, 0
xvpickve.d x2, m0, 1
xvpickve.d x3, m0, 2
xvpickve.d x4, m0, 3
xvfmax.d VM1, x1, x2
xvfmax.d m0, x3, x4
xvfmax.d m0, m0, VM1
xvfmax.d VM0, m0, VM0
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
xvld x1, X, 0
addi.d I, I, -1
xvfmax.d VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the max value
ld.d t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.d VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.d t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.d t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.d t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.d VM0, t2, 1
xvinsgr2vr.d VM0, t3, 2
xvinsgr2vr.d VM0, t4, 3
.align 3
.L21:
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX0, t1, 0
xvinsgr2vr.d VX0, t2, 1
xvinsgr2vr.d VX0, t3, 2
xvinsgr2vr.d VX0, t4, 3
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX1, t1, 0
xvinsgr2vr.d VX1, t2, 1
xvinsgr2vr.d VX1, t3, 2
xvinsgr2vr.d VX1, t4, 3
addi.d I, I, -1
xvfmax.d VM1, VX1, VX0
xvfmax.d VM0, VM1, VM0
blt $r0, I, .L21
.align 3
.L22:
xvpickve.d x1, VM0, 0
xvpickve.d x2, VM0, 1
xvpickve.d x3, VM0, 2
xvpickve.d x4, VM0, 3
xvfmax.d VM1, x1, x2
xvfmax.d VM2, x3, x4
xvfmax.d VM0, VM1, VM2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
xvld x1, X, 0
addi.d I, I, -1
xvfmax.d VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

141
kernel/loongarch64/dmax_lsx.S
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@ -1,141 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define x1 $vr9
#define x2 $vr10
#define VX0 $vr20
#define VX1 $vr21
#define VM0 $vr22
#define VM1 $vr23
#define VM2 $vr19
#define VM3 $vr18
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
vld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
vld VX0, X, 0 * SIZE
vld VX1, X, 2 * SIZE
addi.d I, I, -1
vfmax.d VM1, VX1, VX0
vld VX0, X, 4 * SIZE
vld VX1, X, 6 * SIZE
vfmax.d VM2, VX1, VX0
vfmax.d VM3, VM1, VM2
addi.d X, X, 8 * SIZE
vfmax.d VM0, VM0, VM3
blt $r0, I, .L10
.align 3
.L11:
vreplvei.d x2, VM0, 1
vfmax.d VM0, VM0, x2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
bge $r0, I, .L14
.align 3
.L13:
vld x1, X, 0
addi.d I, I, -1
vfmax.d VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L13
.align 3
.L14:
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the max value
ld.d t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.d VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.d t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.d VM0, t2, 1
.align 3
.L21:
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmax.d VM1, VX0, VX1
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
addi.d I, I, -1
vfmax.d VM2, VX0, VX1
vfmax.d VM3, VM1, VM2
vfmax.d VM0, VM0, VM3
blt $r0, I, .L21
.align 3
.L22:
vreplvei.d x2, VM0, 1
vfmax.d VM0, VM0, x2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
vld x1, X, 0
addi.d I, I, -1
vfmax.d VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

175
kernel/loongarch64/dmin_lasx.S
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@ -1,175 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $xr8
#define x1 $xr9
#define x2 $xr10
#define x3 $xr11
#define x4 $xr12
#define VX0 $xr20
#define VX1 $xr21
#define VM0 $xr22
#define VM1 $xr23
#define VM2 $xr19
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
xvld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
xvld VX0, X, 0 * SIZE
xvld VX1, X, 4 * SIZE
addi.d I, I, -1
xvfmin.d VM1, VX1, VX0
addi.d X, X, 8 * SIZE
xvfmin.d VM0, VM0, VM1
blt $r0, I, .L10
.align 3
.L11:
xvpickve.d x1, VM0, 0
xvpickve.d x2, VM0, 1
xvpickve.d x3, VM0, 2
xvpickve.d x4, VM0, 3
xvfmin.d VM1, x1, x2
xvfmin.d VM2, x3, x4
xvfmin.d VM0, VM1, VM2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
xvld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
xvldx VX1, X, I
xvfmin.d m0, VX0, VX1 //patial repeat read
xvpickve.d x1, m0, 0
xvpickve.d x2, m0, 1
xvpickve.d x3, m0, 2
xvpickve.d x4, m0, 3
xvfmin.d VM1, x1, x2
xvfmin.d m0, x3, x4
xvfmin.d m0, m0, VM1
xvfmin.d VM0, m0, VM0
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
xvld x1, X, 0
xvfmin.d VM0, VM0, x1
addi.d I, I, -1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the min value
ld.d t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.d VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.d t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.d t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.d t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.d VM0, t2, 1
xvinsgr2vr.d VM0, t3, 2
xvinsgr2vr.d VM0, t4, 3
.align 3
.L21:
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX0, t1, 0
xvinsgr2vr.d VX0, t2, 1
xvinsgr2vr.d VX0, t3, 2
xvinsgr2vr.d VX0, t4, 3
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX1, t1, 0
xvinsgr2vr.d VX1, t2, 1
xvinsgr2vr.d VX1, t3, 2
xvinsgr2vr.d VX1, t4, 3
addi.d I, I, -1
xvfmin.d VM1, VX1, VX0
xvfmin.d VM0, VM1, VM0
blt $r0, I, .L21
.align 3
.L22:
xvpickve.d x1, VM0, 0
xvpickve.d x2, VM0, 1
xvpickve.d x3, VM0, 2
xvpickve.d x4, VM0, 3
xvfmin.d VM1, x1, x2
xvfmin.d VM2, x3, x4
xvfmin.d VM0, VM1, VM2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
xvld x1, X, 0
xvfmin.d VM0, VM0, x1
addi.d I, I, -1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

143
kernel/loongarch64/dmin_lsx.S
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@ -1,143 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define x1 $vr9
#define x2 $vr10
#define VX0 $vr20
#define VX1 $vr21
#define VM0 $vr22
#define VM1 $vr23
#define VM2 $vr18
#define VM3 $vr19
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
vld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
vld VX0, X, 0 * SIZE
vld VX1, X, 2 * SIZE
addi.d I, I, -1
vfmin.d VM1, VX1, VX0
vld VX0, X, 4 * SIZE
vld VX1, X, 6 * SIZE
vfmin.d VM2, VX1, VX0
vfmin.d VM3, VM1, VM2
addi.d X, X, 8 * SIZE
vfmin.d VM0, VM0, VM3
blt $r0, I, .L10
.align 3
.L11:
vreplvei.d x1, VM0, 0
vreplvei.d x2, VM0, 1
vfmin.d VM0, x1, x2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
bge $r0, I, .L14
.align 3
.L13:
vld x1, X, 0
addi.d I, I, -1
vfmin.d VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L13
.align 3
.L14:
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the min value
ld.d t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.d VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.d t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.d VM0, t2, 1
.align 3
.L21:
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmin.d VM1, VX0, VX1
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
addi.d I, I, -1
vfmin.d VM2, VX0, VX1
vfmin.d VM3, VM1, VM2
vfmin.d VM0, VM0, VM3
blt $r0, I, .L21
.align 3
.L22:
vreplvei.d x1, VM0, 0
vreplvei.d x2, VM0, 1
vfmin.d VM0, x1, x2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
vld x1, X, 0
addi.d I, I, -1
vfmin.d VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fmov.d $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

229
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/***************************************************************************
Copyright (c) 2023, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define TEMP $r13
#define VM0 $xr0
#define VM1 $xr1
#define VM2 $xr2
#define VX0 $xr3
#define VX1 $xr4
#define VX2 $xr5
#define VX3 $xr6
#define t1 $r14
#define t2 $r15
#define t3 $r16
#define t4 $r17
PROLOGUE
#ifdef F_INTERFACE
LDINT N, 0(N)
LDINT INCX, 0(INCX)
#endif
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
#ifdef DOUBLE
xvldrepl.d VM0, X, 0
#else
xvldrepl.w VM0, X, 0
#endif
bne INCX, TEMP, .L20
srai.d I, N, 4
bge $r0, I, .L11
.align 3
.L10:
#ifdef DOUBLE
xvld VX0, X, 0
xvld VX1, X, 32
xvld VX2, X, 64
xvld VX3, X, 96
addi.d I, I, -1
addi.d X, X, 128
XVFMAX VM1, VX0, VX1
XVFMAX VM2, VX2, VX3
XVFMAX VM0, VM0, VM1
XVFMAX VM0, VM0, VM2
#else
xvld VX0, X, 0
xvld VX1, X, 32
addi.d I, I, -1
addi.d X, X, 64
XVFMAX VM1, VX0, VX1
XVFMAX VM0, VM0, VM1
#endif
blt $r0, I, .L10
#ifdef DOUBLE
xvrepl128vei.d VX0, VM0, 0
xvrepl128vei.d VX1, VM0, 1
XVFMAX VM0, VX0, VX1
#else
xvrepl128vei.w VX0, VM0, 0
xvrepl128vei.w VX1, VM0, 1
xvrepl128vei.w VX2, VM0, 2
xvrepl128vei.w VX3, VM0, 3
XVFMAX VM1, VX0, VX1
XVFMAX VM2, VX2, VX3
XVFMAX VM0, VM1, VM2
#endif
xvpermi.q VM1, VM0, 0x1
XVFMAX VM0, VM0, VM1
.align 3
.L11:
andi I, N, 0x0f
bge $r0, I, .L13
.align 3
.L12: /* 0 < N < 16 */
LD $f1, X, 0
addi.d I, I, -1
addi.d X, X, SIZE
FMAX $f0, $f0, $f1
bnez I, .L12
.align 3
.L13:
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
srai.d I, N, 3
bge $r0, I, .L23
.align 3
.L21:
#ifdef DOUBLE
ld.d t1, X, 0
add.d X, X, INCX
ld.d t2, X, 0
add.d X, X, INCX
ld.d t3, X, 0
add.d X, X, INCX
ld.d t4, X, 0
add.d X, X, INCX
xvinsgr2vr.d VX0, t1, 0
xvinsgr2vr.d VX0, t2, 1
xvinsgr2vr.d VX0, t3, 2
xvinsgr2vr.d VX0, t4, 3
ld.d t1, X, 0
add.d X, X, INCX
ld.d t2, X, 0
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX1, t1, 0
xvinsgr2vr.d VX1, t2, 1
xvinsgr2vr.d VX1, t3, 2
xvinsgr2vr.d VX1, t4, 3
xvfmaxa.d VM1, VX0, VX1
xvfmaxa.d VM0, VM0, VM1
#else
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
xvinsgr2vr.w VM1, t1, 0
xvinsgr2vr.w VM1, t2, 1
xvinsgr2vr.w VM1, t3, 2
xvinsgr2vr.w VM1, t4, 3
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
xvinsgr2vr.w VM1, t1, 4
xvinsgr2vr.w VM1, t2, 5
xvinsgr2vr.w VM1, t3, 6
xvinsgr2vr.w VM1, t4, 7
xvfmaxa.s VM0, VM0, VM1
#endif
addi.d I, I, -1
blt $r0, I, .L21
.align 3
.L22:
#ifdef DOUBLE
xvrepl128vei.d VX0, VM0, 0
xvrepl128vei.d VX1, VM0, 1
XVFMAX VM0, VX0, VX1
#else
xvrepl128vei.w VX0, VM0, 0
xvrepl128vei.w VX1, VM0, 1
xvrepl128vei.w VX2, VM0, 2
xvrepl128vei.w VX3, VM0, 3
XVFMAX VM1, VX0, VX1
XVFMAX VM2, VX2, VX3
XVFMAX VM0, VM1, VM2
#endif
xvpermi.q VM1, VM0, 1
XVFMAX VM0, VM0, VM1
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24: /* 0 < N < 8 */
LD $f1, X, 0
addi.d I, I, -1
add.d X, X, INCX
FMAX $f0, $f0, $f1
bnez I, .L24
.align 3
.L999:
jirl $r0, $r1, 0x0
EPILOGUE

228
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/***************************************************************************
Copyright (c) 2023, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define TEMP $r13
#define VM0 $vr0
#define VM1 $vr1
#define VM2 $vr2
#define VX0 $vr3
#define VX1 $vr4
#define VX2 $vr5
#define VX3 $vr6
#define t1 $r14
#define t2 $r15
#define t3 $r16
#define t4 $r17
PROLOGUE
#ifdef F_INTERFACE
LDINT N, 0(N)
LDINT INCX, 0(INCX)
#endif
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
#ifdef DOUBLE
vldrepl.d VM0, X, 0
#else
vldrepl.w VM0, X, 0
#endif
bne INCX, TEMP, .L20
srai.d I, N, 3
bge $r0, I, .L11
.align 3
.L10:
#ifdef DOUBLE
vld VX0, X, 0
vld VX1, X, 16
vld VX2, X, 32
vld VX3, X, 48
addi.d I, I, -1
addi.d X, X, 64
VFMAX VM1, VX0, VX1
VFMAX VM2, VX2, VX3
VFMAX VM0, VM0, VM1
VFMAX VM0, VM0, VM2
#else
vld VX0, X, 0
vld VX1, X, 16
addi.d I, I, -1
addi.d X, X, 32
VFMAX VM1, VX0, VX1
VFMAX VM0, VM0, VM1
#endif
blt $r0, I, .L10
#ifdef DOUBLE
vreplvei.d VX0, VM0, 0
vreplvei.d VX1, VM0, 1
VFMAX VM0, VX0, VX1
#else
vreplvei.w VX0, VM0, 0
vreplvei.w VX1, VM0, 1
vreplvei.w VX2, VM0, 2
vreplvei.w VX3, VM0, 3
VFMAX VM1, VX0, VX1
VFMAX VM2, VX2, VX3
VFMAX VM0, VM1, VM2
#endif
.align 3
.L11:
andi I, N, 7
bge $r0, I, .L13
.align 3
.L12:
LD $f1, X, 0
addi.d I, I, -1
addi.d X, X, SIZE
FMAX $f0, $f0, $f1
bnez I, .L12
.align 3
.L13:
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
srai.d I, N, 3
bge $r0, I, .L23
.align 3
.L21:
#ifdef DOUBLE
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmaxa.d VM1, VX0, VX1
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmaxa.d VM2, VX0, VX1
vfmaxa.d VM1, VM1, VM2
vfmaxa.d VM0, VM0, VM1
#else
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
vinsgr2vr.w VX0, t1, 0
vinsgr2vr.w VX0, t2, 1
vinsgr2vr.w VX0, t3, 2
vinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
vinsgr2vr.w VX1, t1, 0
vinsgr2vr.w VX1, t2, 1
vinsgr2vr.w VX1, t3, 2
vinsgr2vr.w VX1, t4, 3
vfmaxa.s VM1, VX0, VX1
vfmaxa.s VM0, VM0, VM1
#endif
addi.d I, I, -1
blt $r0, I, .L21
.align 3
.L22:
#ifdef DOUBLE
vreplvei.d VX0, VM0, 0
vreplvei.d VX1, VM0, 1
VFMAX VM0, VX0, VX1
#else
vreplvei.w VX0, VM0, 0
vreplvei.w VX1, VM0, 1
vreplvei.w VX2, VM0, 2
vreplvei.w VX3, VM0, 3
VFMAX VM1, VX0, VX1
VFMAX VM2, VX2, VX3
VFMAX VM0, VM1, VM2
#endif
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
LD $f1, X, 0
addi.d I, I, -1
add.d X, X, INCX
FMAX $f0, $f0, $f1
bnez I, .L24
.align 3
.L999:
jirl $r0, $r1, 0x0
EPILOGUE

229
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/***************************************************************************
Copyright (c) 2023, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define TEMP $r13
#define VM0 $xr0
#define VM1 $xr1
#define VM2 $xr2
#define VX0 $xr3
#define VX1 $xr4
#define VX2 $xr5
#define VX3 $xr6
#define t1 $r14
#define t2 $r15
#define t3 $r16
#define t4 $r17
PROLOGUE
#ifdef F_INTERFACE
LDINT N, 0(N)
LDINT INCX, 0(INCX)
#endif
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
#ifdef DOUBLE
xvldrepl.d VM0, X, 0
#else
xvldrepl.w VM0, X, 0
#endif
bne INCX, TEMP, .L20
srai.d I, N, 4
bge $r0, I, .L11
.align 3
.L10:
#ifdef DOUBLE
xvld VX0, X, 0
xvld VX1, X, 32
xvld VX2, X, 64
xvld VX3, X, 96
addi.d I, I, -1
addi.d X, X, 128
XVFMIN VM1, VX0, VX1
XVFMIN VM2, VX2, VX3
XVFMIN VM0, VM0, VM1
XVFMIN VM0, VM0, VM2
#else
xvld VX0, X, 0
xvld VX1, X, 32
addi.d I, I, -1
addi.d X, X, 64
XVFMIN VM1, VX0, VX1
XVFMIN VM0, VM0, VM1
#endif
blt $r0, I, .L10
#ifdef DOUBLE
xvrepl128vei.d VX0, VM0, 0
xvrepl128vei.d VX1, VM0, 1
XVFMIN VM0, VX0, VX1
#else
xvrepl128vei.w VX0, VM0, 0
xvrepl128vei.w VX1, VM0, 1
xvrepl128vei.w VX2, VM0, 2
xvrepl128vei.w VX3, VM0, 3
XVFMIN VM1, VX0, VX1
XVFMIN VM2, VX2, VX3
XVFMIN VM0, VM1, VM2
#endif
xvpermi.q VM1, VM0, 0x1
XVFMIN VM0, VM0, VM1
.align 3
.L11:
andi I, N, 0x0f
bge $r0, I, .L13
.align 3
.L12: /* 0 < N < 16 */
LD $f1, X, 0
addi.d I, I, -1
addi.d X, X, SIZE
FMIN $f0, $f0, $f1
bnez I, .L12
.align 3
.L13:
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
srai.d I, N, 3
bge $r0, I, .L23
.align 3
.L21:
#ifdef DOUBLE
ld.d t1, X, 0
add.d X, X, INCX
ld.d t2, X, 0
add.d X, X, INCX
ld.d t3, X, 0
add.d X, X, INCX
ld.d t4, X, 0
add.d X, X, INCX
xvinsgr2vr.d VX0, t1, 0
xvinsgr2vr.d VX0, t2, 1
xvinsgr2vr.d VX0, t3, 2
xvinsgr2vr.d VX0, t4, 3
ld.d t1, X, 0
add.d X, X, INCX
ld.d t2, X, 0
add.d X, X, INCX
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.d VX1, t1, 0
xvinsgr2vr.d VX1, t2, 1
xvinsgr2vr.d VX1, t3, 2
xvinsgr2vr.d VX1, t4, 3
xvfmaxa.d VM1, VX0, VX1
xvfmaxa.d VM0, VM0, VM1
#else
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
xvinsgr2vr.w VM1, t1, 0
xvinsgr2vr.w VM1, t2, 1
xvinsgr2vr.w VM1, t3, 2
xvinsgr2vr.w VM1, t4, 3
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
xvinsgr2vr.w VM1, t1, 4
xvinsgr2vr.w VM1, t2, 5
xvinsgr2vr.w VM1, t3, 6
xvinsgr2vr.w VM1, t4, 7
xvfmaxa.s VM0, VM0, VM1
#endif
addi.d I, I, -1
blt $r0, I, .L21
.align 3
.L22:
#ifdef DOUBLE
xvrepl128vei.d VX0, VM0, 0
xvrepl128vei.d VX1, VM0, 1
XVFMIN VM0, VX0, VX1
#else
xvrepl128vei.w VX0, VM0, 0
xvrepl128vei.w VX1, VM0, 1
xvrepl128vei.w VX2, VM0, 2
xvrepl128vei.w VX3, VM0, 3
XVFMIN VM1, VX0, VX1
XVFMIN VM2, VX2, VX3
XVFMIN VM0, VM1, VM2
#endif
xvpermi.q VM1, VM0, 1
XVFMIN VM0, VM0, VM1
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24: /* 0 < N < 8 */
LD $f1, X, 0
addi.d I, I, -1
add.d X, X, INCX
FMIN $f0, $f0, $f1
bnez I, .L24
.align 3
.L999:
jirl $r0, $r1, 0x0
EPILOGUE

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/***************************************************************************
Copyright (c) 2023, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define TEMP $r13
#define VM0 $vr0
#define VM1 $vr1
#define VM2 $vr2
#define VX0 $vr3
#define VX1 $vr4
#define VX2 $vr5
#define VX3 $vr6
#define t1 $r14
#define t2 $r15
#define t3 $r16
#define t4 $r17
PROLOGUE
#ifdef F_INTERFACE
LDINT N, 0(N)
LDINT INCX, 0(INCX)
#endif
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
#ifdef DOUBLE
vldrepl.d VM0, X, 0
#else
vldrepl.w VM0, X, 0
#endif
bne INCX, TEMP, .L20
srai.d I, N, 3
bge $r0, I, .L11
.align 3
.L10:
#ifdef DOUBLE
vld VX0, X, 0
vld VX1, X, 16
vld VX2, X, 32
vld VX3, X, 48
addi.d I, I, -1
addi.d X, X, 64
VFMIN VM1, VX0, VX1
VFMIN VM2, VX2, VX3
VFMIN VM0, VM0, VM1
VFMIN VM0, VM0, VM2
#else
vld VX0, X, 0
vld VX1, X, 16
addi.d I, I, -1
addi.d X, X, 32
VFMIN VM1, VX0, VX1
VFMIN VM0, VM0, VM1
#endif
blt $r0, I, .L10
#ifdef DOUBLE
vreplvei.d VX0, VM0, 0
vreplvei.d VX1, VM0, 1
VFMIN VM0, VX0, VX1
#else
vreplvei.w VX0, VM0, 0
vreplvei.w VX1, VM0, 1
vreplvei.w VX2, VM0, 2
vreplvei.w VX3, VM0, 3
VFMIN VM1, VX0, VX1
VFMIN VM2, VX2, VX3
VFMIN VM0, VM1, VM2
#endif
.align 3
.L11:
andi I, N, 7
bge $r0, I, .L13
.align 3
.L12:
LD $f1, X, 0
addi.d I, I, -1
addi.d X, X, SIZE
FMIN $f0, $f0, $f1
bnez I, .L12
.align 3
.L13:
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
srai.d I, N, 3
bge $r0, I, .L23
.align 3
.L21:
#ifdef DOUBLE
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmaxa.d VM1, VX0, VX1
ld.d t1, X, 0 * SIZE
add.d X, X, INCX
ld.d t2, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1
ld.d t3, X, 0 * SIZE
add.d X, X, INCX
ld.d t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.d VX1, t3, 0
vinsgr2vr.d VX1, t4, 1
vfmaxa.d VM2, VX0, VX1
vfmaxa.d VM1, VM1, VM2
vfmaxa.d VM0, VM0, VM1
#else
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
vinsgr2vr.w VX0, t1, 0
vinsgr2vr.w VX0, t2, 1
vinsgr2vr.w VX0, t3, 2
vinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0
add.d X, X, INCX
ld.w t2, X, 0
add.d X, X, INCX
ld.w t3, X, 0
add.d X, X, INCX
ld.w t4, X, 0
add.d X, X, INCX
vinsgr2vr.w VX1, t1, 0
vinsgr2vr.w VX1, t2, 1
vinsgr2vr.w VX1, t3, 2
vinsgr2vr.w VX1, t4, 3
vfmaxa.s VM1, VX0, VX1
vfmaxa.s VM0, VM0, VM1
#endif
addi.d I, I, -1
blt $r0, I, .L21
.align 3
.L22:
#ifdef DOUBLE
vreplvei.d VX0, VM0, 0
vreplvei.d VX1, VM0, 1
VFMIN VM0, VX0, VX1
#else
vreplvei.w VX0, VM0, 0
vreplvei.w VX1, VM0, 1
vreplvei.w VX2, VM0, 2
vreplvei.w VX3, VM0, 3
VFMIN VM1, VX0, VX1
VFMIN VM2, VX2, VX3
VFMIN VM0, VM1, VM2
#endif
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
LD $f1, X, 0
addi.d I, I, -1
add.d X, X, INCX
FMIN $f0, $f0, $f1
bnez I, .L24
.align 3
.L999:
jirl $r0, $r1, 0x0
EPILOGUE

208
kernel/loongarch64/samax_lasx.S
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@ -1,208 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $xr8
#define x1 $xr9
#define x2 $xr10
#define x3 $xr11
#define x4 $xr12
#define x5 $xr13
#define x6 $xr14
#define x7 $xr15
#define x8 $xr16
#define VX0 $xr20
#define VX1 $xr21
#define VM0 $xr22
#define VM1 $xr23
#define VM2 $xr19
#define VM3 $xr18
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
xvld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
xvld VX0, X, 0 * SIZE
addi.d I, I, -1
xvfmaxa.s VM0, VM0, VX0
addi.d X, X, 8 * SIZE
blt $r0, I, .L10
.align 3
.L11:
xvpickve.w x1, VM0, 0
xvpickve.w x2, VM0, 1
xvpickve.w x3, VM0, 2
xvpickve.w x4, VM0, 3
xvpickve.w x5, VM0, 4
xvpickve.w x6, VM0, 5
xvpickve.w x7, VM0, 6
xvpickve.w x8, VM0, 7
xvfmaxa.s VM3, x1, x2
xvfmaxa.s VM2, x3, x4
xvfmaxa.s VM1, x5, x6
xvfmaxa.s VM0, x7, x8
xvfmaxa.s VM2, VM2, VM3
xvfmaxa.s VM0, VM0, VM1
xvfmaxa.s VM0, VM0, VM2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
xvld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
xvldx VX1, X, I
xvfmaxa.s m0, VX0, VX1 //patial repeat read
xvpickve.w x1, m0, 0
xvpickve.w x2, m0, 1
xvpickve.w x3, m0, 2
xvpickve.w x4, m0, 3
xvfmaxa.s m0, x1, x2
xvfmaxa.s VM1, x3, x4
xvfmaxa.s m0, m0, VM1
xvfmaxa.s VM0, m0, VM0
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
xvld x1, X, 0
addi.d I, I, -1
xvfmaxa.s VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the maxa value
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t2, 1
xvinsgr2vr.w VM0, t3, 2
xvinsgr2vr.w VM0, t4, 3
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t1, 4
xvinsgr2vr.w VM0, t2, 5
xvinsgr2vr.w VM0, t3, 6
xvinsgr2vr.w VM0, t4, 7
.align 3
.L21:
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.w VX0, t1, 0
xvinsgr2vr.w VX0, t2, 1
xvinsgr2vr.w VX0, t3, 2
xvinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.w VX0, t1, 4
xvinsgr2vr.w VX0, t2, 5
xvinsgr2vr.w VX0, t3, 6
xvinsgr2vr.w VX0, t4, 7
addi.d I, I, -1
xvfmaxa.s VM0, VM0, VX0
blt $r0, I, .L21
.align 3
.L22:
xvpickve.w x1, VM0, 0
xvpickve.w x2, VM0, 1
xvpickve.w x3, VM0, 2
xvpickve.w x4, VM0, 3
xvpickve.w x5, VM0, 4
xvpickve.w x6, VM0, 5
xvpickve.w x7, VM0, 6
xvpickve.w x8, VM0, 7
xvfmaxa.s VM3, x1, x2
xvfmaxa.s VM2, x3, x4
xvfmaxa.s VM1, x5, x6
xvfmaxa.s VM0, x7, x8
xvfmaxa.s VM2, VM2, VM3
xvfmaxa.s VM0, VM0, VM1
xvfmaxa.s VM0, VM0, VM2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
xvld x1, X, 0
addi.d I, I, -1
xvfmaxa.s VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

177
kernel/loongarch64/samax_lsx.S
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@ -1,177 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $vr8
#define x1 $vr9
#define x2 $vr10
#define x3 $vr11
#define x4 $vr12
#define VX0 $vr20
#define VX1 $vr21
#define VM0 $vr22
#define VM1 $vr23
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
vld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
vld VX0, X, 0 * SIZE
vld VX1, X, 4 * SIZE
addi.d I, I, -1
vfmaxa.s VM1, VX0, VX1
addi.d X, X, 8 * SIZE
vfmaxa.s VM0, VM0, VM1
blt $r0, I, .L10
.align 3
.L11:
vreplvei.w x1, VM0, 0
vreplvei.w x2, VM0, 1
vreplvei.w x3, VM0, 2
vreplvei.w x4, VM0, 3
vfmaxa.s VM1, x1, x2
vfmaxa.s VM0, x3, x4
vfmaxa.s VM0, VM0, VM1
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
vld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
vldx VX1, X, I
vfmaxa.s m0, VX0, VX1 //patial repeat read
vreplvei.w x1, m0, 0
vreplvei.w x2, m0, 1
vreplvei.w x3, m0, 2
vreplvei.w x4, m0, 3
vfmaxa.s m0, x1, x2
vfmaxa.s VM1, x3, x4
vfmaxa.s m0, m0, VM1
vfmaxa.s VM0, m0, VM0
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
vld x1, X, 0
addi.d I, I, -1
vfmaxa.s VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.w VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.w VM0, t2, 1
vinsgr2vr.w VM0, t3, 2
vinsgr2vr.w VM0, t4, 3
.align 3
.L21:
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.w VX0, t1, 0
vinsgr2vr.w VX0, t2, 1
vinsgr2vr.w VX0, t3, 2
vinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.w VX1, t1, 0
vinsgr2vr.w VX1, t2, 1
vinsgr2vr.w VX1, t3, 2
vinsgr2vr.w VX1, t4, 3
addi.d I, I, -1
vfmaxa.s VM1, VX0, VX1
vfmaxa.s VM0, VM0, VM1
blt $r0, I, .L21
.align 3
.L22:
vreplvei.w x1, VM0, 0
vreplvei.w x2, VM0, 1
vreplvei.w x3, VM0, 2
vreplvei.w x4, VM0, 3
vfmaxa.s VM1, x1, x2
vfmaxa.s VM0, x3, x4
vfmaxa.s VM0, VM0, VM1
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
vld x1, X, 0
addi.d I, I, -1
vfmaxa.s VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

208
kernel/loongarch64/samin_lasx.S
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@ -1,208 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $xr8
#define x1 $xr9
#define x2 $xr10
#define x3 $xr11
#define x4 $xr12
#define x5 $xr13
#define x6 $xr14
#define x7 $xr15
#define x8 $xr16
#define VX0 $xr20
#define VX1 $xr21
#define VM0 $xr22
#define VM1 $xr23
#define VM2 $xr18
#define VM3 $xr19
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
xvld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
xvld VX0, X, 0 * SIZE
addi.d I, I, -1
xvfmina.s VM0, VM0, VX0
addi.d X, X, 8 * SIZE
blt $r0, I, .L10
.align 3
.L11:
xvpickve.w x1, VM0, 0
xvpickve.w x2, VM0, 1
xvpickve.w x3, VM0, 2
xvpickve.w x4, VM0, 3
xvpickve.w x5, VM0, 4
xvpickve.w x6, VM0, 5
xvpickve.w x7, VM0, 6
xvpickve.w x8, VM0, 7
xvfmina.s VM3, x1, x2
xvfmina.s VM2, x3, x4
xvfmina.s VM1, x5, x6
xvfmina.s VM0, x7, x8
xvfmina.s VM2, VM2, VM3
xvfmina.s VM0, VM0, VM1
xvfmina.s VM0, VM0, VM2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
xvld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
xvldx VX1, X, I
xvfmina.s m0, VX0, VX1 //patial repeat read
xvpickve.w x1, m0, 0
xvpickve.w x2, m0, 1
xvpickve.w x3, m0, 2
xvpickve.w x4, m0, 3
xvfmina.s m0, x1, x2
xvfmina.s VM1, x3, x4
xvfmina.s m0, m0, VM1
xvfmina.s VM0, m0, VM0
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
xvld x1, X, 0
addi.d I, I, -1
xvfmina.s VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the mina value
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t2, 1
xvinsgr2vr.w VM0, t3, 2
xvinsgr2vr.w VM0, t4, 3
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t1, 4
xvinsgr2vr.w VM0, t2, 5
xvinsgr2vr.w VM0, t3, 6
xvinsgr2vr.w VM0, t4, 7
.align 3
.L21:
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.w VX0, t1, 0
xvinsgr2vr.w VX0, t2, 1
xvinsgr2vr.w VX0, t3, 2
xvinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.w VX0, t1, 4
xvinsgr2vr.w VX0, t2, 5
xvinsgr2vr.w VX0, t3, 6
xvinsgr2vr.w VX0, t4, 7
addi.d I, I, -1
xvfmina.s VM0, VM0, VX0
blt $r0, I, .L21
.align 3
.L22:
xvpickve.w x1, VM0, 0
xvpickve.w x2, VM0, 1
xvpickve.w x3, VM0, 2
xvpickve.w x4, VM0, 3
xvpickve.w x5, VM0, 4
xvpickve.w x6, VM0, 5
xvpickve.w x7, VM0, 6
xvpickve.w x8, VM0, 7
xvfmina.s VM3, x1, x2
xvfmina.s VM2, x3, x4
xvfmina.s VM1, x5, x6
xvfmina.s VM0, x7, x8
xvfmina.s VM2, VM2, VM3
xvfmina.s VM0, VM0, VM1
xvfmina.s VM0, VM0, VM2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
xvld x1, X, 0
addi.d I, I, -1
xvfmina.s VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

177
kernel/loongarch64/samin_lsx.S
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@ -1,177 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $vr8
#define x1 $vr9
#define x2 $vr10
#define x3 $vr11
#define x4 $vr12
#define VX0 $vr20
#define VX1 $vr21
#define VM0 $vr22
#define VM1 $vr23
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
vld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
vld VX0, X, 0 * SIZE
vld VX1, X, 4 * SIZE
addi.d I, I, -1
vfmina.s VM1, VX0, VX1
addi.d X, X, 8 * SIZE
vfmina.s VM0, VM0, VM1
blt $r0, I, .L10
.align 3
.L11:
vreplvei.w x1, VM0, 0
vreplvei.w x2, VM0, 1
vreplvei.w x3, VM0, 2
vreplvei.w x4, VM0, 3
vfmina.s VM1, x1, x2
vfmina.s VM0, x3, x4
vfmina.s VM0, VM0, VM1
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
vld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
vldx VX1, X, I
vfmina.s m0, VX0, VX1 //patial repeat read
vreplvei.w x1, m0, 0
vreplvei.w x2, m0, 1
vreplvei.w x3, m0, 2
vreplvei.w x4, m0, 3
vfmina.s m0, x1, x2
vfmina.s VM1, x3, x4
vfmina.s m0, m0, VM1
vfmina.s VM0, m0, VM0
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
vld x1, X, 0
addi.d I, I, -1
vfmina.s VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.w VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.w VM0, t2, 1
vinsgr2vr.w VM0, t3, 2
vinsgr2vr.w VM0, t4, 3
.align 3
.L21:
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.w VX0, t1, 0
vinsgr2vr.w VX0, t2, 1
vinsgr2vr.w VX0, t3, 2
vinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.w VX1, t1, 0
vinsgr2vr.w VX1, t2, 1
vinsgr2vr.w VX1, t3, 2
vinsgr2vr.w VX1, t4, 3
addi.d I, I, -1
vfmina.s VM1, VX0, VX1
vfmina.s VM0, VM0, VM1
blt $r0, I, .L21
.align 3
.L22:
vreplvei.w x1, VM0, 0
vreplvei.w x2, VM0, 1
vreplvei.w x3, VM0, 2
vreplvei.w x4, VM0, 3
vfmina.s VM1, x1, x2
vfmina.s VM0, x3, x4
vfmina.s VM0, VM0, VM1
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
vld x1, X, 0
addi.d I, I, -1
vfmina.s VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fabs.s $f22, $f22
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

205
kernel/loongarch64/smax_lasx.S
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@ -1,205 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $xr8
#define x1 $xr9
#define x2 $xr10
#define x3 $xr11
#define x4 $xr12
#define x5 $xr13
#define x6 $xr14
#define x7 $xr15
#define x8 $xr16
#define VX0 $xr20
#define VX1 $xr21
#define VM0 $xr22
#define VM1 $xr23
#define VM2 $xr18
#define VM3 $xr17
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
xvld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
xvld VX0, X, 0 * SIZE
addi.d I, I, -1
xvfmax.s VM0, VM0, VX0
addi.d X, X, 8 * SIZE
blt $r0, I, .L10
.align 3
.L11:
xvpickve.w x1, VM0, 0
xvpickve.w x2, VM0, 1
xvpickve.w x3, VM0, 2
xvpickve.w x4, VM0, 3
xvpickve.w x5, VM0, 4
xvpickve.w x6, VM0, 5
xvpickve.w x7, VM0, 6
xvpickve.w x8, VM0, 7
xvfmax.s VM3, x1, x2
xvfmax.s VM2, x3, x4
xvfmax.s VM1, x5, x6
xvfmax.s VM0, x7, x8
xvfmax.s VM2, VM2, VM3
xvfmax.s VM0, VM0, VM1
xvfmax.s VM0, VM0, VM2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
xvld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
xvldx VX1, X, I
xvfmax.s m0, VX0, VX1 //patial repeat read
xvpickve.w x1, m0, 0
xvpickve.w x2, m0, 1
xvpickve.w x3, m0, 2
xvpickve.w x4, m0, 3
xvfmax.s m0, x1, x2
xvfmax.s VM1, x3, x4
xvfmax.s m0, m0, VM1
xvfmax.s VM0, m0, VM0
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
xvld x1, X, 0
addi.d I, I, -1
xvfmax.s VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the max value
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t2, 1
xvinsgr2vr.w VM0, t3, 2
xvinsgr2vr.w VM0, t4, 3
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t1, 4
xvinsgr2vr.w VM0, t2, 5
xvinsgr2vr.w VM0, t3, 6
xvinsgr2vr.w VM0, t4, 7
.align 3
.L21:
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.w VX0, t1, 0
xvinsgr2vr.w VX0, t2, 1
xvinsgr2vr.w VX0, t3, 2
xvinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.w VX0, t1, 4
xvinsgr2vr.w VX0, t2, 5
xvinsgr2vr.w VX0, t3, 6
xvinsgr2vr.w VX0, t4, 7
addi.d I, I, -1
xvfmax.s VM0, VM0, VX0
blt $r0, I, .L21
.align 3
.L22:
xvpickve.w x1, VM0, 0
xvpickve.w x2, VM0, 1
xvpickve.w x3, VM0, 2
xvpickve.w x4, VM0, 3
xvpickve.w x5, VM0, 4
xvpickve.w x6, VM0, 5
xvpickve.w x7, VM0, 6
xvpickve.w x8, VM0, 7
xvfmax.s VM3, x1, x2
xvfmax.s VM2, x3, x4
xvfmax.s VM1, x5, x6
xvfmax.s VM0, x7, x8
xvfmax.s VM2, VM2, VM3
xvfmax.s VM0, VM0, VM1
xvfmax.s VM0, VM0, VM2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
xvld x1, X, 0
addi.d I, I, -1
xvfmax.s VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

171
kernel/loongarch64/smax_lsx.S
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@ -1,171 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $vr8
#define x1 $vr9
#define x2 $vr10
#define x3 $vr11
#define x4 $vr12
#define VX0 $vr20
#define VX1 $vr21
#define VM0 $vr22
#define VM1 $vr23
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
vld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
vld VX0, X, 0 * SIZE
vld VX1, X, 4 * SIZE
addi.d I, I, -1
vfmax.s VM1, VX0, VX1
addi.d X, X, 8 * SIZE
vfmax.s VM0, VM0, VM1
blt $r0, I, .L10
.align 3
.L11:
vreplvei.w x2, VM0, 1
vreplvei.w x3, VM0, 2
vreplvei.w x4, VM0, 3
vfmax.s VM1, x2, x3
vfmax.s VM0, x4, VM0
vfmax.s VM0, VM0, VM1
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
vld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
vldx VX1, X, I
vfmax.s m0, VX0, VX1 //patial repeat read
vreplvei.w x2, m0, 1
vreplvei.w x3, m0, 2
vreplvei.w x4, m0, 3
vfmax.s x1, x2, x3
vfmax.s VM1, x4, m0
vfmax.s m0, x1, VM1
vfmax.s VM0, m0, VM0
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
vld x1, X, 0
addi.d I, I, -1
vfmax.s VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.w VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.w VM0, t2, 1
vinsgr2vr.w VM0, t3, 2
vinsgr2vr.w VM0, t4, 3
.align 3
.L21:
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.w VX0, t1, 0
vinsgr2vr.w VX0, t2, 1
vinsgr2vr.w VX0, t3, 2
vinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.w VX1, t1, 0
vinsgr2vr.w VX1, t2, 1
vinsgr2vr.w VX1, t3, 2
vinsgr2vr.w VX1, t4, 3
addi.d I, I, -1
vfmax.s VM1, VX0, VX1
vfmax.s VM0, VM0, VM1
blt $r0, I, .L21
.align 3
.L22:
vreplvei.w x2, VM0, 1
vreplvei.w x3, VM0, 2
vreplvei.w x4, VM0, 3
vfmax.s VM1, x2, x3
vfmax.s VM0, x4, VM0
vfmax.s VM0, VM0, VM1
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
vld x1, X, 0
addi.d I, I, -1
vfmax.s VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

205
kernel/loongarch64/smin_lasx.S
View File

@ -1,205 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $xr8
#define x1 $xr9
#define x2 $xr10
#define x3 $xr11
#define x4 $xr12
#define x5 $xr13
#define x6 $xr14
#define x7 $xr15
#define x8 $xr16
#define VX0 $xr20
#define VX1 $xr21
#define VM0 $xr22
#define VM1 $xr23
#define VM2 $xr18
#define VM3 $xr19
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
xvld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
xvld VX0, X, 0 * SIZE
addi.d I, I, -1
xvfmin.s VM0, VM0, VX0
addi.d X, X, 8 * SIZE
blt $r0, I, .L10
.align 3
.L11:
xvpickve.w x1, VM0, 0
xvpickve.w x2, VM0, 1
xvpickve.w x3, VM0, 2
xvpickve.w x4, VM0, 3
xvpickve.w x5, VM0, 4
xvpickve.w x6, VM0, 5
xvpickve.w x7, VM0, 6
xvpickve.w x8, VM0, 7
xvfmin.s VM3, x1, x2
xvfmin.s VM2, x3, x4
xvfmin.s VM1, x5, x6
xvfmin.s VM0, x7, x8
xvfmin.s VM2, VM2, VM3
xvfmin.s VM0, VM0, VM1
xvfmin.s VM0, VM0, VM2
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
xvld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
xvldx VX1, X, I
xvfmin.s m0, VX0, VX1 //patial repeat read
xvpickve.w x1, m0, 0
xvpickve.w x2, m0, 1
xvpickve.w x3, m0, 2
xvpickve.w x4, m0, 3
xvfmin.s m0, x1, x2
xvfmin.s VM1, x3, x4
xvfmin.s m0, m0, VM1
xvfmin.s VM0, m0, VM0
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
xvld x1, X, 0
addi.d I, I, -1
xvfmin.s VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X // initialize the min value
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t2, 1
xvinsgr2vr.w VM0, t3, 2
xvinsgr2vr.w VM0, t4, 3
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
xvinsgr2vr.w VM0, t1, 4
xvinsgr2vr.w VM0, t2, 5
xvinsgr2vr.w VM0, t3, 6
xvinsgr2vr.w VM0, t4, 7
.align 3
.L21:
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.w VX0, t1, 0
xvinsgr2vr.w VX0, t2, 1
xvinsgr2vr.w VX0, t3, 2
xvinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
xvinsgr2vr.w VX0, t1, 4
xvinsgr2vr.w VX0, t2, 5
xvinsgr2vr.w VX0, t3, 6
xvinsgr2vr.w VX0, t4, 7
addi.d I, I, -1
xvfmin.s VM0, VM0, VX0
blt $r0, I, .L21
.align 3
.L22:
xvpickve.w x1, VM0, 0
xvpickve.w x2, VM0, 1
xvpickve.w x3, VM0, 2
xvpickve.w x4, VM0, 3
xvpickve.w x5, VM0, 4
xvpickve.w x6, VM0, 5
xvpickve.w x7, VM0, 6
xvpickve.w x8, VM0, 7
xvfmin.s VM3, x1, x2
xvfmin.s VM2, x3, x4
xvfmin.s VM1, x5, x6
xvfmin.s VM0, x7, x8
xvfmin.s VM2, VM2, VM3
xvfmin.s VM0, VM0, VM1
xvfmin.s VM0, VM0, VM2
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
xvld x1, X, 0
addi.d I, I, -1
xvfmin.s VM0, VM0, x1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE

174
kernel/loongarch64/smin_lsx.S
View File

@ -1,174 +0,0 @@
#define ASSEMBLER
#include "common.h"
#define N $r4
#define X $r5
#define INCX $r6
#define I $r12
#define J $r13
#define t1 $r14
#define t2 $r18
#define t3 $r15
#define t4 $r17
#define TEMP $r16
#define m0 $vr8
#define x1 $vr9
#define x2 $vr10
#define x3 $vr11
#define x4 $vr12
#define VX0 $vr20
#define VX1 $vr21
#define VM0 $vr22
#define VM1 $vr23
PROLOGUE
bge $r0, N, .L999
bge $r0, INCX, .L999
li.d TEMP, 1
slli.d TEMP, TEMP, BASE_SHIFT
slli.d INCX, INCX, BASE_SHIFT
bne INCX, TEMP, .L20
vld VM0, X, 0
srai.d I, N, 3
bge $r0, I, .L12
.align 3
.L10:
vld VX0, X, 0 * SIZE
vld VX1, X, 4 * SIZE
addi.d I, I, -1
vfmin.s VM1, VX0, VX1
addi.d X, X, 8 * SIZE
vfmin.s VM0, VM0, VM1
blt $r0, I, .L10
.align 3
.L11:
vreplvei.w x1, VM0, 0
vreplvei.w x2, VM0, 1
vreplvei.w x3, VM0, 2
vreplvei.w x4, VM0, 3
vfmin.s VM1, x1, x2
vfmin.s VM0, x3, x4
vfmin.s VM0, VM0, VM1
.align 3
.L12: //INCX==1 and N<8
andi I, N, 7
li.d J, 4
bge J, I, .L13 // 4<N<8
vld VX0, X, 0
slli.d J, J, 1 // 8
sub.d I, J, I
slli.d I, I, BASE_SHIFT
vldx VX1, X, I
vfmin.s m0, VX0, VX1 //patial repeat read
vreplvei.w x1, m0, 0
vreplvei.w x2, m0, 1
vreplvei.w x3, m0, 2
vreplvei.w x4, m0, 3
vfmin.s m0, x1, x2
vfmin.s VM1, x3, x4
vfmin.s m0, m0, VM1
vfmin.s VM0, m0, VM0
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L13: //INCX==1 and 0<=N<=4
bge $r0, I, .L15
.align 3
.L14:
vld x1, X, 0
addi.d I, I, -1
vfmin.s VM0, VM0, x1
addi.d X, X, SIZE
blt $r0, I, .L14
.align 3
.L15:
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
.L20: // INCX!=1
move TEMP, X
ld.w t1, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.w VM0, t1, 0
srai.d I, N, 3
bge $r0, I, .L23
ld.w t2, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t3, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
ld.w t4, TEMP, 0 * SIZE
add.d TEMP, TEMP, INCX
vinsgr2vr.w VM0, t2, 1
vinsgr2vr.w VM0, t3, 2
vinsgr2vr.w VM0, t4, 3
.align 3
.L21:
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.w VX0, t1, 0
vinsgr2vr.w VX0, t2, 1
vinsgr2vr.w VX0, t3, 2
vinsgr2vr.w VX0, t4, 3
ld.w t1, X, 0 * SIZE
add.d X, X, INCX
ld.w t2, X, 0 * SIZE
add.d X, X, INCX
ld.w t3, X, 0 * SIZE
add.d X, X, INCX
ld.w t4, X, 0 * SIZE
add.d X, X, INCX
vinsgr2vr.w VX1, t1, 0
vinsgr2vr.w VX1, t2, 1
vinsgr2vr.w VX1, t3, 2
vinsgr2vr.w VX1, t4, 3
vfmin.s VM1, VX0, VX1
addi.d I, I, -1
vfmin.s VM0, VM0, VM1
blt $r0, I, .L21
.align 3
.L22:
vreplvei.w x1, VM0, 0
vreplvei.w x2, VM0, 1
vreplvei.w x3, VM0, 2
vreplvei.w x4, VM0, 3
vfmin.s VM1, x1, x2
vfmin.s VM0, x3, x4
vfmin.s VM0, VM0, VM1
.align 3
.L23: //INCX!=1 and N<8
andi I, N, 7
bge $r0, I, .L999
.align 3
.L24:
vld x1, X, 0
vfmin.s VM0, VM0, x1
addi.d I, I, -1
add.d X, X, INCX
blt $r0, I, .L24
.align 3
.L999:
fmov.s $f0, $f22
jirl $r0, $r1, 0x0
.align 3
EPILOGUE