diff --git a/Makefile.arm64 b/Makefile.arm64 index a85ee7dfd..eeb728735 100644 --- a/Makefile.arm64 +++ b/Makefile.arm64 @@ -58,6 +58,13 @@ FCOMMON_OPT += -march=armv8-a -mtune=cortex-a73 endif endif +ifeq ($(CORE), CORTEXA76) +CCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a76 +ifneq ($(F_COMPILER), NAG) +FCOMMON_OPT += -march=armv8.2-a -mtune=cortex-a76 +endif +endif + ifeq ($(CORE), FT2000) CCOMMON_OPT += -march=armv8-a -mtune=cortex-a72 ifneq ($(F_COMPILER), NAG) diff --git a/TargetList.txt b/TargetList.txt index 115030c1b..1531fd0d2 100644 --- a/TargetList.txt +++ b/TargetList.txt @@ -93,6 +93,7 @@ CORTEXA53 CORTEXA57 CORTEXA72 CORTEXA73 +CORTEXA76 CORTEXA510 CORTEXA710 CORTEXX1 diff --git a/cpuid_arm64.c b/cpuid_arm64.c index 8c5d04c14..b23edc4e7 100644 --- a/cpuid_arm64.c +++ b/cpuid_arm64.c @@ -42,6 +42,7 @@ size_t length64=sizeof(value64); #define CPU_CORTEXA57 3 #define CPU_CORTEXA72 4 #define CPU_CORTEXA73 5 +#define CPU_CORTEXA76 23 #define CPU_NEOVERSEN1 11 #define CPU_NEOVERSEV1 16 #define CPU_NEOVERSEN2 17 @@ -89,7 +90,8 @@ static char *cpuname[] = { "CORTEXX2", "CORTEXA510", "CORTEXA710", - "FT2000" + "FT2000", + "CORTEXA76" }; static char *cpuname_lower[] = { @@ -115,7 +117,8 @@ static char *cpuname_lower[] = { "cortexx2", "cortexa510", "cortexa710", - "ft2000" + "ft2000", + "cortexa76" }; int get_feature(char *search) @@ -210,6 +213,8 @@ int detect(void) return CPU_CORTEXX2; else if (strstr(cpu_part, "0xd4e")) //X3 return CPU_CORTEXX2; + else if (strstr(cpu_part, "0xd0b")) + return CPU_CORTEXA76; } // Qualcomm else if (strstr(cpu_implementer, "0x51") && strstr(cpu_part, "0xc00")) @@ -391,6 +396,7 @@ void get_cpuconfig(void) break; case CPU_NEOVERSEV1: + case CPU_CORTEXA76: printf("#define %s\n", cpuname[d]); printf("#define L1_CODE_SIZE 65536\n"); printf("#define L1_CODE_LINESIZE 64\n"); diff --git a/getarch.c b/getarch.c index 2b5459a5f..842a843fa 100644 --- a/getarch.c +++ b/getarch.c @@ -1331,6 +1331,21 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define CORENAME "CORTEXA73" #endif +#ifdef FORCE_CORTEXA76 +#define FORCE +#define ARCHITECTURE "ARM64" +#define SUBARCHITECTURE "CORTEXA76" +#define SUBDIRNAME "arm64" +#define ARCHCONFIG "-DCORTEXA76 " \ + "-DL1_CODE_SIZE=49152 -DL1_CODE_LINESIZE=64 -DL1_CODE_ASSOCIATIVE=3 " \ + "-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=64 -DL1_DATA_ASSOCIATIVE=2 " \ + "-DL2_SIZE=2097152 -DL2_LINESIZE=64 -DL2_ASSOCIATIVE=16 " \ + "-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 " \ + "-DHAVE_VFPV4 -DHAVE_VFPV3 -DHAVE_VFP -DHAVE_NEON -DARMV8" +#define LIBNAME "cortexa76" +#define CORENAME "CORTEXA76" +#endif + #ifdef FORCE_CORTEXX1 #define FORCE #define ARCHITECTURE "ARM64" diff --git a/param.h b/param.h index fef3a0991..1c9d8b44d 100644 --- a/param.h +++ b/param.h @@ -3351,6 +3351,35 @@ is a big desktop or server with abundant cache rather than a phone or embedded d #define CGEMM_DEFAULT_R 4096 #define ZGEMM_DEFAULT_R 2048 +#elif defined(CORTEXA76) + +#define SGEMM_DEFAULT_UNROLL_M 16 +#define SGEMM_DEFAULT_UNROLL_N 4 + +#define DGEMM_DEFAULT_UNROLL_M 8 +#define DGEMM_DEFAULT_UNROLL_N 4 + +#define CGEMM_DEFAULT_UNROLL_M 8 +#define CGEMM_DEFAULT_UNROLL_N 4 + +#define ZGEMM_DEFAULT_UNROLL_M 4 +#define ZGEMM_DEFAULT_UNROLL_N 4 + + #define SGEMM_DEFAULT_P 256 + #define DGEMM_DEFAULT_P 128 + #define CGEMM_DEFAULT_P 128 + #define ZGEMM_DEFAULT_P 64 + + #define SGEMM_DEFAULT_Q 512 + #define DGEMM_DEFAULT_Q 256 + #define CGEMM_DEFAULT_Q 256 + #define ZGEMM_DEFAULT_Q 256 + +#define SGEMM_DEFAULT_R 4096 +#define DGEMM_DEFAULT_R 4096 +#define CGEMM_DEFAULT_R 4096 +#define ZGEMM_DEFAULT_R 4096 + #elif defined(CORTEXA53) || defined(CORTEXA55) #define SGEMM_DEFAULT_UNROLL_M 8