Disable direct clock register access on IOS and Android
as I find conflicting information on accessibility from non-priviledged processes
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@ -78,17 +78,18 @@ static void __inline blas_lock(volatile BLASULONG *address){
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#define BLAS_LOCK_DEFINED
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#if !defined(OS_DARWIN) && !defined (OS_ANDROID)
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static __inline BLASULONG rpcc(void){
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BLASULONG ret = 0;
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__asm__ __volatile__ ("mrs %0,cntvct_el0":"=r"(ret));
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__asm__ __volatile__ ("isb; mrs %0,cntvct_el0":"=r"(ret));
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return ret;
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}
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#define RPCC_DEFINED
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#define RPCC64BIT
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#endif
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static inline int blas_quickdivide(blasint x, blasint y){
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return x / y;
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