Merge pull request #4801 from markdryan/markdryan/riscv-dynamic-arch
Add autodetection for riscv64
This commit is contained in:
Martin Kroeker
GitHub
commit
a815594fd1
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@ -28,6 +28,9 @@ jobs:
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- target: RISCV64_ZVL256B
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opts: TARGET=RISCV64_ZVL256B BINARY=64 ARCH=riscv64
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qemu_cpu: rv64,g=true,c=true,v=true,vext_spec=v1.0,vlen=256,elen=64
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- target: DYNAMIC_ARCH=1
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opts: TARGET=RISCV64_GENERIC BINARY=64 ARCH=riscv64 DYNAMIC_ARCH=1
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qemu_cpu: rv64,g=true,c=true,v=true,vext_spec=v1.0,vlen=256,elen=64
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steps:
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- name: Checkout repository
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@ -715,6 +715,17 @@ ifeq ($(ARCH), loongarch64)
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DYNAMIC_CORE = LOONGSON3R5 LOONGSON2K1000 LOONGSONGENERIC
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endif
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ifeq ($(ARCH), riscv64)
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DYNAMIC_CORE = RISCV64_GENERIC
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DYNAMIC_CORE += RISCV64_ZVL128B
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DYNAMIC_CORE += RISCV64_ZVL256B
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ifdef DYNAMIC_LIST
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override DYNAMIC_CORE = RISCV64_GENERIC $(DYNAMIC_LIST)
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XCCOMMON_OPT = -DDYNAMIC_LIST -DDYN_RISCV64_GENERIC
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XCCOMMON_OPT += $(foreach dcore,$(DYNAMIC_LIST),-DDYN_$(dcore))
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endif
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endif
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ifeq ($(ARCH), zarch)
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DYNAMIC_CORE = ZARCH_GENERIC
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@ -234,6 +234,8 @@ For **POWER**, the list encompasses POWER6, POWER8 and POWER9. POWER10 is additi
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on **ZARCH** it comprises Z13 and Z14 as well as generic zarch support.
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On **riscv64**, DYNAMIC_ARCH enables support for riscv64_zvl128b and riscv64_zvl256b in addition to generic riscv64 support. A compiler that supports RVV 1.0 is required to build OpenBLAS for riscv64 when DYNAMIC_ARCH is enabled.
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The `TARGET` option can be used in conjunction with `DYNAMIC_ARCH=1` to specify which cpu model should be assumed for all the
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common code in the library, usually you will want to set this to the oldest model you expect to encounter.
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Please note that it is not possible to combine support for different architectures, so no combined 32 and 64 bit or x86_64 and arm64 in the same library.
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@ -30,12 +30,16 @@ else
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ifeq ($(ARCH),loongarch64)
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COMMONOBJS += dynamic_loongarch64.$(SUFFIX)
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else
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ifeq ($(ARCH),riscv64)
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COMMONOBJS += dynamic_riscv64.$(SUFFIX) detect_riscv64.$(SUFFIX)
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else
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COMMONOBJS += dynamic.$(SUFFIX)
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endif
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endif
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endif
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endif
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endif
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endif
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else
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COMMONOBJS += parameter.$(SUFFIX)
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endif
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@ -106,12 +110,16 @@ else
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ifeq ($(ARCH),loongarch64)
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HPLOBJS = memory.$(SUFFIX) xerbla.$(SUFFIX) dynamic_loongarch64.$(SUFFIX)
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else
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ifeq ($(ARCH),riscv64)
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HPLOBJS = memory.$(SUFFIX) xerbla.$(SUFFIX) dynamic_riscv64.$(SUFFIX) detect_riscv64.$(SUFFIX)
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else
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HPLOBJS = memory.$(SUFFIX) xerbla.$(SUFFIX) dynamic.$(SUFFIX)
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endif
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endif
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endif
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endif
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endif
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endif
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else
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HPLOBJS = memory.$(SUFFIX) xerbla.$(SUFFIX) parameter.$(SUFFIX)
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endif
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@ -209,6 +217,9 @@ addx.$(SUFFIX) : $(ARCH)/addx.c
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mulx.$(SUFFIX) : $(ARCH)/mulx.c
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$(CC) $(CFLAGS) -c -DXDOUBLE -UCOMPLEX $< -o $(@F)
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detect_riscv64.$(SUFFIX): detect_riscv64.c
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$(CC) $(CFLAGS) -c -march=rv64imafdcv $< -o $(@F)
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xerbla.$(PSUFFIX) : xerbla.c
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$(CC) $(PFLAGS) -c $< -o $(@F)
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@ -0,0 +1,75 @@
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/*****************************************************************************
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Copyright (c) 2024, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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||||
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2. Redistributions in binary form must reproduce the above copyright
|
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notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
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distribution.
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3. Neither the name of the OpenBLAS project nor the names of
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its contributors may be used to endorse or promote products
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derived from this software without specific prior written
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permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************************/
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#include <stdint.h>
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#ifdef __riscv_v_intrinsic
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#include <riscv_vector.h>
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#endif
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unsigned detect_riscv64_get_vlenb(void) {
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#ifdef __riscv_v_intrinsic
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return __riscv_vlenb();
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#else
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return 0;
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#endif
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}
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/*
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* Based on the approach taken here:
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* https://code.videolan.org/videolan/dav1d/-/merge_requests/1629
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*
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* Only to be called after we've determined we have some sort of
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* RVV support.
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*/
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uint64_t detect_riscv64_rvv100(void)
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{
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uint64_t rvv10_supported;
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/*
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* After the vsetvli statement vtype will either be a value > 0 if the
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* vsetvli succeeded or less than 0 if it failed. If 0 < vtype
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* we're good and the function will return 1, otherwise there's no
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* RVV 1.0 and we return 0.
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*/
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asm volatile("vsetvli x0, x0, e8, m1, ta, ma\n\t"
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"csrr %0, vtype\n\t"
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"slt %0, x0, %0\n"
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: "=r" (rvv10_supported)
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:
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:);
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return rvv10_supported;
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}
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@ -0,0 +1,269 @@
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/*****************************************************************************
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Copyright (c) 2024, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
|
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notice, this list of conditions and the following disclaimer.
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||||
|
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2. Redistributions in binary form must reproduce the above copyright
|
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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3. Neither the name of the OpenBLAS project nor the names of
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its contributors may be used to endorse or promote products
|
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derived from this software without specific prior written
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permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
|
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************************/
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#include <stdbool.h>
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#include "common.h"
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/*
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* OpenBLAS contains some kernels that are optimised for RVV 1.0. Before we
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* can use these kernels we need to determine whether the device supports
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* RVV 1.0 and what the device's VLEN is. Our strategy will be as follows.
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*
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* First we'll invoke the hwprobe syscall to detect RVV 1.0. In an ideal world,
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* this is all we should need to do. If the syscall is not implemented we
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* should be able to deduce that RVV 1.0 is not supported (as it was added to
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* Linux after hwprobe) and if the syscall is implemented we can use it to
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* determine whether RVV 1.0 is supported. However, there are some riscv64
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* boards out there that implement RVV 1.0 but ship with a Linux kernel that
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* predates RVV vector support and hwprobe support. These kernels contain
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* the backported RVV patches but not the hwprobe patches and so they
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* advertise support for RVV via hwcap. To cater for these boards we need
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* to fall back to hwcap if hwprobe is not supported. Unfortunately, some
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* boards indicate support for RVV via hwcap even though they only support
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* RVV 0.7.1, which is incompatible with RVV 1.0. So an additional check is
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* required to test if the devices advertising support for RVV via hwcap really
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* support RVV 1.0. This test works by executing a vsetvli instruction that
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* sets the tail agnostic and mask agnostic bits in the vtype register.
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* These bits are not supported prior to RVV 0.9 so will cause the VIL bit to
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* be set on the VTYPE register in CPUs supporting 0.7.1. If this bit is set
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* we can determine that RVV 1.0 is not supported.
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*
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* This approach is borrowed from
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* VideoLan dav1d:
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* (https://code.videolan.org/videolan/dav1d/-/merge_requests/1629).
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*
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* We assume that if a kernel reports the presence of RVV via hwcap that
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* the device supports the vsetvli instruction.
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*
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* For now we're just going to invoke the hwprobe syscall directly, rather than
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* invoking it through glibc. Support for hwprobe has been added to glibc but
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* at the time of writing this support has not yet been included in a glibc
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* release. Once it has, it will be better to invoke hwprobe via glibc as doing
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* so should take advantage of the vdso entry and be more efficient.
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*/
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/*
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* This should work on Android as well but I have no way of testing.
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*/
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#if defined(OS_LINUX)
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#include <unistd.h>
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#include <sys/syscall.h>
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#include <stdint.h>
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#include <sys/auxv.h>
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#define DETECT_RISCV64_HWCAP_ISA_V (1 << ('V' - 'A'))
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struct riscv_hwprobe {
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int64_t key;
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uint64_t value;
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};
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/* The constants below are copied from
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* /usr/include/riscv64-linux-gnu/asm/hwprobe.h. We duplicate the
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* constants as the header file from which they are copied will only
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* be present if we're building on a device with Linux 6.5 or greater.
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*/
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#define RISCV_HWPROBE_KEY_IMA_EXT_0 4
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#define RISCV_HWPROBE_IMA_V (1 << 2)
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#ifndef NR_riscv_hwprobe
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#ifndef NR_arch_specific_syscall
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#define NR_arch_specific_syscall 244
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#endif
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#define NR_riscv_hwprobe (NR_arch_specific_syscall + 14)
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#endif
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#endif // defined(OS_LINUX)
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unsigned detect_riscv64_get_vlenb(void);
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uint64_t detect_riscv64_rvv100(void);
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extern gotoblas_t gotoblas_RISCV64_GENERIC;
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#if !defined(DYNAMIC_LIST) || defined(DYN_RISCV64_ZVL256B)
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extern gotoblas_t gotoblas_RISCV64_ZVL256B;
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#endif
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#if !defined(DYNAMIC_LIST) || defined(DYN_RISCV64_ZVL128B)
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extern gotoblas_t gotoblas_RISCV64_ZVL128B;
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#endif
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#define CPU_GENERIC 0
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#define CPU_RISCV64_ZVL256B 1
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#define CPU_RISCV64_ZVL128B 2
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static char *cpuname[] = {
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"riscv64_generic",
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"riscv64_zvl256b",
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"riscv64_zvl128b"
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};
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#define NUM_CORETYPES (sizeof(cpuname)/sizeof(char*))
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extern int openblas_verbose(void);
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extern void openblas_warning(int verbose, const char* msg);
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char* gotoblas_corename(void) {
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#if !defined(DYNAMIC_LIST) || defined(DYN_RISCV64_ZVL256B)
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if (gotoblas == &gotoblas_RISCV64_ZVL256B)
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return cpuname[CPU_RISCV64_ZVL256B];
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#endif
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#if !defined(DYNAMIC_LIST) || defined(DYN_RISCV64_ZVL128B)
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if (gotoblas == &gotoblas_RISCV64_ZVL128B)
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return cpuname[CPU_RISCV64_ZVL128B];
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#endif
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if (gotoblas == &gotoblas_RISCV64_GENERIC)
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return cpuname[CPU_GENERIC];
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return "unknown";
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}
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static gotoblas_t* get_coretype(void) {
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unsigned vlenb = 0;
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#if !defined(OS_LINUX)
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return NULL;
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#else
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/*
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* See the hwprobe documentation
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*
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* ( https://docs.kernel.org/arch/riscv/hwprobe.html )
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* for more details.
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*/
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struct riscv_hwprobe pairs[] = {
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{ .key = RISCV_HWPROBE_KEY_IMA_EXT_0, },
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};
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int ret = syscall(NR_riscv_hwprobe, pairs, 1, 0, NULL, 0);
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if (ret == 0) {
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if (!(pairs[0].value & RISCV_HWPROBE_IMA_V))
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return NULL;
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} else {
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if (!(getauxval(AT_HWCAP) & DETECT_RISCV64_HWCAP_ISA_V))
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return NULL;
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if (!detect_riscv64_rvv100())
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return NULL;
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}
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/*
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* RVV 1.0 is supported. We now just need to determine the coretype
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* based on the VLEN.
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*/
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vlenb = detect_riscv64_get_vlenb();
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if (vlenb < 16)
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return NULL;
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#if !defined(DYNAMIC_LIST) || defined(DYN_RISCV64_ZVL256B)
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if (vlenb >= 32)
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return &gotoblas_RISCV64_ZVL256B;
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#endif
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#if !defined(DYNAMIC_LIST) || defined(DYN_RISCV64_ZVL128B)
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return &gotoblas_RISCV64_ZVL128B;
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#else
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return NULL;
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#endif
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#endif // !defined(OS_LINUX)
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}
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static gotoblas_t* force_coretype(char* coretype) {
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size_t i;
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char message[128];
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for (i = 0; i < NUM_CORETYPES && strcasecmp(coretype, cpuname[i]); i++);
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if (i == CPU_GENERIC)
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return &gotoblas_RISCV64_GENERIC;
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if (i == CPU_RISCV64_ZVL256B) {
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#if !defined(DYNAMIC_LIST) || defined(DYN_RISCV64_ZVL256B)
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return &gotoblas_RISCV64_ZVL256B;
|
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#else
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openblas_warning(1,
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"riscv64_zvl256b support not compiled in\n");
|
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return NULL;
|
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#endif
|
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}
|
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|
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if (i == CPU_RISCV64_ZVL128B) {
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#if !defined(DYNAMIC_LIST) || defined(DYN_RISCV64_ZVL128B)
|
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return &gotoblas_RISCV64_ZVL128B;
|
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#else
|
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openblas_warning(1,
|
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"riscv64_zvl128b support not compiled in\n");
|
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return NULL;
|
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#endif
|
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}
|
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|
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snprintf(message, sizeof(message), "Core not found: %s\n", coretype);
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openblas_warning(1, message);
|
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|
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return NULL;
|
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}
|
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|
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void gotoblas_dynamic_init(void) {
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|
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char coremsg[128];
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char* p;
|
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|
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if (gotoblas) return;
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|
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p = getenv("OPENBLAS_CORETYPE");
|
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if (p)
|
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gotoblas = force_coretype(p);
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else
|
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gotoblas = get_coretype();
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|
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if (!gotoblas) {
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snprintf(coremsg, sizeof(coremsg), "Falling back to generic riscv64 core\n");
|
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openblas_warning(1, coremsg);
|
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gotoblas = &gotoblas_RISCV64_GENERIC;
|
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}
|
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|
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if (gotoblas->init) {
|
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snprintf(coremsg, sizeof(coremsg), "Core: %s\n",
|
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gotoblas_corename());
|
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openblas_warning(2, coremsg);
|
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gotoblas->init();
|
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return;
|
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}
|
||||
|
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openblas_warning(0, "OpenBLAS : Architecture Initialization failed. No initialization function found.\n");
|
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exit(1);
|
||||
}
|
||||
|
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void gotoblas_dynamic_quit(void) {
|
||||
gotoblas = NULL;
|
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}
|
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|
|
@ -99,26 +99,26 @@ ZTRMMKERNEL = ../generic/ztrmmkernel_2x2.c
|
|||
SGEMMKERNEL = ../generic/gemmkernel_2x2.c
|
||||
SGEMMONCOPY = ../generic/gemm_ncopy_2.c
|
||||
SGEMMOTCOPY = ../generic/gemm_tcopy_2.c
|
||||
SGEMMONCOPYOBJ = sgemm_oncopy.o
|
||||
SGEMMOTCOPYOBJ = sgemm_otcopy.o
|
||||
SGEMMONCOPYOBJ = sgemm_oncopy$(TSUFFIX).$(SUFFIX)
|
||||
SGEMMOTCOPYOBJ = sgemm_otcopy$(TSUFFIX).$(SUFFIX)
|
||||
|
||||
DGEMMKERNEL = ../generic/gemmkernel_2x2.c
|
||||
DGEMMONCOPY = ../generic/gemm_ncopy_2.c
|
||||
DGEMMOTCOPY = ../generic/gemm_tcopy_2.c
|
||||
DGEMMONCOPYOBJ = dgemm_oncopy.o
|
||||
DGEMMOTCOPYOBJ = dgemm_otcopy.o
|
||||
DGEMMONCOPYOBJ = dgemm_oncopy$(TSUFFIX).$(SUFFIX)
|
||||
DGEMMOTCOPYOBJ = dgemm_otcopy$(TSUFFIX).$(SUFFIX)
|
||||
|
||||
CGEMMKERNEL = ../generic/zgemmkernel_2x2.c
|
||||
CGEMMONCOPY = ../generic/zgemm_ncopy_2.c
|
||||
CGEMMOTCOPY = ../generic/zgemm_tcopy_2.c
|
||||
CGEMMONCOPYOBJ = cgemm_oncopy.o
|
||||
CGEMMOTCOPYOBJ = cgemm_otcopy.o
|
||||
CGEMMONCOPYOBJ = cgemm_oncopy$(TSUFFIX).$(SUFFIX)
|
||||
CGEMMOTCOPYOBJ = cgemm_otcopy$(TSUFFIX).$(SUFFIX)
|
||||
|
||||
ZGEMMKERNEL = ../generic/zgemmkernel_2x2.c
|
||||
ZGEMMONCOPY = ../generic/zgemm_ncopy_2.c
|
||||
ZGEMMOTCOPY = ../generic/zgemm_tcopy_2.c
|
||||
ZGEMMONCOPYOBJ = zgemm_oncopy.o
|
||||
ZGEMMOTCOPYOBJ = zgemm_otcopy.o
|
||||
ZGEMMONCOPYOBJ = zgemm_oncopy$(TSUFFIX).$(SUFFIX)
|
||||
ZGEMMOTCOPYOBJ = zgemm_otcopy$(TSUFFIX).$(SUFFIX)
|
||||
|
||||
STRSMKERNEL_LN = ../generic/trsm_kernel_LN.c
|
||||
STRSMKERNEL_LT = ../generic/trsm_kernel_LT.c
|
||||
|
|
|
|||
|
|
@ -1244,6 +1244,36 @@ static void init_parameter(void) {
|
|||
}
|
||||
#else //ZARCH
|
||||
|
||||
#if (ARCH_RISCV64)
|
||||
static void init_parameter(void) {
|
||||
|
||||
#ifdef BUILD_BFLOAT16
|
||||
TABLE_NAME.sbgemm_p = SBGEMM_DEFAULT_P;
|
||||
#endif
|
||||
TABLE_NAME.sgemm_p = SGEMM_DEFAULT_P;
|
||||
TABLE_NAME.dgemm_p = DGEMM_DEFAULT_P;
|
||||
TABLE_NAME.cgemm_p = CGEMM_DEFAULT_P;
|
||||
TABLE_NAME.zgemm_p = ZGEMM_DEFAULT_P;
|
||||
|
||||
#ifdef BUILD_BFLOAT16
|
||||
TABLE_NAME.sbgemm_r = SBGEMM_DEFAULT_R;
|
||||
#endif
|
||||
TABLE_NAME.sgemm_r = SGEMM_DEFAULT_R;
|
||||
TABLE_NAME.dgemm_r = DGEMM_DEFAULT_R;
|
||||
TABLE_NAME.cgemm_r = CGEMM_DEFAULT_R;
|
||||
TABLE_NAME.zgemm_r = ZGEMM_DEFAULT_R;
|
||||
|
||||
|
||||
#ifdef BUILD_BFLOAT16
|
||||
TABLE_NAME.sbgemm_q = SBGEMM_DEFAULT_Q;
|
||||
#endif
|
||||
TABLE_NAME.sgemm_q = SGEMM_DEFAULT_Q;
|
||||
TABLE_NAME.dgemm_q = DGEMM_DEFAULT_Q;
|
||||
TABLE_NAME.cgemm_q = CGEMM_DEFAULT_Q;
|
||||
TABLE_NAME.zgemm_q = ZGEMM_DEFAULT_Q;
|
||||
}
|
||||
#else //RISCV64
|
||||
|
||||
#ifdef ARCH_X86
|
||||
static int get_l2_size_old(void){
|
||||
int i, eax, ebx, ecx, edx, cpuid_level;
|
||||
|
|
@ -2046,6 +2076,7 @@ static void init_parameter(void) {
|
|||
|
||||
|
||||
}
|
||||
#endif //RISCV64
|
||||
#endif //POWER
|
||||
#endif //ZARCH
|
||||
#endif //(ARCH_LOONGARCH64)
|
||||
|
|
|
|||
|
|
@ -1,6 +1,11 @@
|
|||
TOPDIR = ../../..
|
||||
include ../../../Makefile.system
|
||||
|
||||
ifeq ($(DYNAMIC_ARCH), 1)
|
||||
LASWP = ../generic/laswp_k_4.c
|
||||
ZLASWP = ../generic/zlaswp_k_4.c
|
||||
endif
|
||||
|
||||
ifndef LASWP
|
||||
LASWP = ../generic/laswp_k.c
|
||||
endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue