From 90e02ccf686c48b95be8c00716a101a4e788b308 Mon Sep 17 00:00:00 2001 From: Zhang Xianyi Date: Mon, 6 Mar 2017 22:16:13 +0800 Subject: [PATCH] Support ARM softfp ABI for sgemm on ARMV7. make ARM_SOFTFP_ABI=1 --- Makefile.arm | 8 ++++---- Makefile.system | 6 +++--- kernel/arm/sgemm_kernel_4x4_vfpv3.S | 24 ++++++++++++++++++++++-- 3 files changed, 29 insertions(+), 9 deletions(-) diff --git a/Makefile.arm b/Makefile.arm index 11f809222..c189b0c47 100644 --- a/Makefile.arm +++ b/Makefile.arm @@ -1,4 +1,4 @@ -ifeq logical or +#ifeq logical or ifeq ($(CORE), $(filter $(CORE),CORTEXA9 CORTEXA15)) ifeq ($(OSNAME), Android) CCOMMON_OPT += -mfpu=neon -march=armv7-a @@ -11,12 +11,12 @@ endif ifeq ($(CORE), ARMV7) ifeq ($(OSNAME), Android) -ifeq ($(ARM_SOFTFP), 1) +ifeq ($(ARM_SOFTFP_ABI), 1) CCOMMON_OPT += -mfpu=neon -march=armv7-a FCOMMON_OPT += -mfpu=neon -march=armv7-a else -CCOMMON_OPT += -marm -mfpu=neon -mfloat-abi=hard -march=armv7-a -Wl,--no-warn-mismatch -FCOMMON_OPT += -marm -mfpu=neon -mfloat-abi=hard -march=armv7-a -Wl,--no-warn-mismatch +CCOMMON_OPT += -mfpu=neon -march=armv7-a -Wl,--no-warn-mismatch +FCOMMON_OPT += -mfpu=neon -march=armv7-a -Wl,--no-warn-mismatch endif else CCOMMON_OPT += -mfpu=vfpv3 -march=armv7-a diff --git a/Makefile.system b/Makefile.system index c4fcc0139..cc7862996 100644 --- a/Makefile.system +++ b/Makefile.system @@ -480,9 +480,9 @@ BINARY_DEFINED = 1 CCOMMON_OPT += -marm FCOMMON_OPT += -marm -ifeq ($(ARM_SOFT_FLOAT_ABI), 1) -CCOMMON_OPT += -mfloat-abi=softfp -FCOMMON_OPT += -mfloat-abi=softfp +ifeq ($(ARM_SOFTFP_ABI), 1) +CCOMMON_OPT += -mfloat-abi=softfp -DARM_SOFTFP_ABI +FCOMMON_OPT += -mfloat-abi=softfp -DARM_SOFTFP_ABI else CCOMMON_OPT += -mfloat-abi=hard FCOMMON_OPT += -mfloat-abi=hard diff --git a/kernel/arm/sgemm_kernel_4x4_vfpv3.S b/kernel/arm/sgemm_kernel_4x4_vfpv3.S index 18527263d..86198ac90 100644 --- a/kernel/arm/sgemm_kernel_4x4_vfpv3.S +++ b/kernel/arm/sgemm_kernel_4x4_vfpv3.S @@ -58,8 +58,14 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define OLD_M r0 #define OLD_N r1 #define OLD_K r2 + +#ifdef ARM_SOFTFP_ABI +#define OLD_ALPHA r3 +//#define OLD_A +#else //hard #define OLD_A r3 #define OLD_ALPHA s0 +#endif /****************************************************** * [fp, #-128] - [fp, #-64] is reserved @@ -71,7 +77,10 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define M [fp, #-256 ] #define N [fp, #-260 ] #define K [fp, #-264 ] + +#ifndef ARM_SOFTFP_ABI #define A [fp, #-268 ] +#endif #define FP_ZERO [fp, #-240] #define FP_ZERO_0 [fp, #-240] @@ -79,10 +88,17 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define ALPHA [fp, #-280] +#ifdef ARM_SOFTFP_ABI +#define A [fp, #4 ] +#define B [fp, #8 ] +#define C [fp, #12 ] +#define OLD_LDC [fp, #16 ] +#else //hard #define B [fp, #4 ] #define C [fp, #8 ] #define OLD_LDC [fp, #12 ] - +#endif + #define I r0 #define J r1 #define L r2 @@ -854,9 +870,13 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. str OLD_M, M str OLD_N, N str OLD_K, K + +#ifdef ARM_SOFTFP_ABI + str OLD_ALPHA, ALPHA +#else //hard str OLD_A, A vstr OLD_ALPHA, ALPHA - +#endif sub r3, fp, #128 vstm r3, { s8 - s31} // store floating point registers