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LoongArch64: Fixed utest kernel_regress:skx_avx

This commit is contained in:
gxw 2024-02-26 02:04:37 -05:00
parent 00ae343db0
commit 8dea25ffff
2 changed files with 4 additions and 5 deletions
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2
kernel/loongarch64/rot_lasx.S
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@ -1036,7 +1036,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
add.d Y, Y, INCY add.d Y, Y, INCY
xvfmul.d VT0, VX1, VXC xvfmul.d VT0, VX1, VXC
xvfmadd.d VT0, VX3, VXS, VT0 xvfmadd.d VT0, VX3, VXS, VT0
xvfmul.d VT1, VX0, VXS xvfmul.d VT1, VX1, VXS
xvfmsub.d VT1, VX3, VXC, VT1 xvfmsub.d VT1, VX3, VXC, VT1
xvstelm.d VT0, XX, 0, 0 xvstelm.d VT0, XX, 0, 0
add.d XX, XX, INCX add.d XX, XX, INCX

7
kernel/loongarch64/rot_lsx.S
View File

@ -1142,7 +1142,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifdef DOUBLE #ifdef DOUBLE
vinsgr2vr.d VX0, t1, 0 vinsgr2vr.d VX0, t1, 0
vinsgr2vr.d VX0, t2, 1 vinsgr2vr.d VX0, t2, 1
add.d X, X, INCX
ld.d t1, Y, 0 * SIZE ld.d t1, Y, 0 * SIZE
add.d Y, Y, INCY add.d Y, Y, INCY
ld.d t2, Y, 0 * SIZE ld.d t2, Y, 0 * SIZE
@ -1199,7 +1198,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
add.d Y, Y, INCY add.d Y, Y, INCY
VMUL VT0, VX1, VXC VMUL VT0, VX1, VXC
VFMADD VT0, VX3, VXS, VT0 VFMADD VT0, VX3, VXS, VT0
VMUL VT1, VX0, VXS VMUL VT1, VX1, VXS
VMSUB VT1, VX3, VXC, VT1 VMSUB VT1, VX3, VXC, VT1
vstelm.d VT0, XX, 0, 0 vstelm.d VT0, XX, 0, 0
add.d XX, XX, INCX add.d XX, XX, INCX
@ -1223,7 +1222,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
add.d Y, Y, INCY add.d Y, Y, INCY
VMUL VT0, VX1, VXC VMUL VT0, VX1, VXC
VFMADD VT0, VX3, VXS, VT0 VFMADD VT0, VX3, VXS, VT0
VMUL VT1, VX0, VXS VMUL VT1, VX1, VXS
VMSUB VT1, VX3, VXC, VT1 VMSUB VT1, VX3, VXC, VT1
vstelm.d VT0, XX, 0, 0 vstelm.d VT0, XX, 0, 0
add.d XX, XX, INCX add.d XX, XX, INCX
@ -1296,7 +1295,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
add.d Y, Y, INCY add.d Y, Y, INCY
VMUL VT0, VX1, VXC VMUL VT0, VX1, VXC
VFMADD VT0, VX3, VXS, VT0 VFMADD VT0, VX3, VXS, VT0
VMUL VT1, VX0, VXS VMUL VT1, VX1, VXS
VMSUB VT1, VX3, VXC, VT1 VMSUB VT1, VX3, VXC, VT1
vstelm.w VT0, XX, 0, 0 vstelm.w VT0, XX, 0, 0
add.d XX, XX, INCX add.d XX, XX, INCX