Improvements to GEMV kernels
This commit is contained in:
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78782485b6
commit
8a40f1355e
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@ -68,6 +68,9 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#define SHZ 3
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#endif
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#define A_PRE_SIZE 768
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#define Y_PRE_SIZE 768
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/******************************************************************************/
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.macro SAVE_REGS
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@ -105,36 +108,42 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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ld1 {v2.4s, v3.4s}, [A_PTR], #32
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ld1 {v4.4s, v5.4s}, [Y_IPTR], #32
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fmla v4.4s, v1.4s, v2.4s
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prfm PLDL1KEEP, [A_PTR, #A_PRE_SIZE]
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fmla v5.4s, v1.4s, v3.4s
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st1 {v4.4s, v5.4s}, [Y_OPTR], #32
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ld1 {v6.4s, v7.4s}, [A_PTR], #32
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ld1 {v8.4s, v9.4s}, [Y_IPTR], #32
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fmla v8.4s, v1.4s, v6.4s
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prfm PLDL1KEEP, [Y_IPTR, #Y_PRE_SIZE]
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fmla v9.4s, v1.4s, v7.4s
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st1 {v8.4s, v9.4s}, [Y_OPTR], #32
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#else //DOUBLE
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ld1 {v2.2d, v3.2d}, [A_PTR], #32
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ld1 {v4.2d, v5.2d}, [Y_IPTR], #32
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fmla v4.2d, v1.2d, v2.2d
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prfm PLDL1KEEP, [A_PTR, #A_PRE_SIZE]
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fmla v5.2d, v1.2d, v3.2d
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st1 {v4.2d, v5.2d}, [Y_OPTR], #32
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ld1 {v6.2d, v7.2d}, [A_PTR], #32
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ld1 {v8.2d, v9.2d}, [Y_IPTR], #32
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fmla v8.2d, v1.2d, v6.2d
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prfm PLDL1KEEP, [Y_IPTR, #Y_PRE_SIZE]
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fmla v9.2d, v1.2d, v7.2d
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st1 {v8.2d, v9.2d}, [Y_OPTR], #32
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ld1 {v10.2d, v11.2d}, [A_PTR], #32
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ld1 {v12.2d, v13.2d}, [Y_IPTR], #32
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fmla v12.2d, v1.2d, v10.2d
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prfm PLDL1KEEP, [A_PTR, #A_PRE_SIZE]
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fmla v13.2d, v1.2d, v11.2d
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st1 {v12.2d, v13.2d}, [Y_OPTR], #32
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ld1 {v14.2d, v15.2d}, [A_PTR], #32
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ld1 {v16.2d, v17.2d}, [Y_IPTR], #32
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fmla v16.2d, v1.2d, v14.2d
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prfm PLDL1KEEP, [Y_IPTR, #Y_PRE_SIZE]
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fmla v17.2d, v1.2d, v15.2d
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st1 {v16.2d, v17.2d}, [Y_OPTR], #32
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#endif
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@ -41,6 +41,9 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#define J x11 /* loop variable */
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#define I x12 /* loop variable */
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#define X_PREFETCH_SIZE 768
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#define A_PREFETCH_SIZE 768
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/*******************************************************************************
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* Macro definitions
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*******************************************************************************/
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@ -112,42 +115,54 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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ld1 {v5.4s, v6.4s, v7.4s, v8.4s}, [A_PTR], #64
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ld1 {v9.4s, v10.4s, v11.4s, v12.4s}, [X_PTR], #64
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fmla v1.4s, v5.4s, v9.4s
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prfm PLDL1KEEP, [A_PTR, #A_PREFETCH_SIZE]
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fmla v2.4s, v6.4s, v10.4s
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prfm PLDL1KEEP, [X_PTR, #X_PREFETCH_SIZE]
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fmla v3.4s, v7.4s, v11.4s
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ld1 {v13.4s, v14.4s, v15.4s, v16.4s}, [A_PTR], #64
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fmla v4.4s, v8.4s, v12.4s
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ld1 {v13.4s, v14.4s, v15.4s, v16.4s}, [A_PTR], #64
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ld1 {v17.4s, v18.4s, v19.4s, v20.4s}, [X_PTR], #64
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fmla v1.4s, v13.4s, v17.4s
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prfm PLDL1KEEP, [A_PTR, #A_PREFETCH_SIZE]
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fmla v2.4s, v14.4s, v18.4s
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prfm PLDL1KEEP, [X_PTR, #X_PREFETCH_SIZE]
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fmla v3.4s, v15.4s, v19.4s
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fmla v4.4s, v16.4s, v20.4s
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#else
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ld1 {v5.2d, v6.2d, v7.2d, v8.2d}, [A_PTR], #64
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ld1 {v9.2d, v10.2d, v11.2d, v12.2d}, [X_PTR], #64
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fmla v1.2d, v5.2d, v9.2d
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prfm PLDL1KEEP, [A_PTR, #A_PREFETCH_SIZE]
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fmla v2.2d, v6.2d, v10.2d
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prfm PLDL1KEEP, [X_PTR, #X_PREFETCH_SIZE]
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fmla v3.2d, v7.2d, v11.2d
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fmla v4.2d, v8.2d, v12.2d
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ld1 {v13.2d, v14.2d, v15.2d, v16.2d}, [A_PTR], #64
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ld1 {v17.2d, v18.2d, v19.2d, v20.2d}, [X_PTR], #64
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fmla v1.2d, v13.2d, v17.2d
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prfm PLDL1KEEP, [A_PTR, #A_PREFETCH_SIZE]
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fmla v2.2d, v14.2d, v18.2d
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prfm PLDL1KEEP, [X_PTR, #X_PREFETCH_SIZE]
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fmla v3.2d, v15.2d, v19.2d
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fmla v4.2d, v16.2d, v20.2d
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ld1 {v5.2d, v6.2d, v7.2d, v8.2d}, [A_PTR], #64
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ld1 {v9.2d, v10.2d, v11.2d, v12.2d}, [X_PTR], #64
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fmla v1.2d, v5.2d, v9.2d
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prfm PLDL1KEEP, [A_PTR, #A_PREFETCH_SIZE]
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fmla v2.2d, v6.2d, v10.2d
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prfm PLDL1KEEP, [X_PTR, #X_PREFETCH_SIZE]
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fmla v3.2d, v7.2d, v11.2d
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fmla v4.2d, v8.2d, v12.2d
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ld1 {v13.2d, v14.2d, v15.2d, v16.2d}, [A_PTR], #64
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ld1 {v17.2d, v18.2d, v19.2d, v20.2d}, [X_PTR], #64
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fmla v1.2d, v13.2d, v17.2d
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prfm PLDL1KEEP, [A_PTR, #A_PREFETCH_SIZE]
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fmla v2.2d, v14.2d, v18.2d
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prfm PLDL1KEEP, [X_PTR, #X_PREFETCH_SIZE]
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fmla v3.2d, v15.2d, v19.2d
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fmla v4.2d, v16.2d, v20.2d
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#endif
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@ -43,6 +43,9 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#define Y_OPTR x13 /* loop Y vector address */
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#define X_PTR x14 /* loop X vector address */
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#define A_PRE_SIZE 768
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#define Y_PRE_SIZE 768
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/*******************************************************************************
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* Macro definitions
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*******************************************************************************/
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@ -50,14 +53,10 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#if !defined(DOUBLE)
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#define ALPHA_R s0
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#define ALPHA_I s1
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#define ALPHA_R_COPY s7
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#define ALPHA_I_COPY s8
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#define SHZ 3
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#else
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#define ALPHA_R d0
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#define ALPHA_I d1
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#define ALPHA_R_COPY d7
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#define ALPHA_I_COPY d8
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#define SHZ 4
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#endif
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@ -95,20 +94,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.macro INIT
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/********** INIT FOR F4 LOOP **********/
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fmov ALPHA_R_COPY, ALPHA_R
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fmov ALPHA_I_COPY, ALPHA_I
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#if !defined(DOUBLE)
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ins v7.s[1], v7.s[0] // R(ALPHA), R(ALPHA)
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ins v8.s[1], v8.s[0] // I(ALPHA), I(ALPHA)
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ins v7.d[1], v7.d[0]
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ins v8.d[1], v8.d[0]
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#else
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ins v7.d[1], v7.d[0] // R(ALPHA), R(ALPHA)
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ins v8.d[1], v8.d[0] // I(ALPHA), I(ALPHA)
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#endif
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/******* INIT FOR F1 AND S1 LOOP ******/
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#if !defined(DOUBLE)
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ins v0.s[1], v0.s[0] // R(ALPHA), R(ALPHA)
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eor v2.16b, v2.16b, v2.16b
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@ -129,47 +114,53 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.endm
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.macro INIT_LOOP
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/********** INIT_LOOP FOR F4 LOOP **********/
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#if !defined(DOUBLE)
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ld1 {v9.2s}, [X_PTR] // [I(X), R(X)]
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ins v10.s[0], v9.s[1]
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ins v9.s[1], v9.s[0] // [R(X), R(X)]
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ins v10.s[1], v10.s[0] // [I(X), I(X)]
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ins v9.d[1], v9.d[0]
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ins v10.d[1], v10.d[0]
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#if !defined(CONJ)
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#if !defined(XCONJ)
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fmul v11.4s, v9.4s, v7.4s // [+ R(X) * R(ALPHA)]
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fmls v11.4s, v10.4s, v8.4s // [- I(X) * I(ALPHA)]
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fmul v12.4s, v9.4s, v8.4s // [+ R(X) * I(ALPHA)]
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fmla v12.4s, v10.4s, v7.4s // [+ I(X) * R(ALPHA)]
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#else
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fmul v11.4s, v9.4s, v7.4s // [+ R(X) * R(ALPHA)]
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fmla v11.4s, v10.4s, v8.4s // [+ I(X) * I(ALPHA)]
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fmul v12.4s, v9.4s, v8.4s // [+ R(X) * I(ALPHA)]
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fmls v12.4s, v10.4s, v7.4s // [- I(X) * R(ALPHA)]
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#endif
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#else // CONJ
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#if !defined(XCONJ)
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fmul v11.4s, v9.4s, v7.4s // [+ R(X) * R(ALPHA)]
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fmls v11.4s, v10.4s, v8.4s // [+ I(X) * I(ALPHA)]
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fmul v12.4s, v10.4s, v7.4s // [+ I(X) * R(ALPHA)]
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fmls v12.4s, v9.4s, v8.4s // [- R(X) * I(ALPHA)]
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#else
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fmul v11.4s, v9.4s, v7.4s // [+ R(X) * R(ALPHA)]
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fmls v11.4s, v10.4s, v8.4s // [- I(X) * I(ALPHA)]
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eor v12.16b, v12.16b, v12.16b
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fmls v12.4s, v9.4s, v8.4s // [- R(X) * I(ALPHA)]
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fmla v12.4s, v10.4s, v7.4s // [- I(X) * R(ALPHA)]
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#endif
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#endif // CONJ
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/****** INIT_LOOP FOR F1 AND S1 LOOP ******/
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ld1 {v2.2s}, [X_PTR] // [I(X), R(X)]
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ext v3.8b, v2.8b, v2.8b, #4 // [R(X), I(X)]
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fmul v2.2s, v0.2s, v2.2s
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fmla v2.2s, v1.2s, v3.2s // [I(TEMP), R(TEMP)]
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ins v3.s[0], v2.s[1]
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/********** INIT_LOOP FOR F4 LOOP **********/
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#if !defined(CONJ)
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#if !defined(XCONJ)
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dup v21.4s, v2.s[0] // R[TEMP]
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dup v22.4s, v2.s[0] // R[TEMP]
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eor v25.16b, v25.16b, v25.16b
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fsub s25, s25, s3
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dup v23.4s, v25.s[0] // -I[TEMP]
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dup v24.4s, v3.s[0] // I[TEMP]
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#else
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dup v21.4s, v2.s[0] // R[TEMP]
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dup v22.4s, v2.s[0] // R[TEMP]
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dup v23.4s, v3.s[0] // I[TEMP]
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eor v25.16b, v25.16b, v25.16b
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fsub s25, s25, s3
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dup v24.4s, v25.s[0] // -I[TEMP]
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#endif
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#else // CONJ
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#if !defined(XCONJ)
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dup v21.4s, v2.s[0] // R[TEMP]
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eor v25.16b, v25.16b, v25.16b
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fsub s25, s25, s2
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dup v22.4s, v25.s[0] // R[TEMP]
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dup v23.4s, v3.s[0] // I[TEMP]
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dup v24.4s, v3.s[0] // I[TEMP]
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#else
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dup v21.4s, v2.s[0] // R[TEMP]
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eor v25.16b, v25.16b, v25.16b
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fsub s25, s25, s2
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dup v22.4s, v25.s[0] // R[TEMP]
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eor v25.16b, v25.16b, v25.16b
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fsub s25, s25, s3
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dup v23.4s, v25.s[0] // I[TEMP]
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dup v24.4s, v25.s[0] // I[TEMP]
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#endif
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#endif // CONJ
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/****** INIT_LOOP FOR F1 AND S1 LOOP ******/
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#if !defined(CONJ)
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#if !defined(XCONJ)
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eor v4.16b, v4.16b, v4.16b
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@ -200,45 +191,52 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#endif // CONJ
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#else // DOUBLE
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/********** INIT_LOOP FOR F4 LOOP **********/
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ld1 {v9.2d}, [X_PTR] // [I(X), R(X)]
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ins v10.d[0], v9.d[1]
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ins v9.d[1], v9.d[0] // [R(X), R(X)]
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ins v10.d[1], v10.d[0] // [I(X), I(X)]
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#if !defined(CONJ)
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#if !defined(XCONJ)
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fmul v11.2d, v9.2d, v7.2d // [+ R(X) * R(ALPHA)]
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fmls v11.2d, v10.2d, v8.2d // [- I(X) * I(ALPHA)]
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fmul v12.2d, v9.2d, v8.2d // [+ R(X) * I(ALPHA)]
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fmla v12.2d, v10.2d, v7.2d // [+ I(X) * R(ALPHA)]
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#else
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fmul v11.2d, v9.2d, v7.2d // [+ R(X) * R(ALPHA)]
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fmla v11.2d, v10.2d, v8.2d // [+ I(X) * I(ALPHA)]
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fmul v12.2d, v9.2d, v8.2d // [+ R(X) * I(ALPHA)]
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fmls v12.2d, v10.2d, v7.2d // [- I(X) * R(ALPHA)]
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#endif
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#else // CONJ
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#if !defined(XCONJ)
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fmul v11.2d, v9.2d, v7.2d // [+ R(X) * R(ALPHA)]
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fmls v11.2d, v10.2d, v8.2d // [+ I(X) * I(ALPHA)]
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fmul v12.2d, v10.2d, v7.2d // [+ I(X) * R(ALPHA)]
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fmls v12.2d, v9.2d, v8.2d // [- R(X) * I(ALPHA)]
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#else
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fmul v11.2d, v9.2d, v7.2d // [+ R(X) * R(ALPHA)]
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fmls v11.2d, v10.2d, v8.2d // [- I(X) * I(ALPHA)]
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eor v12.16b, v12.16b, v12.16b
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fmls v12.2d, v9.2d, v8.2d // [- R(X) * I(ALPHA)]
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fmla v12.2d, v10.2d, v7.2d // [- I(X) * R(ALPHA)]
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#endif
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#endif // CONJ
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/****** INIT_LOOP FOR F1 AND S1 LOOP ******/
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ld1 {v2.2d}, [X_PTR] // [I(X), R(X)]
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ext v3.16b, v2.16b, v2.16b, #8 // [R(X), I(X)]
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fmul v2.2d, v0.2d, v2.2d
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fmla v2.2d, v1.2d, v3.2d // [I(TEMP), R(TEMP)]
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ins v3.d[0], v2.d[1] // I(TEMP)
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/****** INIT_LOOP FOR F4 LOOP ******/
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#if !defined(CONJ)
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#if !defined(XCONJ)
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dup v21.2d, v2.d[0] // R[TEMP]
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dup v22.2d, v2.d[0] // R[TEMP]
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eor v25.16b, v25.16b, v25.16b
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fsub d25, d25, d3
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dup v23.2d, v25.d[0] // -I[TEMP]
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dup v24.2d, v3.d[0] // I[TEMP]
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#else
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dup v21.2d, v2.d[0] // R[TEMP]
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dup v22.2d, v2.d[0] // R[TEMP]
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dup v23.2d, v3.d[0] // I[TEMP]
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eor v25.16b, v25.16b, v25.16b
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fsub d25, d25, d3
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dup v24.2d, v25.d[0] // -I[TEMP]
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#endif
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#else // CONJ
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#if !defined(XCONJ)
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dup v21.2d, v2.d[0] // R[TEMP]
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eor v25.16b, v25.16b, v25.16b
|
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fsub d25, d25, d2
|
||||
dup v22.2d, v25.d[0] // R[TEMP]
|
||||
dup v23.2d, v3.d[0] // I[TEMP]
|
||||
dup v24.2d, v3.d[0] // I[TEMP]
|
||||
#else
|
||||
dup v21.2d, v2.d[0] // R[TEMP]
|
||||
eor v25.16b, v25.16b, v25.16b
|
||||
fsub d25, d25, d2
|
||||
dup v22.2d, v25.d[0] // R[TEMP]
|
||||
|
||||
eor v25.16b, v25.16b, v25.16b
|
||||
fsub d25, d25, d3
|
||||
dup v23.2d, v25.d[0] // I[TEMP]
|
||||
dup v24.2d, v25.d[0] // I[TEMP]
|
||||
#endif
|
||||
#endif // CONJ
|
||||
|
||||
|
||||
/****** INIT_LOOP FOR F1 AND S1 LOOP ******/
|
||||
#if !defined(CONJ)
|
||||
#if !defined(XCONJ)
|
||||
eor v4.16b, v4.16b, v4.16b
|
||||
|
@ -276,91 +274,39 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|||
|
||||
ld2 {v13.4s, v14.4s}, [A_PTR], #32
|
||||
ld2 {v15.4s, v16.4s}, [Y_IPTR], #32
|
||||
#if !defined(CONJ)
|
||||
#if !defined(XCONJ)
|
||||
fmla v15.4s, v11.4s, v13.4s // [+ R(ALPHA * X) * A_R]
|
||||
fmls v15.4s, v12.4s, v14.4s // [- I(ALPHA * X) * A_I]
|
||||
fmla v16.4s, v11.4s, v14.4s // [+ R(ALPHA * X) * A_I]
|
||||
fmla v16.4s, v12.4s, v13.4s // [+ I(ALPHA * X) * A_R]
|
||||
#else
|
||||
fmla v15.4s, v11.4s, v13.4s // [+ R(ALPHA * X) * A_R]
|
||||
fmla v15.4s, v12.4s, v14.4s // [+ I(ALPHA * X) * A_I]
|
||||
fmla v16.4s, v11.4s, v14.4s // [+ R(ALPHA * X) * A_I]
|
||||
fmls v16.4s, v12.4s, v13.4s // [- I(ALPHA * X) * A_R]
|
||||
#endif
|
||||
#else // CONJ
|
||||
#if !defined(XCONJ)
|
||||
fmla v15.4s, v11.4s, v13.4s // [+ R(ALPHA * X) * A_R]
|
||||
fmla v15.4s, v12.4s, v14.4s // [+ I(ALPHA * X) * A_I]
|
||||
fmls v16.4s, v11.4s, v14.4s // [- R(ALPHA * X) * A_I]
|
||||
fmla v16.4s, v12.4s, v13.4s // [+ I(ALPHA * X) * A_R]
|
||||
#else
|
||||
fmla v15.4s, v11.4s, v13.4s // [+ R(ALPHA * X) * A_R]
|
||||
fmls v15.4s, v12.4s, v14.4s // [- I(ALPHA * X) * A_I]
|
||||
fmls v16.4s, v11.4s, v14.4s // [- R(ALPHA * X) * A_I]
|
||||
fmls v16.4s, v12.4s, v13.4s // [- I(ALPHA * X) * A_R]
|
||||
#endif
|
||||
#endif // CONJ
|
||||
|
||||
prfm PLDL1KEEP, [A_PTR, #A_PRE_SIZE]
|
||||
prfm PLDL1KEEP, [Y_IPTR, #Y_PRE_SIZE]
|
||||
|
||||
fmla v15.4s, v21.4s, v13.4s
|
||||
fmla v15.4s, v23.4s, v14.4s
|
||||
fmla v16.4s, v22.4s, v14.4s
|
||||
fmla v16.4s, v24.4s, v13.4s
|
||||
|
||||
st2 {v15.4s, v16.4s}, [Y_OPTR], #32
|
||||
|
||||
#else // DOUBLE
|
||||
|
||||
ld2 {v13.2d, v14.2d}, [A_PTR], #32
|
||||
ld2 {v15.2d, v16.2d}, [Y_IPTR], #32
|
||||
#if !defined(CONJ)
|
||||
#if !defined(XCONJ)
|
||||
fmla v15.2d, v11.2d, v13.2d // [+ R(ALPHA * X) * A_R]
|
||||
fmls v15.2d, v12.2d, v14.2d // [- I(ALPHA * X) * A_I]
|
||||
fmla v16.2d, v11.2d, v14.2d // [+ R(ALPHA * X) * A_I]
|
||||
fmla v16.2d, v12.2d, v13.2d // [+ I(ALPHA * X) * A_R]
|
||||
#else
|
||||
fmla v15.2d, v11.2d, v13.2d // [+ R(ALPHA * X) * A_R]
|
||||
fmla v15.2d, v12.2d, v14.2d // [+ I(ALPHA * X) * A_I]
|
||||
fmla v16.2d, v11.2d, v14.2d // [+ R(ALPHA * X) * A_I]
|
||||
fmls v16.2d, v12.2d, v13.2d // [- I(ALPHA * X) * A_R]
|
||||
#endif
|
||||
#else // CONJ
|
||||
#if !defined(XCONJ)
|
||||
fmla v15.2d, v11.2d, v13.2d // [+ R(ALPHA * X) * A_R]
|
||||
fmla v15.2d, v12.2d, v14.2d // [+ I(ALPHA * X) * A_I]
|
||||
fmls v16.2d, v11.2d, v14.2d // [- R(ALPHA * X) * A_I]
|
||||
fmla v16.2d, v12.2d, v13.2d // [+ I(ALPHA * X) * A_R]
|
||||
#else
|
||||
fmla v15.2d, v11.2d, v13.2d // [+ R(ALPHA * X) * A_R]
|
||||
fmls v15.2d, v12.2d, v14.2d // [- I(ALPHA * X) * A_I]
|
||||
fmls v16.2d, v11.2d, v14.2d // [- R(ALPHA * X) * A_I]
|
||||
fmls v16.2d, v12.2d, v13.2d // [- I(ALPHA * X) * A_R]
|
||||
#endif
|
||||
#endif // CONJ
|
||||
prfm PLDL1KEEP, [A_PTR, #A_PRE_SIZE]
|
||||
|
||||
fmla v15.2d, v21.2d, v13.2d
|
||||
fmla v15.2d, v23.2d, v14.2d
|
||||
fmla v16.2d, v22.2d, v14.2d
|
||||
fmla v16.2d, v24.2d, v13.2d
|
||||
|
||||
st2 {v15.2d, v16.2d}, [Y_OPTR], #32
|
||||
|
||||
ld2 {v17.2d, v18.2d}, [A_PTR], #32
|
||||
ld2 {v19.2d, v20.2d}, [Y_IPTR], #32
|
||||
#if !defined(CONJ)
|
||||
#if !defined(XCONJ)
|
||||
fmla v19.2d, v11.2d, v17.2d // [+ R(ALPHA * X) * A_R]
|
||||
fmls v19.2d, v12.2d, v18.2d // [- I(ALPHA * X) * A_I]
|
||||
fmla v20.2d, v11.2d, v18.2d // [+ R(ALPHA * X) * A_I]
|
||||
fmla v20.2d, v12.2d, v17.2d // [+ I(ALPHA * X) * A_R]
|
||||
#else
|
||||
fmla v19.2d, v11.2d, v17.2d // [+ R(ALPHA * X) * A_R]
|
||||
fmla v19.2d, v12.2d, v18.2d // [- I(ALPHA * X) * A_I]
|
||||
fmla v20.2d, v11.2d, v18.2d // [+ R(ALPHA * X) * A_I]
|
||||
fmls v20.2d, v12.2d, v17.2d // [+ I(ALPHA * X) * A_R]
|
||||
#endif
|
||||
#else // CONJ
|
||||
#if !defined(XCONJ)
|
||||
fmla v19.2d, v11.2d, v17.2d // [+ R(ALPHA * X) * A_R]
|
||||
fmla v19.2d, v12.2d, v18.2d // [- I(ALPHA * X) * A_I]
|
||||
fmls v20.2d, v11.2d, v18.2d // [+ R(ALPHA * X) * A_I]
|
||||
fmla v20.2d, v12.2d, v17.2d // [+ I(ALPHA * X) * A_R]
|
||||
#else
|
||||
fmla v19.2d, v11.2d, v17.2d // [+ R(ALPHA * X) * A_R]
|
||||
fmls v19.2d, v12.2d, v18.2d // [- I(ALPHA * X) * A_I]
|
||||
fmls v20.2d, v11.2d, v18.2d // [+ R(ALPHA * X) * A_I]
|
||||
fmls v20.2d, v12.2d, v17.2d // [+ I(ALPHA * X) * A_R]
|
||||
#endif
|
||||
#endif // CONJ
|
||||
prfm PLDL1KEEP, [Y_IPTR, #Y_PRE_SIZE]
|
||||
|
||||
fmla v19.2d, v21.2d, v17.2d
|
||||
fmla v19.2d, v23.2d, v18.2d
|
||||
fmla v20.2d, v22.2d, v18.2d
|
||||
fmla v20.2d, v24.2d, v17.2d
|
||||
|
||||
st2 {v19.2d, v20.2d}, [Y_OPTR], #32
|
||||
|
||||
#endif
|
||||
|
@ -445,10 +391,7 @@ zgemv_n_kernel_F_LOOP:
|
|||
|
||||
zgemv_n_kernel_F4:
|
||||
|
||||
KERNEL_F1
|
||||
KERNEL_F1
|
||||
KERNEL_F1
|
||||
KERNEL_F1
|
||||
KERNEL_F4
|
||||
|
||||
subs I, I, #1
|
||||
bne zgemv_n_kernel_F4
|
||||
|
|
|
@ -41,6 +41,9 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|||
#define J x11 /* loop variable */
|
||||
#define I x12 /* loop variable */
|
||||
|
||||
#define A_PRE_SIZE 768
|
||||
#define X_PRE_SIZE 768
|
||||
|
||||
/*******************************************************************************
|
||||
* Macro definitions
|
||||
*******************************************************************************/
|
||||
|
@ -139,6 +142,8 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|||
|
||||
ld2 {v11.4s, v12.4s}, [X_PTR], #32
|
||||
ld2 {v13.4s, v14.4s}, [A_PTR], #32
|
||||
prfm PLDL1STRM, [X_PTR, #X_PRE_SIZE]
|
||||
prfm PLDL1STRM, [A_PTR, #A_PRE_SIZE]
|
||||
|
||||
#if (!defined(CONJ) && !defined(XCONJ)) || (defined(CONJ) && defined(XCONJ))
|
||||
fmla v9.4s, v11.4s, v13.4s // [+ R(X) * A_R]
|
||||
|
@ -155,7 +160,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|||
#else // DOUBLE
|
||||
ld2 {v11.2d, v12.2d}, [X_PTR], #32
|
||||
ld2 {v13.2d, v14.2d}, [A_PTR], #32
|
||||
prfm PLDL1STRM, [X_PTR, #512]
|
||||
prfm PLDL1STRM, [X_PTR, #X_PRE_SIZE]
|
||||
|
||||
#if (!defined(CONJ) && !defined(XCONJ)) || (defined(CONJ) && defined(XCONJ))
|
||||
fmla v9.2d, v11.2d, v13.2d // [+ R(X) * A_R]
|
||||
|
@ -171,7 +176,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|||
|
||||
ld2 {v17.2d, v18.2d}, [X_PTR], #32
|
||||
ld2 {v19.2d, v20.2d}, [A_PTR], #32
|
||||
prfm PLDL1STRM, [A_PTR, #512]
|
||||
prfm PLDL1STRM, [A_PTR, #A_PRE_SIZE]
|
||||
|
||||
#if (!defined(CONJ) && !defined(XCONJ)) || (defined(CONJ) && defined(XCONJ))
|
||||
fmla v15.2d, v17.2d, v19.2d // [+ R(X) * A_R]
|
||||
|
|
Loading…
Reference in New Issue