Merge pull request #4529 from ErnstPeng/feature-branch
Optimized sgemv and dgemv kernel LSX for LoongArch
This commit is contained in:
Martin Kroeker
GitHub
commit
577d480c62
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@ -85,6 +85,12 @@ ZSWAPKERNEL = cswap_lsx.S
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CSUMKERNEL = csum_lsx.S
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ZSUMKERNEL = csum_lsx.S
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SGEMVNKERNEL = sgemv_n_lsx.S
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SGEMVTKERNEL = sgemv_t_lsx.S
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DGEMVNKERNEL = dgemv_n_lsx.S
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DGEMVTKERNEL = dgemv_t_lsx.S
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DGEMMKERNEL = dgemm_kernel_8x4.S
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DGEMMINCOPY = dgemm_ncopy_8_lsx.S
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DGEMMITCOPY = dgemm_tcopy_8_lsx.S
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@ -0,0 +1,229 @@
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/*******************************************************************************
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Copyright (c) 2024, The OpenBLAS Project
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All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are
|
||||
met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
|
||||
3. Neither the name of the OpenBLAS project nor the names of
|
||||
its contributors may be used to endorse or promote products
|
||||
derived from this software without specific prior written permission.
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
|
||||
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************/
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#define ASSEMBLER
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#include "common.h"
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/* Param */
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#define M $r4
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#define N $r5
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#define A $r7
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#define LDA $r8
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#define X $r9
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#define INCX $r10
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#define Y $r11
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#define INCY $r6
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#define BUFFER $r16
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#define ALPHA $f0
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#define YORIG $r18
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#define T0 $r19
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#define T1 $r20
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#define XX $r12
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#define YY $r13
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#define I $r14
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#define J $r15
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#define AO1 $r23
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#define AO2 $r24
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#define IX $r25
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#define IY $r26
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#define II $r27
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#define T2 $r28
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#define T3 $r29
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#define T4 $r30
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/* LSX vectors */
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#define U0 $vr11
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#define U1 $vr12
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#define U2 $vr2
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#define U3 $vr3
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#define U4 $vr4
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#define U5 $vr5
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#define U6 $vr6
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#define U7 $vr7
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#define U8 $vr8
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#define U9 $vr9
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#define VALPHA $vr10
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#define a1 $f3
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#define a2 $f4
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#define a3 $f5
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#define a4 $f6
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#define a5 $f7
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#define a6 $f8
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#define a7 $f9
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#define a8 $f10
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PROLOGUE
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LDARG INCY, $sp, 0
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LDARG BUFFER, $sp, 8
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addi.d $sp, $sp, -80
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SDARG $r23, $sp, 0
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SDARG $r24, $sp, 8
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SDARG $r25, $sp, 16
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SDARG $r26, $sp, 32
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SDARG $r27, $sp, 40
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SDARG $r28, $sp, 48
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SDARG $r29, $sp, 56
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SDARG $r30, $sp, 64
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ST ALPHA, $sp, 72
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vldrepl.d VALPHA, $sp, 72
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slli.d LDA, LDA, BASE_SHIFT
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slli.d INCX, INCX, BASE_SHIFT
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slli.d INCY, INCY, BASE_SHIFT
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bge $r0, M, .L999
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bge $r0, N, .L999
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move J, $r0
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move IX, $r0
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move AO1, A //a_ptr
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move XX, X
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move YY, Y
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beq J, M, .L999
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.L01:
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vldx U0, XX, IX
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vshuf4i.d U0, U0, 0x00
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vfmul.d U1, VALPHA, U0 //temp1
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move IY, $r0
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move II, $r0
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move I, $r0
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srai.d T0, M, 2 //n/4
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beq I, T0, .L03
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.L02:
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vldx U2, AO1, II
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addi.d II, II, 16
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vldx U7, AO1, II
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move T1, IY
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add.d T2, T1, INCY
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add.d T3, T2, INCY
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add.d T4, T3, INCY
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fldx.d a1, YY, T1
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fldx.d a2, YY, T2
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fldx.d a3, YY, T3
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fldx.d a4, YY, T4
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vextrins.d U3, U4, 0x10
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vextrins.d U5, U6, 0x10
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vfmadd.d U3, U1, U2, U3
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vfmadd.d U5, U1, U7, U5
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vextrins.d U4, U3, 0x01
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vextrins.d U6, U5, 0x01
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fstx.d a1, YY, T1
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fstx.d a2, YY, T2
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fstx.d a3, YY, T3
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fstx.d a4, YY, T4
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add.d IY, T4, INCY
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addi.d II, II, 16
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addi.d I, I, 1
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blt I, T0, .L02
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.L03:
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andi T0, M, 2
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beq $r0, T0, .L04
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addi.d T1, $r0, 4
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mod.d T1, M, T1
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sub.d II, M, T1
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slli.d II, II, BASE_SHIFT
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move T1, IY
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add.d T2, T1, INCY
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vldx U2, AO1, II
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fldx.d a1, YY, T1
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fldx.d a2, YY, T2
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vextrins.d U3, U4, 0x10
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vfmadd.d U3, U1, U2, U3
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vextrins.d U4, U3, 0x01
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fstx.d a1, YY, T1
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fstx.d a2, YY, T2
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add.d IY, T2, INCY
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.L04:
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andi T0, M, 1
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beq $r0, T0, .L05
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addi.d II, M, -1
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slli.d II, II, BASE_SHIFT
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fldx.d a1, AO1, II
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fldx.d a3, YY, IY
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fmadd.d a3, $f12, a1, a3
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fstx.d a3, YY, IY
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add.d IY, IY, INCY
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.L05:
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add.d AO1, AO1, LDA
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add.d IX, IX, INCX
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addi.d J, J, 1
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blt J, N, .L01
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.L999:
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LDARG $r23, $sp, 0
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LDARG $r24, $sp, 8
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LDARG $r25, $sp, 16
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LDARG $r26, $sp, 32
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LDARG $r27, $sp, 40
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LDARG $r28, $sp, 48
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LDARG $r29, $sp, 56
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LDARG $r30, $sp, 64
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LD ALPHA, $sp, 72
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addi.d $sp, $sp, 80
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jirl $r0, $r1, 0x0
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EPILOGUE
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@ -0,0 +1,279 @@
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/*******************************************************************************
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Copyright (c) 2024, The OpenBLAS Project
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are
|
||||
met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
|
||||
3. Neither the name of the OpenBLAS project nor the names of
|
||||
its contributors may be used to endorse or promote products
|
||||
derived from this software without specific prior written permission.
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
|
||||
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************/
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#define ASSEMBLER
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#include "common.h"
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/* Param */
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#define M $r4
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#define N $r5
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#define A $r7
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#define LDA $r8
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#define X $r9
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#define INCX $r10
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#define Y $r11
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#define INCY $r6
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#define BUFFER $r16
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#define ALPHA $f0
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#define YORIG $r18
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#define T0 $r19
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#define T1 $r20
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#define AO3 $r12
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#define AO4 $r13
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#define I $r14
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#define J $r15
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#define AO1 $r23
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#define AO2 $r24
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#define IX $r25
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#define IY $r26
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#define II $r27
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#define T2 $r28
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#define T3 $r29
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#define T4 $r30
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/* LSX vectors */
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#define U0 $vr11
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#define U1 $vr12
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#define U2 $vr2
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#define U3 $vr3
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#define U4 $vr4
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#define U5 $vr5
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#define U6 $vr6
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#define U7 $vr7
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#define U8 $vr8
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#define U9 $vr9
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#define VALPHA $vr10
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#define a1 $f3
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#define a2 $f4
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#define a3 $f5
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#define a4 $f6
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#define a5 $f7
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#define a6 $f8
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#define a7 $f9
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#define a8 $f10
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PROLOGUE
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LDARG INCY, $sp, 0
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LDARG BUFFER, $sp, 8
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addi.d $sp, $sp, -80
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SDARG $r23, $sp, 0
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SDARG $r24, $sp, 8
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SDARG $r25, $sp, 16
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SDARG $r26, $sp, 32
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SDARG $r27, $sp, 40
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SDARG $r28, $sp, 48
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SDARG $r29, $sp, 56
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SDARG $r30, $sp, 64
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ST ALPHA, $sp, 72
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vldrepl.d VALPHA, $sp, 72
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slli.d LDA, LDA, BASE_SHIFT
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slli.d INCX, INCX, BASE_SHIFT
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slli.d INCY, INCY, BASE_SHIFT
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bge $r0, M, .L999
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bge $r0, N, .L999
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move J, $r0
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move IY, $r0
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move AO1, A //a_ptr1
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srai.d T0, N, 2 //n/4
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beq J, T0, .L04
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.L01: /* j<n/4 */
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vxor.v U0, U0, U0
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vxor.v U7, U7, U7
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add.d AO2, AO1, LDA
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add.d AO3, AO2, LDA
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add.d AO4, AO3, LDA
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move IX, $r0
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move I, $r0
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move II, $r0
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beq $r0, M, .L03
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.L02: /* i<m */
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vldx U1, X, IX
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fldx.d $f2, AO1, II
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fldx.d $f3, AO2, II
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fldx.d $f4, AO3, II
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fldx.d $f5, AO4, II
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|
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vshuf4i.d U1, U1, 0x00
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vextrins.d U2, U3, 0x10
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vextrins.d U4, U5, 0x10
|
||||
|
||||
vfmadd.d U0, U2, U1, U0 //temp1,2
|
||||
vfmadd.d U7, U4, U1, U7 //temp3,4
|
||||
|
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add.d IX, IX, INCX
|
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|
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addi.d II, II, 8
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addi.d I, I, 1
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blt I, M, .L02
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||||
|
||||
.L03:
|
||||
move T1, IY
|
||||
add.d T2, T1, INCY
|
||||
add.d T3, T2, INCY
|
||||
add.d T4, T3, INCY
|
||||
|
||||
fldx.d $f3, Y, T1
|
||||
fldx.d $f4, Y, T2
|
||||
fldx.d $f5, Y, T3
|
||||
fldx.d $f6, Y, T4
|
||||
|
||||
vextrins.d U3, U4, 0x10
|
||||
vextrins.d U5, U6, 0x10
|
||||
|
||||
vfmadd.d U3, VALPHA, U0, U3
|
||||
vfmadd.d U5, VALPHA, U7, U5
|
||||
|
||||
vextrins.d U4, U3, 0x01
|
||||
vextrins.d U6, U5, 0x01
|
||||
|
||||
fstx.d $f3, Y, T1
|
||||
fstx.d $f4, Y, T2
|
||||
fstx.d $f5, Y, T3
|
||||
fstx.d $f6, Y, T4
|
||||
|
||||
slli.d T1, LDA, 2
|
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add.d AO1, AO1, T1
|
||||
add.d IY, T4, INCY
|
||||
|
||||
addi.d J, J, 1
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blt J, T0, .L01
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|
||||
.L04: /* if(n&2) */
|
||||
andi T0, N, 2
|
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beq $r0, T0, .L07
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||||
|
||||
vxor.v U0, U0, U0
|
||||
|
||||
add.d AO2, AO1, LDA
|
||||
|
||||
move IX, $r0
|
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move I, $r0
|
||||
move II, $r0
|
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|
||||
beq $r0, M, .L06
|
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|
||||
.L05: /* i<m */
|
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vldx U1, X, IX
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fldx.d $f2, AO1, II
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fldx.d $f3, AO2, II
|
||||
|
||||
vshuf4i.d U1, U1, 0x00
|
||||
vextrins.d U2, U3, 0x10
|
||||
|
||||
vfmadd.d U0, U2, U1, U0 //temp1,2
|
||||
|
||||
add.d IX, IX, INCX
|
||||
|
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addi.d II, II, 8
|
||||
addi.d I, I, 1
|
||||
blt I, M, .L05
|
||||
|
||||
.L06:
|
||||
move T1, IY
|
||||
add.d T2, T1, INCY
|
||||
|
||||
fldx.d a1, Y, T1
|
||||
fldx.d a2, Y, T2
|
||||
|
||||
vextrins.d U3, U4, 0x10
|
||||
|
||||
vfmadd.d U3, VALPHA, U0, U3
|
||||
|
||||
vextrins.d U4, U3, 0x01
|
||||
|
||||
fstx.d a1, Y, T1
|
||||
fstx.d a2, Y, T2
|
||||
|
||||
slli.d T0, LDA, 1
|
||||
add.d AO1, AO1, T0
|
||||
add.d IY, T2, INCY
|
||||
|
||||
.L07: /* if(n&1) */
|
||||
andi T0, N, 1
|
||||
beq $r0, T0, .L999
|
||||
|
||||
MTC a1, $r0
|
||||
|
||||
move IX, $r0
|
||||
move I, $r0
|
||||
move II, $r0
|
||||
|
||||
beq $r0, M, .L09
|
||||
|
||||
.L08: /* i<m */
|
||||
fldx.d a3, X, IX
|
||||
fldx.d a4, AO1, II
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||||
|
||||
fmadd.d a1, a4, a3, a1 //temp1
|
||||
|
||||
add.d IX, IX, INCX
|
||||
|
||||
addi.d II, II, 8
|
||||
addi.d I, I, 1
|
||||
blt I, M, .L08
|
||||
|
||||
.L09:
|
||||
fldx.d a3, Y, IY
|
||||
|
||||
fmadd.d a3, ALPHA, a1, a3
|
||||
|
||||
fstx.d a3, Y, IY
|
||||
|
||||
add.d AO1, AO1, LDA
|
||||
add.d IY, IY, INCY
|
||||
|
||||
.L999:
|
||||
LDARG $r23, $sp, 0
|
||||
LDARG $r24, $sp, 8
|
||||
LDARG $r25, $sp, 16
|
||||
LDARG $r26, $sp, 32
|
||||
LDARG $r27, $sp, 40
|
||||
LDARG $r28, $sp, 48
|
||||
LDARG $r29, $sp, 56
|
||||
LDARG $r30, $sp, 64
|
||||
LD ALPHA, $sp, 72
|
||||
addi.d $sp, $sp, 80
|
||||
jirl $r0, $r1, 0x0
|
||||
|
||||
EPILOGUE
|
||||
|
|
@ -0,0 +1,227 @@
|
|||
/*******************************************************************************
|
||||
Copyright (c) 2024, The OpenBLAS Project
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are
|
||||
met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
|
||||
3. Neither the name of the OpenBLAS project nor the names of
|
||||
its contributors may be used to endorse or promote products
|
||||
derived from this software without specific prior written permission.
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
|
||||
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************/
|
||||
|
||||
#define ASSEMBLER
|
||||
|
||||
#include "common.h"
|
||||
|
||||
/* Param */
|
||||
#define M $r4
|
||||
#define N $r5
|
||||
#define A $r7
|
||||
#define LDA $r8
|
||||
#define X $r9
|
||||
#define INCX $r10
|
||||
#define Y $r11
|
||||
#define INCY $r6
|
||||
#define BUFFER $r16
|
||||
#define ALPHA $f0
|
||||
|
||||
#define YORIG $r18
|
||||
#define T0 $r19
|
||||
#define T1 $r20
|
||||
#define XX $r12
|
||||
#define YY $r13
|
||||
#define I $r14
|
||||
#define J $r15
|
||||
#define AO1 $r23
|
||||
#define AO2 $r24
|
||||
#define IX $r25
|
||||
#define IY $r26
|
||||
#define II $r27
|
||||
#define T2 $r28
|
||||
#define T3 $r29
|
||||
#define T4 $r30
|
||||
|
||||
/* LSX vectors */
|
||||
#define U0 $vr11
|
||||
#define U1 $vr12
|
||||
#define U2 $vr2
|
||||
#define U3 $vr3
|
||||
#define U4 $vr4
|
||||
#define U5 $vr5
|
||||
#define U6 $vr6
|
||||
#define U7 $vr7
|
||||
#define U8 $vr8
|
||||
#define U9 $vr9
|
||||
#define VALPHA $vr10
|
||||
|
||||
#define a1 $f3
|
||||
#define a2 $f4
|
||||
#define a3 $f5
|
||||
#define a4 $f6
|
||||
#define a5 $f7
|
||||
#define a6 $f8
|
||||
#define a7 $f9
|
||||
#define a8 $f10
|
||||
|
||||
|
||||
PROLOGUE
|
||||
|
||||
LDARG INCY, $sp, 0
|
||||
LDARG BUFFER, $sp, 8
|
||||
|
||||
addi.d $sp, $sp, -80
|
||||
|
||||
SDARG $r23, $sp, 0
|
||||
SDARG $r24, $sp, 8
|
||||
SDARG $r25, $sp, 16
|
||||
SDARG $r26, $sp, 32
|
||||
SDARG $r27, $sp, 40
|
||||
SDARG $r28, $sp, 48
|
||||
SDARG $r29, $sp, 56
|
||||
SDARG $r30, $sp, 64
|
||||
ST ALPHA, $sp, 72
|
||||
|
||||
vldrepl.w VALPHA, $sp, 72
|
||||
|
||||
slli.d LDA, LDA, BASE_SHIFT
|
||||
slli.d INCX, INCX, BASE_SHIFT
|
||||
slli.d INCY, INCY, BASE_SHIFT
|
||||
|
||||
bge $r0, M, .L999
|
||||
bge $r0, N, .L999
|
||||
|
||||
move J, $r0
|
||||
move IX, $r0
|
||||
|
||||
move AO1, A //a_ptr
|
||||
move XX, X
|
||||
move YY, Y
|
||||
|
||||
beq J, M, .L999
|
||||
|
||||
.L01:
|
||||
vldx U0, XX, IX
|
||||
vpermi.w U0, U0, 0x00
|
||||
|
||||
vfmul.s U1, VALPHA, U0 //temp1
|
||||
|
||||
move IY, $r0
|
||||
move II, $r0
|
||||
move I, $r0
|
||||
|
||||
srai.d T0, M, 2 //n/4
|
||||
beq I, T0, .L03
|
||||
|
||||
.L02:
|
||||
vldx U2, AO1, II
|
||||
|
||||
move T1, IY
|
||||
add.d T2, T1, INCY
|
||||
add.d T3, T2, INCY
|
||||
add.d T4, T3, INCY
|
||||
|
||||
fldx.s a1, YY, T1
|
||||
fldx.s a2, YY, T2
|
||||
fldx.s a3, YY, T3
|
||||
fldx.s a4, YY, T4
|
||||
|
||||
vextrins.w U3, U4, 0x10
|
||||
vextrins.w U3, U5, 0x20
|
||||
vextrins.w U3, U6, 0x30
|
||||
|
||||
vfmadd.s U3, U1, U2, U3
|
||||
|
||||
vextrins.w U4, U3, 0x01
|
||||
vextrins.w U5, U3, 0x02
|
||||
vextrins.w U6, U3, 0x03
|
||||
|
||||
fstx.s a1, YY, T1
|
||||
fstx.s a2, YY, T2
|
||||
fstx.s a3, YY, T3
|
||||
fstx.s a4, YY, T4
|
||||
|
||||
add.d IY, T4, INCY
|
||||
addi.d II, II, 16
|
||||
addi.d I, I, 1
|
||||
blt I, T0, .L02
|
||||
|
||||
.L03:
|
||||
andi T0, M, 2
|
||||
beq $r0, T0, .L04
|
||||
|
||||
addi.d T1, $r0, 4
|
||||
mod.d T1, M, T1
|
||||
sub.d II, M, T1
|
||||
slli.d II, II, BASE_SHIFT
|
||||
|
||||
move T1, IY
|
||||
add.d T2, T1, INCY
|
||||
|
||||
fldx.s a1, AO1, II
|
||||
addi.d T0, II, 4
|
||||
fldx.s a2, AO1, T0
|
||||
|
||||
fldx.s a3, YY, T1
|
||||
fldx.s a4, YY, T2
|
||||
|
||||
fmadd.s a3, $f12, a1, a3
|
||||
fmadd.s a4, $f12, a2, a4
|
||||
|
||||
fstx.s a3, YY, T1
|
||||
fstx.s a4, YY, T2
|
||||
|
||||
add.d IY, T2, INCY
|
||||
|
||||
.L04:
|
||||
andi T0, M, 1
|
||||
beq $r0, T0, .L05
|
||||
|
||||
addi.d II, M, -1
|
||||
slli.d II, II, BASE_SHIFT
|
||||
|
||||
fldx.s a1, AO1, II
|
||||
fldx.s a3, YY, IY
|
||||
|
||||
fmadd.s a3, $f12, a1, a3
|
||||
|
||||
fstx.s a3, YY, IY
|
||||
|
||||
add.d IY, IY, INCY
|
||||
|
||||
.L05:
|
||||
add.d AO1, AO1, LDA
|
||||
add.d IX, IX, INCX
|
||||
|
||||
addi.d J, J, 1
|
||||
blt J, N, .L01
|
||||
|
||||
.L999:
|
||||
LDARG $r23, $sp, 0
|
||||
LDARG $r24, $sp, 8
|
||||
LDARG $r25, $sp, 16
|
||||
LDARG $r26, $sp, 32
|
||||
LDARG $r27, $sp, 40
|
||||
LDARG $r28, $sp, 48
|
||||
LDARG $r29, $sp, 56
|
||||
LDARG $r30, $sp, 64
|
||||
LD ALPHA, $sp, 72
|
||||
addi.d $sp, $sp, 80
|
||||
jirl $r0, $r1, 0x0
|
||||
|
||||
EPILOGUE
|
||||
|
|
@ -0,0 +1,275 @@
|
|||
/*******************************************************************************
|
||||
Copyright (c) 2024, The OpenBLAS Project
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are
|
||||
met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
|
||||
3. Neither the name of the OpenBLAS project nor the names of
|
||||
its contributors may be used to endorse or promote products
|
||||
derived from this software without specific prior written permission.
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
|
||||
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************/
|
||||
|
||||
#define ASSEMBLER
|
||||
|
||||
#include "common.h"
|
||||
|
||||
/* Param */
|
||||
#define M $r4
|
||||
#define N $r5
|
||||
#define A $r7
|
||||
#define LDA $r8
|
||||
#define X $r9
|
||||
#define INCX $r10
|
||||
#define Y $r11
|
||||
#define INCY $r6
|
||||
#define BUFFER $r16
|
||||
#define ALPHA $f0
|
||||
|
||||
#define YORIG $r18
|
||||
#define T0 $r19
|
||||
#define T1 $r20
|
||||
#define AO3 $r12
|
||||
#define AO4 $r13
|
||||
#define I $r14
|
||||
#define J $r15
|
||||
#define AO1 $r23
|
||||
#define AO2 $r24
|
||||
#define IX $r25
|
||||
#define IY $r26
|
||||
#define II $r27
|
||||
#define T2 $r28
|
||||
#define T3 $r29
|
||||
#define T4 $r30
|
||||
|
||||
/* LSX vectors */
|
||||
#define U0 $vr11
|
||||
#define U1 $vr12
|
||||
#define U2 $vr2
|
||||
#define U3 $vr3
|
||||
#define U4 $vr4
|
||||
#define U5 $vr5
|
||||
#define U6 $vr6
|
||||
#define U7 $vr7
|
||||
#define U8 $vr8
|
||||
#define U9 $vr9
|
||||
#define VALPHA $vr10
|
||||
|
||||
#define a1 $f3
|
||||
#define a2 $f4
|
||||
#define a3 $f5
|
||||
#define a4 $f6
|
||||
#define a5 $f7
|
||||
#define a6 $f8
|
||||
#define a7 $f9
|
||||
#define a8 $f10
|
||||
|
||||
|
||||
PROLOGUE
|
||||
|
||||
LDARG INCY, $sp, 0
|
||||
LDARG BUFFER, $sp, 8
|
||||
|
||||
addi.d $sp, $sp, -80
|
||||
|
||||
SDARG $r23, $sp, 0
|
||||
SDARG $r24, $sp, 8
|
||||
SDARG $r25, $sp, 16
|
||||
SDARG $r26, $sp, 32
|
||||
SDARG $r27, $sp, 40
|
||||
SDARG $r28, $sp, 48
|
||||
SDARG $r29, $sp, 56
|
||||
SDARG $r30, $sp, 64
|
||||
ST ALPHA, $sp, 72
|
||||
|
||||
vldrepl.w VALPHA, $sp, 72
|
||||
|
||||
slli.d LDA, LDA, BASE_SHIFT
|
||||
slli.d INCX, INCX, BASE_SHIFT
|
||||
slli.d INCY, INCY, BASE_SHIFT
|
||||
|
||||
bge $r0, M, .L999
|
||||
bge $r0, N, .L999
|
||||
|
||||
move J, $r0
|
||||
move IY, $r0
|
||||
|
||||
move AO1, A //a_ptr1
|
||||
|
||||
srai.d T0, N, 2 //n/4
|
||||
beq J, T0, .L04
|
||||
|
||||
.L01: /* j<n/4 */
|
||||
vxor.v U0, U0, U0
|
||||
add.d AO2, AO1, LDA
|
||||
add.d AO3, AO2, LDA
|
||||
add.d AO4, AO3, LDA
|
||||
|
||||
move IX, $r0
|
||||
move I, $r0
|
||||
move II, $r0
|
||||
|
||||
beq $r0, M, .L03
|
||||
|
||||
.L02: /* i<m */
|
||||
vldx U1, X, IX
|
||||
fldx.s $f2, AO1, II
|
||||
fldx.s $f3, AO2, II
|
||||
fldx.s $f4, AO3, II
|
||||
fldx.s $f5, AO4, II
|
||||
|
||||
vpermi.w U1, U1, 0x00
|
||||
vextrins.w U2, U3, 0x10
|
||||
vextrins.w U2, U4, 0x20
|
||||
vextrins.w U2, U5, 0x30
|
||||
|
||||
vfmadd.s U0, U2, U1, U0 //temp1,2,3,4
|
||||
|
||||
add.d IX, IX, INCX
|
||||
|
||||
addi.d II, II, 4
|
||||
addi.d I, I, 1
|
||||
blt I, M, .L02
|
||||
|
||||
.L03:
|
||||
move T1, IY
|
||||
add.d T2, T1, INCY
|
||||
add.d T3, T2, INCY
|
||||
add.d T4, T3, INCY
|
||||
|
||||
fldx.s a1, Y, T1
|
||||
fldx.s a2, Y, T2
|
||||
fldx.s a3, Y, T3
|
||||
fldx.s a4, Y, T4
|
||||
|
||||
vextrins.w U3, U4, 0x10
|
||||
vextrins.w U3, U5, 0x20
|
||||
vextrins.w U3, U6, 0x30
|
||||
|
||||
vfmadd.s U3, VALPHA, U0, U3
|
||||
|
||||
vextrins.w U4, U3, 0x01
|
||||
vextrins.w U5, U3, 0x02
|
||||
vextrins.w U6, U3, 0x03
|
||||
|
||||
fstx.s a1, Y, T1
|
||||
fstx.s a2, Y, T2
|
||||
fstx.s a3, Y, T3
|
||||
fstx.s a4, Y, T4
|
||||
|
||||
slli.d T1, LDA, 2
|
||||
add.d AO1, AO1, T1
|
||||
add.d IY, T4, INCY
|
||||
|
||||
addi.d J, J, 1
|
||||
blt J, T0, .L01
|
||||
|
||||
.L04: /* if(n&2) */
|
||||
andi T0, N, 2
|
||||
beq $r0, T0, .L07
|
||||
|
||||
MTC a1, $r0
|
||||
MTC a2, $r0
|
||||
|
||||
add.d AO2, AO1, LDA
|
||||
|
||||
move IX, $r0
|
||||
move I, $r0
|
||||
move II, $r0
|
||||
|
||||
beq $r0, M, .L06
|
||||
|
||||
.L05: /* i<m */
|
||||
fldx.s a3, X, IX
|
||||
fldx.s a4, AO1, II
|
||||
fldx.s a5, AO2, II
|
||||
|
||||
fmadd.s a1, a4, a3, a1 //temp1
|
||||
fmadd.s a2, a5, a3, a2 //temp2
|
||||
|
||||
add.d IX, IX, INCX
|
||||
|
||||
addi.d II, II, 4
|
||||
addi.d I, I, 1
|
||||
blt I, M, .L05
|
||||
|
||||
.L06:
|
||||
move T1, IY
|
||||
add.d T2, T1, INCY
|
||||
|
||||
fldx.s a3, Y, T1
|
||||
fldx.s a4, Y, T2
|
||||
|
||||
fmadd.s a3, ALPHA, a1, a3
|
||||
fmadd.s a4, ALPHA, a2, a4
|
||||
|
||||
fstx.s a3, Y, T1
|
||||
fstx.s a4, Y, T2
|
||||
|
||||
slli.d T0, LDA, 1
|
||||
add.d AO1, AO1, T0
|
||||
add.d IY, T2, INCY
|
||||
|
||||
.L07: /* if(n&1) */
|
||||
andi T0, N, 1
|
||||
beq $r0, T0, .L999
|
||||
|
||||
MTC a1, $r0
|
||||
|
||||
move IX, $r0
|
||||
move I, $r0
|
||||
move II, $r0
|
||||
|
||||
beq $r0, M, .L09
|
||||
|
||||
.L08: /* i<m */
|
||||
fldx.s a3, X, IX
|
||||
fldx.s a4, AO1, II
|
||||
|
||||
fmadd.s a1, a4, a3, a1 //temp1
|
||||
|
||||
add.d IX, IX, INCX
|
||||
|
||||
addi.d II, II, 4
|
||||
addi.d I, I, 1
|
||||
blt I, M, .L08
|
||||
|
||||
.L09:
|
||||
fldx.s a3, Y, IY
|
||||
|
||||
fmadd.s a3, ALPHA, a1, a3
|
||||
|
||||
fstx.s a3, Y, IY
|
||||
|
||||
add.d AO1, AO1, LDA
|
||||
add.d IY, IY, INCY
|
||||
|
||||
.L999:
|
||||
LDARG $r23, $sp, 0
|
||||
LDARG $r24, $sp, 8
|
||||
LDARG $r25, $sp, 16
|
||||
LDARG $r26, $sp, 32
|
||||
LDARG $r27, $sp, 40
|
||||
LDARG $r28, $sp, 48
|
||||
LDARG $r29, $sp, 56
|
||||
LDARG $r30, $sp, 64
|
||||
LD ALPHA, $sp, 72
|
||||
addi.d $sp, $sp, 80
|
||||
jirl $r0, $r1, 0x0
|
||||
|
||||
EPILOGUE
|
||||
Loading…
Reference in New Issue