From f2cde2ccfb5c58a38300cf003c3edbe2a607c516 Mon Sep 17 00:00:00 2001
From: Martin Kroeker <martin@ruby.chemie.uni-freiburg.de>
Date: Tue, 8 Oct 2019 20:12:08 +0200
Subject: [PATCH 1/2] Update common_arm64.h

---
 common_arm64.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/common_arm64.h b/common_arm64.h
index c5e6948dc..13718af5a 100644
--- a/common_arm64.h
+++ b/common_arm64.h
@@ -78,7 +78,17 @@ static void __inline blas_lock(volatile BLASULONG *address){
 
 #define BLAS_LOCK_DEFINED
 
+static __inline BLASULONG rpcc(void){
+  BLASULONG ret = 0;
+ 
+  __asm__ __volatile__ ("mrs %0,cntvct_el0":"=r"(ret));
 
+  return ret;
+}
+
+#define RPCC_DEFINED
+#define RPCC64BIT
+ 
 
 static inline int blas_quickdivide(blasint x, blasint y){
   return x / y;

From b687fba5bcb9192499d84f2d0d250230cad09407 Mon Sep 17 00:00:00 2001
From: Martin Kroeker <martin@ruby.chemie.uni-freiburg.de>
Date: Thu, 24 Oct 2019 21:18:17 +0200
Subject: [PATCH 2/2] Disable direct clock register access on IOS and Android

as I find conflicting information on accessibility from non-priviledged processes
---
 common_arm64.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/common_arm64.h b/common_arm64.h
index 13718af5a..376f81e60 100644
--- a/common_arm64.h
+++ b/common_arm64.h
@@ -78,17 +78,18 @@ static void __inline blas_lock(volatile BLASULONG *address){
 
 #define BLAS_LOCK_DEFINED
 
+#if !defined(OS_DARWIN) && !defined (OS_ANDROID)
 static __inline BLASULONG rpcc(void){
   BLASULONG ret = 0;
  
-  __asm__ __volatile__ ("mrs %0,cntvct_el0":"=r"(ret));
+  __asm__ __volatile__ ("isb; mrs %0,cntvct_el0":"=r"(ret));
 
   return ret;
 }
 
 #define RPCC_DEFINED
 #define RPCC64BIT
- 
+#endif 
 
 static inline int blas_quickdivide(blasint x, blasint y){
   return x / y;