Add basic autodetection support for Fujitsu A64FX
This commit is contained in:
Martin Kroeker
GitHub
parent
b57acdf2d3
commit
3cb1ec2a96
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@ -153,6 +153,15 @@ endif
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endif
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endif
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ifeq (1, $(filter 1,$(GCCVERSIONGTEQ11) $(ISCLANG)))
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ifeq ($(CORE), A64FX)
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CCOMMON_OPT += -march=armv8.2-a -mtune=a64fx
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ifneq ($(F_COMPILER), NAG)
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FCOMMON_OPT += -march=armv8.2-a -mtune=a64fx
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endif
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endif
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endif
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endif
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endif
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295
cpuid_arm64.c
295
cpuid_arm64.c
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@ -55,6 +55,8 @@ size_t length64=sizeof(value64);
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#define CPU_EMAG8180 10
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// Apple
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#define CPU_VORTEX 13
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// Fujitsu
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#define CPU_A64FX 14
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static char *cpuname[] = {
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"UNKNOWN",
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@ -71,7 +73,8 @@ static char *cpuname[] = {
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"NEOVERSEN1",
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"THUNDERX3T110",
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"VORTEX",
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"CORTEXA55"
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"CORTEXA55",
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"A64FX"
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};
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static char *cpuname_lower[] = {
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@ -89,7 +92,8 @@ static char *cpuname_lower[] = {
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"neoversen1",
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"thunderx3t110",
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"vortex",
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"cortexa55"
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"cortexa55",
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"a64fx"
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};
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int get_feature(char *search)
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@ -185,6 +189,9 @@ int detect(void)
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// Ampere
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else if (strstr(cpu_implementer, "0x50") && strstr(cpu_part, "0x000"))
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return CPU_EMAG8180;
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// Fujitsu
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else if (strstr(cpu_implementer, "0x46") && strstr(cpu_part, "0x001"))
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return CPU_A64FX;
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}
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p = (char *) NULL ;
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@ -287,156 +294,166 @@ void get_cpuconfig(void)
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switch (d)
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{
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case CPU_CORTEXA53:
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case CPU_CORTEXA55:
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printf("#define %s\n", cpuname[d]);
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// Fall-through
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case CPU_ARMV8:
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// Minimum parameters for ARMv8 (based on A53)
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 64\n");
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printf("#define L2_SIZE 262144\n");
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printf("#define L2_LINESIZE 64\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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printf("#define L2_ASSOCIATIVE 4\n");
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case CPU_CORTEXA53:
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case CPU_CORTEXA55:
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printf("#define %s\n", cpuname[d]);
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// Fall-through
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case CPU_ARMV8:
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// Minimum parameters for ARMv8 (based on A53)
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 64\n");
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printf("#define L2_SIZE 262144\n");
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printf("#define L2_LINESIZE 64\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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printf("#define L2_ASSOCIATIVE 4\n");
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break;
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case CPU_CORTEXA57:
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case CPU_CORTEXA72:
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case CPU_CORTEXA73:
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case CPU_CORTEXA57:
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case CPU_CORTEXA72:
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case CPU_CORTEXA73:
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// Common minimum settings for these Arm cores
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// Can change a lot, but we need to be conservative
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// TODO: detect info from /sys if possible
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printf("#define %s\n", cpuname[d]);
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printf("#define L1_CODE_SIZE 49152\n");
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printf("#define L1_CODE_LINESIZE 64\n");
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printf("#define L1_CODE_ASSOCIATIVE 3\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 64\n");
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printf("#define L1_DATA_ASSOCIATIVE 2\n");
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printf("#define L2_SIZE 524288\n");
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printf("#define L2_LINESIZE 64\n");
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printf("#define L2_ASSOCIATIVE 16\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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break;
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case CPU_NEOVERSEN1:
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printf("#define %s\n", cpuname[d]);
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printf("#define L1_CODE_SIZE 65536\n");
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printf("#define L1_CODE_LINESIZE 64\n");
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printf("#define L1_CODE_ASSOCIATIVE 4\n");
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printf("#define L1_DATA_SIZE 65536\n");
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printf("#define L1_DATA_LINESIZE 64\n");
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printf("#define L1_DATA_ASSOCIATIVE 4\n");
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printf("#define L2_SIZE 1048576\n");
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printf("#define L2_LINESIZE 64\n");
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printf("#define L2_ASSOCIATIVE 16\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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break;
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printf("#define %s\n", cpuname[d]);
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printf("#define L1_CODE_SIZE 49152\n");
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printf("#define L1_CODE_LINESIZE 64\n");
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printf("#define L1_CODE_ASSOCIATIVE 3\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 64\n");
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printf("#define L1_DATA_ASSOCIATIVE 2\n");
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printf("#define L2_SIZE 524288\n");
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printf("#define L2_LINESIZE 64\n");
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printf("#define L2_ASSOCIATIVE 16\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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break;
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case CPU_NEOVERSEN1:
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printf("#define %s\n", cpuname[d]);
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printf("#define L1_CODE_SIZE 65536\n");
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printf("#define L1_CODE_LINESIZE 64\n");
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printf("#define L1_CODE_ASSOCIATIVE 4\n");
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printf("#define L1_DATA_SIZE 65536\n");
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printf("#define L1_DATA_LINESIZE 64\n");
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printf("#define L1_DATA_ASSOCIATIVE 4\n");
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printf("#define L2_SIZE 1048576\n");
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printf("#define L2_LINESIZE 64\n");
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printf("#define L2_ASSOCIATIVE 16\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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break;
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case CPU_FALKOR:
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printf("#define FALKOR\n");
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printf("#define L1_CODE_SIZE 65536\n");
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printf("#define L1_CODE_LINESIZE 64\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 128\n");
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printf("#define L2_SIZE 524288\n");
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printf("#define L2_LINESIZE 64\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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printf("#define L2_ASSOCIATIVE 16\n");
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break;
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case CPU_FALKOR:
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printf("#define FALKOR\n");
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printf("#define L1_CODE_SIZE 65536\n");
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printf("#define L1_CODE_LINESIZE 64\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 128\n");
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printf("#define L2_SIZE 524288\n");
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printf("#define L2_LINESIZE 64\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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printf("#define L2_ASSOCIATIVE 16\n");
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break;
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case CPU_THUNDERX:
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printf("#define THUNDERX\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 128\n");
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printf("#define L2_SIZE 16777216\n");
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printf("#define L2_LINESIZE 128\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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printf("#define L2_ASSOCIATIVE 16\n");
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break;
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case CPU_THUNDERX:
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printf("#define THUNDERX\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 128\n");
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printf("#define L2_SIZE 16777216\n");
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printf("#define L2_LINESIZE 128\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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printf("#define L2_ASSOCIATIVE 16\n");
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break;
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case CPU_THUNDERX2T99:
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printf("#define THUNDERX2T99 \n");
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printf("#define L1_CODE_SIZE 32768 \n");
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printf("#define L1_CODE_LINESIZE 64 \n");
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printf("#define L1_CODE_ASSOCIATIVE 8 \n");
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printf("#define L1_DATA_SIZE 32768 \n");
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printf("#define L1_DATA_LINESIZE 64 \n");
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printf("#define L1_DATA_ASSOCIATIVE 8 \n");
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printf("#define L2_SIZE 262144 \n");
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printf("#define L2_LINESIZE 64 \n");
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printf("#define L2_ASSOCIATIVE 8 \n");
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printf("#define L3_SIZE 33554432 \n");
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printf("#define L3_LINESIZE 64 \n");
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printf("#define L3_ASSOCIATIVE 32 \n");
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printf("#define DTB_DEFAULT_ENTRIES 64 \n");
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printf("#define DTB_SIZE 4096 \n");
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break;
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case CPU_THUNDERX2T99:
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printf("#define THUNDERX2T99 \n");
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printf("#define L1_CODE_SIZE 32768 \n");
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printf("#define L1_CODE_LINESIZE 64 \n");
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printf("#define L1_CODE_ASSOCIATIVE 8 \n");
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printf("#define L1_DATA_SIZE 32768 \n");
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printf("#define L1_DATA_LINESIZE 64 \n");
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printf("#define L1_DATA_ASSOCIATIVE 8 \n");
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printf("#define L2_SIZE 262144 \n");
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printf("#define L2_LINESIZE 64 \n");
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printf("#define L2_ASSOCIATIVE 8 \n");
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printf("#define L3_SIZE 33554432 \n");
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printf("#define L3_LINESIZE 64 \n");
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printf("#define L3_ASSOCIATIVE 32 \n");
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printf("#define DTB_DEFAULT_ENTRIES 64 \n");
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printf("#define DTB_SIZE 4096 \n");
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break;
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case CPU_TSV110:
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printf("#define TSV110 \n");
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printf("#define L1_CODE_SIZE 65536 \n");
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printf("#define L1_CODE_LINESIZE 64 \n");
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printf("#define L1_CODE_ASSOCIATIVE 4 \n");
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printf("#define L1_DATA_SIZE 65536 \n");
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printf("#define L1_DATA_LINESIZE 64 \n");
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printf("#define L1_DATA_ASSOCIATIVE 4 \n");
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printf("#define L2_SIZE 524228 \n");
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printf("#define L2_LINESIZE 64 \n");
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printf("#define L2_ASSOCIATIVE 8 \n");
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printf("#define DTB_DEFAULT_ENTRIES 64 \n");
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printf("#define DTB_SIZE 4096 \n");
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break;
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case CPU_TSV110:
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printf("#define TSV110 \n");
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printf("#define L1_CODE_SIZE 65536 \n");
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printf("#define L1_CODE_LINESIZE 64 \n");
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printf("#define L1_CODE_ASSOCIATIVE 4 \n");
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printf("#define L1_DATA_SIZE 65536 \n");
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printf("#define L1_DATA_LINESIZE 64 \n");
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printf("#define L1_DATA_ASSOCIATIVE 4 \n");
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printf("#define L2_SIZE 524228 \n");
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printf("#define L2_LINESIZE 64 \n");
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printf("#define L2_ASSOCIATIVE 8 \n");
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printf("#define DTB_DEFAULT_ENTRIES 64 \n");
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printf("#define DTB_SIZE 4096 \n");
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break;
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case CPU_EMAG8180:
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// Minimum parameters for ARMv8 (based on A53)
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printf("#define EMAG8180\n");
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printf("#define L1_CODE_SIZE 32768\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 64\n");
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printf("#define L2_SIZE 262144\n");
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printf("#define L2_LINESIZE 64\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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break;
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case CPU_EMAG8180:
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// Minimum parameters for ARMv8 (based on A53)
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printf("#define EMAG8180\n");
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printf("#define L1_CODE_SIZE 32768\n");
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printf("#define L1_DATA_SIZE 32768\n");
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printf("#define L1_DATA_LINESIZE 64\n");
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printf("#define L2_SIZE 262144\n");
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printf("#define L2_LINESIZE 64\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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break;
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case CPU_THUNDERX3T110:
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printf("#define THUNDERX3T110 \n");
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printf("#define L1_CODE_SIZE 65536 \n");
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printf("#define L1_CODE_LINESIZE 64 \n");
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printf("#define L1_CODE_ASSOCIATIVE 8 \n");
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printf("#define L1_DATA_SIZE 32768 \n");
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printf("#define L1_DATA_LINESIZE 64 \n");
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printf("#define L1_DATA_ASSOCIATIVE 8 \n");
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printf("#define L2_SIZE 524288 \n");
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printf("#define L2_LINESIZE 64 \n");
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printf("#define L2_ASSOCIATIVE 8 \n");
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printf("#define L3_SIZE 94371840 \n");
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printf("#define L3_LINESIZE 64 \n");
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printf("#define L3_ASSOCIATIVE 32 \n");
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printf("#define DTB_DEFAULT_ENTRIES 64 \n");
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printf("#define DTB_SIZE 4096 \n");
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break;
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case CPU_THUNDERX3T110:
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printf("#define THUNDERX3T110 \n");
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printf("#define L1_CODE_SIZE 65536 \n");
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printf("#define L1_CODE_LINESIZE 64 \n");
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printf("#define L1_CODE_ASSOCIATIVE 8 \n");
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printf("#define L1_DATA_SIZE 32768 \n");
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printf("#define L1_DATA_LINESIZE 64 \n");
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printf("#define L1_DATA_ASSOCIATIVE 8 \n");
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printf("#define L2_SIZE 524288 \n");
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printf("#define L2_LINESIZE 64 \n");
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printf("#define L2_ASSOCIATIVE 8 \n");
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printf("#define L3_SIZE 94371840 \n");
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printf("#define L3_LINESIZE 64 \n");
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printf("#define L3_ASSOCIATIVE 32 \n");
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printf("#define DTB_DEFAULT_ENTRIES 64 \n");
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printf("#define DTB_SIZE 4096 \n");
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break;
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#ifdef __APPLE__
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case CPU_VORTEX:
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printf("#define VORTEX \n");
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sysctlbyname("hw.l1icachesize",&value64,&length64,NULL,0);
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printf("#define L1_CODE_SIZE %lld \n",value64);
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sysctlbyname("hw.cachelinesize",&value64,&length64,NULL,0);
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printf("#define L1_CODE_LINESIZE %lld \n",value64);
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sysctlbyname("hw.l1dcachesize",&value64,&length64,NULL,0);
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printf("#define L1_DATA_SIZE %lld \n",value64);
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sysctlbyname("hw.l2cachesize",&value64,&length64,NULL,0);
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printf("#define L2_SIZE %lld \n",value64);
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printf("#define DTB_DEFAULT_ENTRIES 64 \n");
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printf("#define DTB_SIZE 4096 \n");
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break;
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case CPU_VORTEX:
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printf("#define VORTEX \n");
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sysctlbyname("hw.l1icachesize",&value64,&length64,NULL,0);
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printf("#define L1_CODE_SIZE %lld \n",value64);
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sysctlbyname("hw.cachelinesize",&value64,&length64,NULL,0);
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printf("#define L1_CODE_LINESIZE %lld \n",value64);
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sysctlbyname("hw.l1dcachesize",&value64,&length64,NULL,0);
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printf("#define L1_DATA_SIZE %lld \n",value64);
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sysctlbyname("hw.l2cachesize",&value64,&length64,NULL,0);
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printf("#define L2_SIZE %lld \n",value64);
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printf("#define DTB_DEFAULT_ENTRIES 64 \n");
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printf("#define DTB_SIZE 4096 \n");
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break;
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#endif
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case CPU_A64FX:
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printf("#define A64FX\n");
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printf("#define L1_CODE_SIZE 65535\n");
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printf("#define L1_DATA_SIZE 65535\n");
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printf("#define L1_DATA_LINESIZE 256\n");
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printf("#define L2_SIZE 8388608\n");
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printf("#define L2_LINESIZE 256\n");
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printf("#define DTB_DEFAULT_ENTRIES 64\n");
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printf("#define DTB_SIZE 4096\n");
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break;
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}
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get_cpucount();
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}
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67
getarch.c
67
getarch.c
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@ -469,55 +469,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#endif
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#endif
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#ifdef FORCE_SAPPHIRERAPIDS
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#define FORCE
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#define FORCE_INTEL
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#define ARCHITECTURE "X86"
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#ifdef NO_AVX512
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#ifdef NO_AVX2
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#ifdef NO_AVX
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#define SUBARCHITECTURE "NEHALEM"
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#define ARCHCONFIG "-DNEHALEM " \
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"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=64 " \
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"-DL2_SIZE=262144 -DL2_LINESIZE=64 " \
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"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 " \
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"-DHAVE_CMOV -DHAVE_MMX -DHAVE_SSE -DHAVE_SSE2 -DHAVE_SSE3 -DHAVE_SSSE3 -DHAVE_SSE4_1 -DHAVE_SSE4_2"
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#define LIBNAME "nehalem"
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#define CORENAME "NEHALEM"
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#else
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#define SUBARCHITECTURE "SANDYBRIDGE"
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#define ARCHCONFIG "-DSANDYBRIDGE " \
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"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=64 " \
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"-DL2_SIZE=262144 -DL2_LINESIZE=64 " \
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"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 " \
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"-DHAVE_CMOV -DHAVE_MMX -DHAVE_SSE -DHAVE_SSE2 -DHAVE_SSE3 -DHAVE_SSSE3 -DHAVE_SSE4_1 -DHAVE_SSE4_2 -DHAVE_AVX"
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#define LIBNAME "sandybridge"
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#define CORENAME "SANDYBRIDGE"
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#endif
|
||||
#else
|
||||
#define SUBARCHITECTURE "HASWELL"
|
||||
#define ARCHCONFIG "-DHASWELL " \
|
||||
"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=64 " \
|
||||
"-DL2_SIZE=262144 -DL2_LINESIZE=64 " \
|
||||
"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 " \
|
||||
"-DHAVE_CMOV -DHAVE_MMX -DHAVE_SSE -DHAVE_SSE2 -DHAVE_SSE3 -DHAVE_SSSE3 -DHAVE_SSE4_1 -DHAVE_SSE4_2 -DHAVE_AVX " \
|
||||
"-DHAVE_AVX2 -DHAVE_FMA3 -DFMA3"
|
||||
#define LIBNAME "haswell"
|
||||
#define CORENAME "HASWELL"
|
||||
#endif
|
||||
#else
|
||||
#define SUBARCHITECTURE "SAPPHIRERAPIDS"
|
||||
#define ARCHCONFIG "-DSAPPHIRERAPIDS " \
|
||||
"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=64 " \
|
||||
"-DL2_SIZE=262144 -DL2_LINESIZE=64 " \
|
||||
"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 " \
|
||||
"-DHAVE_CMOV -DHAVE_MMX -DHAVE_SSE -DHAVE_SSE2 -DHAVE_SSE3 -DHAVE_SSSE3 -DHAVE_SSE4_1 -DHAVE_SSE4_2 -DHAVE_AVX " \
|
||||
"-DHAVE_AVX2 -DHAVE_FMA3 -DFMA3 -DHAVE_AVX512VL -DHAVE_AVX512BF16 -march=sapphirerapids"
|
||||
#define LIBNAME "sapphirerapids"
|
||||
#define CORENAME "SAPPHIRERAPIDS"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef FORCE_ATOM
|
||||
#define FORCE
|
||||
#define FORCE_INTEL
|
||||
|
|
@ -1424,6 +1375,24 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|||
#define CORENAME "VORTEX"
|
||||
#endif
|
||||
|
||||
#ifdef FORCE_A64FX
|
||||
#define ARMV8
|
||||
#define FORCE
|
||||
#define ARCHITECTURE "ARM64"
|
||||
#define SUBARCHITECTURE "A64FX"
|
||||
#define SUBDIRNAME "arm64"
|
||||
#define ARCHCONFIG "-DA64FX " \
|
||||
"-DL1_CODE_SIZE=65536 -DL1_CODE_LINESIZE=256 -DL1_CODE_ASSOCIATIVE=8 " \
|
||||
"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=256 -DL1_DATA_ASSOCIATIVE=8 " \
|
||||
"-DL2_SIZE=8388608 -DL2_LINESIZE=256 -DL2_ASSOCIATIVE=8 " \
|
||||
"-DL3_SIZE=0 -DL3_LINESIZE=0 -DL3_ASSOCIATIVE=0 " \
|
||||
"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 " \
|
||||
"-DHAVE_VFPV4 -DHAVE_VFPV3 -DHAVE_VFP -DHAVE_NEON -DARMV8"
|
||||
#define LIBNAME "a64fx"
|
||||
#define CORENAME "A64FX"
|
||||
#else
|
||||
#endif
|
||||
|
||||
#ifdef FORCE_ZARCH_GENERIC
|
||||
#define FORCE
|
||||
#define ARCHITECTURE "ZARCH"
|
||||
|
|
|
|||
Loading…
Reference in New Issue