diff --git a/Makefile.arm b/Makefile.arm index 5bdd4d151..9978a672a 100644 --- a/Makefile.arm +++ b/Makefile.arm @@ -1,3 +1,8 @@ +# ifeq logical or +ifeq ($(CORE), $(filter $(CORE),CORTEXA9 CORTEXA15)) +CCOMMON_OPT += -marm -mfpu=vfpv3 -mfloat-abi=hard -march=armv7-a +FCOMMON_OPT += -marm -mfpu=vfpv3 -mfloat-abi=hard -march=armv7-a +endif ifeq ($(CORE), ARMV7) CCOMMON_OPT += -marm -mfpu=vfpv3 -mfloat-abi=hard -march=armv7-a diff --git a/cpuid_arm.c b/cpuid_arm.c index b7181b2f9..211ea2764 100644 --- a/cpuid_arm.c +++ b/cpuid_arm.c @@ -30,16 +30,27 @@ #define CPU_UNKNOWN 0 #define CPU_ARMV6 1 #define CPU_ARMV7 2 -#define CPU_CORTEXA15 3 +#define CPU_CORTEXA9 3 +#define CPU_CORTEXA15 4 static char *cpuname[] = { "UNKOWN", "ARMV6", "ARMV7", + "CORTEXA9", "CORTEXA15" }; +static char *cpuname_lower[] = { + "unknown", + "armv6", + "armv7", + "cortexa9", + "cortexa15" +}; + + int get_feature(char *search) { @@ -85,6 +96,29 @@ int detect(void) char buffer[512], *p; p = (char *) NULL ; + infile = fopen("/proc/cpuinfo", "r"); + while (fgets(buffer, sizeof(buffer), infile)) + { + + if (!strncmp("CPU part", buffer, 8)) + { + p = strchr(buffer, ':') + 2; + break; + } + } + + fclose(infile); + if(p != NULL) { + if (strstr(p, "0xc09")) { + return CPU_CORTEXA9; + } + if (strstr(p, "0xc15")) { + return CPU_CORTEXA15; + } + + } + + p = (char *) NULL ; infile = fopen("/proc/cpuinfo", "r"); while (fgets(buffer, sizeof(buffer), infile)) @@ -142,21 +176,7 @@ void get_architecture(void) void get_subarchitecture(void) { int d = detect(); - switch (d) - { - - case CPU_ARMV7: - printf("ARMV7"); - break; - - case CPU_ARMV6: - printf("ARMV6"); - break; - - default: - printf("UNKNOWN"); - break; - } + printf("%s", cpuname[d]); } void get_subdirname(void) @@ -170,6 +190,36 @@ void get_cpuconfig(void) int d = detect(); switch (d) { + case CPU_CORTEXA9: + printf("#define CORTEXA9\n"); + printf("#define HAVE_VFP\n"); + printf("#define HAVE_VFPV3\n"); + if ( get_feature("neon")) printf("#define HAVE_NEON\n"); + if ( get_feature("vfpv4")) printf("#define HAVE_VFPV4\n"); + printf("#define L1_DATA_SIZE 32768\n"); + printf("#define L1_DATA_LINESIZE 32\n"); + printf("#define L2_SIZE 1048576\n"); + printf("#define L2_LINESIZE 32\n"); + printf("#define DTB_DEFAULT_ENTRIES 128\n"); + printf("#define DTB_SIZE 4096\n"); + printf("#define L2_ASSOCIATIVE 4\n"); + break; + + case CPU_CORTEXA15: + printf("#define CORTEXA15\n"); + printf("#define HAVE_VFP\n"); + printf("#define HAVE_VFPV3\n"); + if ( get_feature("neon")) printf("#define HAVE_NEON\n"); + if ( get_feature("vfpv4")) printf("#define HAVE_VFPV4\n"); + printf("#define L1_DATA_SIZE 32768\n"); + printf("#define L1_DATA_LINESIZE 32\n"); + printf("#define L2_SIZE 1048576\n"); + printf("#define L2_LINESIZE 32\n"); + printf("#define DTB_DEFAULT_ENTRIES 128\n"); + printf("#define DTB_SIZE 4096\n"); + printf("#define L2_ASSOCIATIVE 4\n"); + break; + case CPU_ARMV7: printf("#define ARMV7\n"); @@ -206,18 +256,7 @@ void get_libname(void) { int d = detect(); - switch (d) - { - - case CPU_ARMV7: - printf("armv7\n"); - break; - - case CPU_ARMV6: - printf("armv6\n"); - break; - - } + printf("%s", cpuname_lower[d]); } diff --git a/getarch.c b/getarch.c index f6a5ecb94..ed304b692 100644 --- a/getarch.c +++ b/getarch.c @@ -727,6 +727,36 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #else #endif +#ifdef FORCE_CORTEXA9 +#define FORCE +#define ARCHITECTURE "ARM" +#define SUBARCHITECTURE "CORTEXA9" +#define SUBDIRNAME "arm" +#define ARCHCONFIG "-DCORTEXA9 " \ + "-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \ + "-DL2_SIZE=1048576 -DL2_LINESIZE=32 " \ + "-DDTB_DEFAULT_ENTRIES=128 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=4 " \ + "-DHAVE_VFPV3 -DHAVE_VFP -DHAVE_NEON" +#define LIBNAME "cortexa9" +#define CORENAME "CORTEXA9" +#else +#endif + +#ifdef FORCE_CORTEXA15 +#define FORCE +#define ARCHITECTURE "ARM" +#define SUBARCHITECTURE "CORTEXA15" +#define SUBDIRNAME "arm" +#define ARCHCONFIG "-DCORTEXA15 " \ + "-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \ + "-DL2_SIZE=1048576 -DL2_LINESIZE=32 " \ + "-DDTB_DEFAULT_ENTRIES=128 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=4 " \ + "-DHAVE_VFPV3 -DHAVE_VFP -DHAVE_NEON" +#define LIBNAME "cortexa9" +#define CORENAME "CORTEXA9" +#else +#endif + #ifdef FORCE_ARMV6 #define FORCE #define ARCHITECTURE "ARM" diff --git a/kernel/arm/KERNEL.CORTEXA15 b/kernel/arm/KERNEL.CORTEXA15 new file mode 100644 index 000000000..72e3ba02e --- /dev/null +++ b/kernel/arm/KERNEL.CORTEXA15 @@ -0,0 +1 @@ +include $(KERNELDIR)/KERNEL.ARMV7 \ No newline at end of file diff --git a/kernel/arm/KERNEL.CORTEXA9 b/kernel/arm/KERNEL.CORTEXA9 new file mode 100644 index 000000000..72e3ba02e --- /dev/null +++ b/kernel/arm/KERNEL.CORTEXA9 @@ -0,0 +1 @@ +include $(KERNELDIR)/KERNEL.ARMV7 \ No newline at end of file diff --git a/param.h b/param.h index 08c5dc81f..18c711eb3 100644 --- a/param.h +++ b/param.h @@ -2206,6 +2206,88 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +#ifdef CORTEXA9 +#define SNUMOPT 2 +#define DNUMOPT 2 + +#define GEMM_DEFAULT_OFFSET_A 0 +#define GEMM_DEFAULT_OFFSET_B 0 +#define GEMM_DEFAULT_ALIGN 0x03fffUL + +#define SGEMM_DEFAULT_UNROLL_M 4 +#define SGEMM_DEFAULT_UNROLL_N 4 + +#define DGEMM_DEFAULT_UNROLL_M 4 +#define DGEMM_DEFAULT_UNROLL_N 4 + +#define CGEMM_DEFAULT_UNROLL_M 2 +#define CGEMM_DEFAULT_UNROLL_N 2 + +#define ZGEMM_DEFAULT_UNROLL_M 2 +#define ZGEMM_DEFAULT_UNROLL_N 2 + +#define SGEMM_DEFAULT_P 128 +#define DGEMM_DEFAULT_P 128 +#define CGEMM_DEFAULT_P 96 +#define ZGEMM_DEFAULT_P 64 + +#define SGEMM_DEFAULT_Q 240 +#define DGEMM_DEFAULT_Q 120 +#define CGEMM_DEFAULT_Q 120 +#define ZGEMM_DEFAULT_Q 120 + +#define SGEMM_DEFAULT_R 12288 +#define DGEMM_DEFAULT_R 8192 +#define CGEMM_DEFAULT_R 4096 +#define ZGEMM_DEFAULT_R 4096 + + + +#define SYMV_P 16 +#endif + + +#ifdef CORTEXA15 +#define SNUMOPT 2 +#define DNUMOPT 2 + +#define GEMM_DEFAULT_OFFSET_A 0 +#define GEMM_DEFAULT_OFFSET_B 0 +#define GEMM_DEFAULT_ALIGN 0x03fffUL + +#define SGEMM_DEFAULT_UNROLL_M 4 +#define SGEMM_DEFAULT_UNROLL_N 4 + +#define DGEMM_DEFAULT_UNROLL_M 4 +#define DGEMM_DEFAULT_UNROLL_N 4 + +#define CGEMM_DEFAULT_UNROLL_M 2 +#define CGEMM_DEFAULT_UNROLL_N 2 + +#define ZGEMM_DEFAULT_UNROLL_M 2 +#define ZGEMM_DEFAULT_UNROLL_N 2 + +#define SGEMM_DEFAULT_P 128 +#define DGEMM_DEFAULT_P 128 +#define CGEMM_DEFAULT_P 96 +#define ZGEMM_DEFAULT_P 64 + +#define SGEMM_DEFAULT_Q 240 +#define DGEMM_DEFAULT_Q 120 +#define CGEMM_DEFAULT_Q 120 +#define ZGEMM_DEFAULT_Q 120 + +#define SGEMM_DEFAULT_R 12288 +#define DGEMM_DEFAULT_R 8192 +#define CGEMM_DEFAULT_R 4096 +#define ZGEMM_DEFAULT_R 4096 + + + +#define SYMV_P 16 +#endif + + #ifdef GENERIC