diff --git a/kernel/riscv64/izamax_rvv.c b/kernel/riscv64/izamax_rvv.c
index e61d0cbec..e43ded820 100644
--- a/kernel/riscv64/izamax_rvv.c
+++ b/kernel/riscv64/izamax_rvv.c
@@ -48,9 +48,9 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define VFADDVV_FLOAT           __riscv_vfadd_vv_f64m4
 #define VFIRSTM                 __riscv_vfirst_m_b16
 #define UINT_V_T                vuint64m4_t
-#define VIDV_MASK_UINT          __riscv_vid_v_u64m4_m
+#define VIDV_MASK_UINT          __riscv_vid_v_u64m4_mu
 #define VIDV_UINT               __riscv_vid_v_u64m4
-#define VADDVX_MASK_UINT        __riscv_vadd_vx_u64m4_m
+#define VADDVX_MASK_UINT        __riscv_vadd_vx_u64m4_mu
 #define VADDVX_UINT             __riscv_vadd_vx_u64m4
 #define VMVVX_UINT              __riscv_vmv_v_x_u64m4
 #define VFMVFS_FLOAT_M1         __riscv_vfmv_f_s_f64m1_f64
@@ -77,9 +77,9 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define VFADDVV_FLOAT           __riscv_vfadd_vv_f32m4
 #define VFIRSTM                 __riscv_vfirst_m_b8
 #define UINT_V_T                vuint32m4_t
-#define VIDV_MASK_UINT          __riscv_vid_v_u32m4_m
+#define VIDV_MASK_UINT          __riscv_vid_v_u32m4_mu
 #define VIDV_UINT               __riscv_vid_v_u32m4
-#define VADDVX_MASK_UINT        __riscv_vadd_vx_u32m4_m
+#define VADDVX_MASK_UINT        __riscv_vadd_vx_u32m4_mu
 #define VADDVX_UINT             __riscv_vadd_vx_u32m4
 #define VMVVX_UINT              __riscv_vmv_v_x_u32m4
 #define VFMVFS_FLOAT_M1         __riscv_vfmv_f_s_f32m1_f32
@@ -116,8 +116,8 @@ BLASLONG CNAME(BLASLONG n, FLOAT *x, BLASLONG inc_x)
 
             //index where element greater than v_max
             mask = VMFLTVV_FLOAT(v_max, vx0, vl);
-            v_max_index = VIDV_MASK_UINT(mask, vl);
-            v_max_index = VADDVX_MASK_UINT(mask, v_max_index, j, vl);
+            v_max_index = VIDV_MASK_UINT(mask, v_max_index, vl);
+            v_max_index = VADDVX_MASK_UINT(mask, v_max_index, v_max_index, j, vl);
 
             //update v_max and start_index j
             v_max = VFMAXVV_FLOAT(v_max, vx0, vl);
@@ -138,9 +138,9 @@ BLASLONG CNAME(BLASLONG n, FLOAT *x, BLASLONG inc_x)
         
             //index where element greater than v_max
             mask = VMFLTVV_FLOAT(v_max, vx0, vl);
-            v_max_index = VIDV_MASK_UINT(mask, vl);
-            v_max_index = VADDVX_MASK_UINT(mask, v_max_index, j, vl);
-        
+            v_max_index = VIDV_MASK_UINT(mask, v_max_index, vl);
+            v_max_index = VADDVX_MASK_UINT(mask, v_max_index, v_max_index, j, vl);
+
             //update v_max and start_index j
             v_max = VFMAXVV_FLOAT(v_max, vx0, vl);
         }
diff --git a/kernel/riscv64/izamin_rvv.c b/kernel/riscv64/izamin_rvv.c
index 297b3c99a..cc3c37c8e 100644
--- a/kernel/riscv64/izamin_rvv.c
+++ b/kernel/riscv64/izamin_rvv.c
@@ -47,9 +47,9 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define VFADDVV_FLOAT           __riscv_vfadd_vv_f64m4
 #define VFIRSTM                 __riscv_vfirst_m_b16
 #define UINT_V_T                vuint64m4_t
-#define VIDV_MASK_UINT          __riscv_vid_v_u64m4_m
+#define VIDV_MASK_UINT          __riscv_vid_v_u64m4_mu
 #define VIDV_UINT               __riscv_vid_v_u64m4
-#define VADDVX_MASK_UINT        __riscv_vadd_vx_u64m4_m
+#define VADDVX_MASK_UINT        __riscv_vadd_vx_u64m4_mu
 #define VADDVX_UINT             __riscv_vadd_vx_u64m4
 #define VMVVX_UINT              __riscv_vmv_v_x_u64m4
 #define VFMVFS_FLOAT_M1         __riscv_vfmv_f_s_f64m1_f64
@@ -74,9 +74,9 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define VFADDVV_FLOAT           __riscv_vfadd_vv_f32m4
 #define VFIRSTM                 __riscv_vfirst_m_b8
 #define UINT_V_T                vuint32m4_t
-#define VIDV_MASK_UINT          __riscv_vid_v_u32m4_m
+#define VIDV_MASK_UINT          __riscv_vid_v_u32m4_mu
 #define VIDV_UINT               __riscv_vid_v_u32m4
-#define VADDVX_MASK_UINT        __riscv_vadd_vx_u32m4_m
+#define VADDVX_MASK_UINT        __riscv_vadd_vx_u32m4_mu
 #define VADDVX_UINT             __riscv_vadd_vx_u32m4
 #define VMVVX_UINT              __riscv_vmv_v_x_u32m4
 #define VFMVFS_FLOAT_M1         __riscv_vfmv_f_s_f32m1_f32
@@ -113,8 +113,8 @@ BLASLONG CNAME(BLASLONG n, FLOAT *x, BLASLONG inc_x)
 
             // index where element less than v_min
             mask = VMFLTVV_FLOAT(vx0, v_min, vl);
-            v_min_index = VIDV_MASK_UINT(mask, vl);
-            v_min_index = VADDVX_MASK_UINT(mask, v_min_index, j, vl);
+            v_min_index = VIDV_MASK_UINT(mask, v_min_index, vl);
+            v_min_index = VADDVX_MASK_UINT(mask, v_min_index, v_min_index, j, vl);
 
             //update v_min and start_index j
             v_min = VFMINVV_FLOAT(v_min, vx0, vl);
@@ -136,8 +136,8 @@ BLASLONG CNAME(BLASLONG n, FLOAT *x, BLASLONG inc_x)
 
             // index where element less than v_min
             mask = VMFLTVV_FLOAT(vx0, v_min, vl);
-            v_min_index = VIDV_MASK_UINT(mask, vl);
-            v_min_index = VADDVX_MASK_UINT(mask, v_min_index, j, vl);
+            v_min_index = VIDV_MASK_UINT(mask, v_min_index, vl);
+            v_min_index = VADDVX_MASK_UINT(mask, v_min_index, v_min_index, j, vl);
 
             //update v_min and start_index j
             v_min = VFMINVV_FLOAT(v_min, vx0, vl);