forked from xuos/xiuos
75 lines
2.9 KiB
C
75 lines
2.9 KiB
C
/*
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* Copyright (c) 2011-2012, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*!
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* @file gpio_map.h
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* @brief
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* @ingroup diag_gpio
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*/
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#ifndef __GPIO_MAP_H__
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#define __GPIO_MAP_H__
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#include "regsgpio.h"
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#include <stdint.h>
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//! @addtogroup diag_gpio
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//! @{
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////////////////////////////////////////////////////////////////////////////////
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// Definitions
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////////////////////////////////////////////////////////////////////////////////
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//! @brief Number of pins per GPIO bank.
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#define GPIO_PIN_COUNT (32)
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//! @brief Table to map GPIO pins to their mux control register addresses.
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//!
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//! First subscript is bank, second is pin within the bank. There are always 32 pin
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//! entries per bank. If a pin does not have an assigned GPIO, its address is 0.
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//!
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//! Example code to set GPIO 3,12 to GPIO mode:
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//! @code
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//! uint32_t addr = k_gpio_mux_registers[3][12];
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//! volatile uint32_t * reg = (volatile uint32_t *)addr;
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//! *reg = (*reg & ~BM_IOMUXC_SW_MUX_CTL_PAD_GPIO00_MUX_MODE)
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//! | BF_IOMUXC_SW_MUX_CTL_PAD_GPIO00_MUX_MODE_V(ALT5);
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//! @endcode
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//!
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//! The code above uses the bit field macros from an arbitrary mux register definition.
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extern const uint32_t k_gpio_mux_registers[HW_GPIO_INSTANCE_COUNT][GPIO_PIN_COUNT];
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//! @}
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#endif //__GPIO_MAP_H__
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////////////////////////////////////////////////////////////////////////////////
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// EOF
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////////////////////////////////////////////////////////////////////////////////
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