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1,099 Commits 13 Branches 2 Tags
6c80a2da180749af41586ffd78cae22592bb93ca
Commit Graph

80 Commits

Author SHA1 Message Date
Liu_Weichao
b5495f108a Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into xidatong 2022-09-06 14:26:36 +08:00
xuedongliang
f376e568fd optimize xidatong-riscv64 third_party_driver and connection_framework form Liu_weichao 
it is OK
 2022-08-29 11:57:43 +08:00
Liu_Weichao
76017d0d0d delete useless config on riscv-board 2022-08-24 17:33:38 +08:00
Wang_Weigen
d5e47d36f4 Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into develop 2022-08-19 16:17:35 +08:00
Wang_Weigen
1ce5ee8e8b add imxrt1176-sbc board for xizi 2022-08-19 16:17:19 +08:00
Liu_Weichao
d1d41d3990 Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into xidatong 2022-08-08 10:51:03 +08:00
TXuian
906398da9f fit musl for riscv64 boards. 2022-07-27 05:42:26 -07:00
TXuian
cb4a9d03e0 fit musl for riscv64 boards. 2022-07-27 05:35:56 -07:00
TXuian
214cf55603 fit musl lib for arm boards. 2022-07-26 01:08:20 -07:00
TXuian
e1999f5af9 add get touch coordinate function to xidatong-riscv64. 2022-07-15 01:26:58 -07:00
TXuian
1818e23744 add get touch coordinate function to xidatong-riscv64. 2022-07-15 01:08:18 -07:00
Liu_Weichao
c5a0cbf95e Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into xidatong 2022-07-07 18:22:38 +08:00
Wang_Weigen
74fd934a02 add xidatong-riscv64 board 2022-07-05 10:54:24 +08:00
xuedongliang
314f162836 Port openPOWERLINK to XiUOS from shi_jia_rui 
it is OK
 2022-07-01 16:12:49 +08:00
Liu_Weichao
c8fc05a0f9 add xiwangtong-arm32 board on XiZi/board/ 2022-06-24 16:45:15 +08:00
Jiacheng Shi
320998dee5 powerlink: implement edrv-xiuos.c 2022-06-22 20:10:31 +08:00
Jiacheng Shi
b7648f0f08 powerlink: build liboplkmn.a and liboplkcn.a 2022-06-22 20:09:24 +08:00
Wang_Weigen
578680f6e5 rename board name 'gd32vf103_rvstar' as 'gd32vf103-rvstar' 2022-06-22 17:11:04 +08:00
Wang_Weigen
29a205e467 rename board name 'rv32m1_vega' as 'rv32m1-vega' 2022-06-22 16:42:52 +08:00
Wang_Weigen
42cf1290d1 rename board name 'xidatong' as 'xidatong-arm32' 2022-06-22 15:52:23 +08:00
Liu_Weichao
b3d51efc13 fix pin_mux compile error 2022-06-14 14:46:18 +08:00
Liu_Weichao
8e1f0e1af0 Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into xidatong 2022-06-14 14:39:48 +08:00
Liu_Weichao
80e08450fe fix compile error include watchdog and uart configure error 2022-06-08 11:09:50 +08:00
Liu_Weichao
c14f2f73e0 feat support uart8 and ec200t device on xidatong board 2022-06-08 10:41:21 +08:00
Wang_Weigen
7607282f2a delete usless info 2022-06-02 17:41:59 +08:00
Wang_Weigen
d57d8e0a4d repair the timeout problem of i2c interrupt for xidatong 2022-06-02 15:53:24 +08:00
Wang_Weigen
2bd07aa244 1、add i2c driver for xidatong;2、add touch driver for xidatong;3、add input device for lvgl;4、repair interrupt for m7;5、repair startup sequence for xidatong 2022-05-30 16:19:38 +08:00
Liu_Weichao
3c9347b856 feat add ch438 register clear when receiving interrrupts 2022-05-10 13:43:24 +08:00
Wang_Weigen
0267668149 delete unused info 2022-05-07 10:52:36 +08:00
Wang_Weigen
709fbc5a4b sync the upstream 2022-05-07 10:47:23 +08:00
Wang_Weigen
5338598158 add lcd driver for xidatong 2022-05-06 17:53:48 +08:00
Liu_Weichao
67666c1707 feat add watchdog on xidatong board 2022-05-06 15:58:01 +08:00
Liu_Weichao
808f00ade1 feat add sem obtain wait_time and modify e220 lora receive len operation 2022-04-26 17:57:32 +08:00
Liu_Weichao
63d26584b7 Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into xidatong 2022-04-25 10:53:35 +08:00
Liu_Weichao
e5296efa91 fix e220 lora send and receive bug using ch438 uart in xidatong board 2022-04-25 10:52:05 +08:00
Liu_Weichao
99b5c0d9a0 lora send and receive p2p ok 2022-04-24 13:54:54 +08:00
Wang_Weigen
587c2d595e Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into develop 2022-04-21 16:46:15 +08:00
Wang_Weigen
85ff8877d4 1、repair the uart irq problem;2、add wifi esp07s test cmd and repair the socket connect problem 2022-04-21 16:44:28 +08:00
Liu_Weichao
aedd1e046e fix InitBoardMemory and InstallConsole bug for XiZi bsp/board 2022-04-20 16:24:13 +08:00
Liu_Weichao
51dbbc2e8d feat add lwext4 fs register 2022-04-19 17:25:37 +08:00
Liu_Weichao
f1d372dcf7 Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into xidatong 2022-04-12 10:05:48 +08:00
Liu_Weichao
6f859b91db feat add sd card auto-check-attach function for ok1052 and xidatong 2022-04-11 17:56:09 +08:00
Wang_Weigen
90f30cf6d2 repair the problem of irq and add mode judge for zigbee 2022-04-07 10:28:09 +08:00
Liu_Weichao
137f2493b7 feat add lwext4 submodule for XiZi 2022-04-02 11:21:07 +08:00
wlyu
bb5f82d303 fixed the bug of OPCUA free buffer and uart not response 2022-03-30 18:49:08 +08:00
Wang_Weigen
5ade2a983d add eth config for xidatong 2022-03-28 17:46:21 +08:00
xuedongliang
a03b4bd13d add semc driver and eth driver from Wang_weigen 
it is OK
 2022-03-28 14:42:27 +08:00
Wang_Weigen
56fbb14dad replace file 'fsl_phy.c' to support LAN8720a 2022-03-24 17:21:14 +08:00
Wang_Weigen
1cf9939cb2 add semc driver and eth driver 2022-03-24 15:28:24 +08:00
Liu_Weichao
59dbe7058b feat support ch438 extuart function for xidatong board 2022-03-24 15:17:47 +08:00