forked from xuos/xiuos
Ubiquitous/RT-Thread_Fusion_XiUOS/: solve the bug that phy chip io has been configured emc cs.
This commit is contained in:
chunyexixiaoyu
parent
8c76480a97
commit
e6ec715e5c
|
|
@ -211,7 +211,7 @@ void imxrt_uart_pins_init(void)
|
|||
#ifdef BSP_USING_SDRAM
|
||||
void imxrt_semc_pins_init(void)
|
||||
{
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_EMC_00_SEMC_DATA00, /* GPIO_EMC_00 is configured as SEMC_DATA00 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
|
|
@ -331,13 +331,35 @@ void imxrt_semc_pins_init(void)
|
|||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_EMC_39_SEMC_DQS, /* GPIO_EMC_39 is configured as SEMC_DQS */
|
||||
1U); /* Software Input On Field: Force input path of pad GPIO_EMC_39 */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_EMC_40_SEMC_RDY, /* GPIO_EMC_40 is configured as SEMC_RDY */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_EMC_41_SEMC_CSX00, /* GPIO_EMC_41 is configured as SEMC_CSX00 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
|
||||
/*
|
||||
the both io has been as mdio for phy driver
|
||||
*/
|
||||
// IOMUXC_SetPinMux(
|
||||
// IOMUXC_GPIO_EMC_40_SEMC_RDY, /* GPIO_EMC_40 is configured as SEMC_RDY */
|
||||
// 0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
// IOMUXC_SetPinMux(
|
||||
// IOMUXC_GPIO_EMC_41_SEMC_CSX00, /* GPIO_EMC_41 is configured as SEMC_CSX00 */
|
||||
// 0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */
|
||||
0x10B0u); /* Slew Rate Field: Slow Slew Rate
|
||||
Drive Strength Field: R0/6
|
||||
Speed Field: medium(100MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
Pull / Keep Enable Field: Pull/Keeper Enabled
|
||||
Pull / Keep Select Field: Keeper
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Down
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */
|
||||
0x10B0u); /* Slew Rate Field: Slow Slew Rate
|
||||
Drive Strength Field: R0/6
|
||||
Speed Field: medium(100MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
Pull / Keep Enable Field: Pull/Keeper Enabled
|
||||
Pull / Keep Select Field: Keeper
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Down
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_EMC_00_SEMC_DATA00, /* GPIO_EMC_00 PAD functional properties : */
|
||||
0x0110F9u); /* Slew Rate Field: Fast Slew Rate
|
||||
|
|
@ -738,79 +760,74 @@ void imxrt_semc_pins_init(void)
|
|||
Pull / Keep Select Field: Keeper
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Down
|
||||
Hyst. Enable Field: Hysteresis Enabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_EMC_40_SEMC_RDY, /* GPIO_EMC_40 PAD functional properties : */
|
||||
0x0110F9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/7
|
||||
Speed Field: max(200MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
Pull / Keep Enable Field: Pull/Keeper Enabled
|
||||
Pull / Keep Select Field: Keeper
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Down
|
||||
Hyst. Enable Field: Hysteresis Enabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_EMC_41_SEMC_CSX00, /* GPIO_EMC_41 PAD functional properties : */
|
||||
0x0110F9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/7
|
||||
Speed Field: max(200MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
Pull / Keep Enable Field: Pull/Keeper Enabled
|
||||
Pull / Keep Select Field: Keeper
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Down
|
||||
Hyst. Enable Field: Hysteresis Enabled */
|
||||
|
||||
// IOMUXC_SetPinConfig(
|
||||
// IOMUXC_GPIO_EMC_40_SEMC_RDY, /* GPIO_EMC_40 PAD functional properties : */
|
||||
// 0x0110F9u); /* Slew Rate Field: Fast Slew Rate
|
||||
// Drive Strength Field: R0/7
|
||||
// Speed Field: max(200MHz)
|
||||
// Open Drain Enable Field: Open Drain Disabled
|
||||
// Pull / Keep Enable Field: Pull/Keeper Enabled
|
||||
// Pull / Keep Select Field: Keeper
|
||||
// Pull Up / Down Config. Field: 100K Ohm Pull Down
|
||||
// Hyst. Enable Field: Hysteresis Enabled */
|
||||
// IOMUXC_SetPinConfig(
|
||||
// IOMUXC_GPIO_EMC_41_SEMC_CSX00, /* GPIO_EMC_41 PAD functional properties : */
|
||||
// 0x0110F9u); /* Slew Rate Field: Fast Slew Rate
|
||||
// Drive Strength Field: R0/7
|
||||
// Speed Field: max(200MHz)
|
||||
// Open Drain Enable Field: Open Drain Disabled
|
||||
// Pull / Keep Enable Field: Pull/Keeper Enabled
|
||||
// Pull / Keep Select Field: Keeper
|
||||
// Pull Up / Down Config. Field: 100K Ohm Pull Down
|
||||
// Hyst. Enable Field: Hysteresis Enabled */
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ETH
|
||||
void imxrt_enet_pins_init(void)
|
||||
{
|
||||
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
|
||||
|
||||
IOMUXC_SetPinMux(
|
||||
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_AD_B0_03_GPIO1_IO03, /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, /* GPIO_AD_B0_10 is configured as GPIO1_IO10 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */ /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_04_ENET_RX_DATA00, /* GPIO_B1_04 is configured as ENET_RX_DATA00 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, /* GPIO_AD_B0_10 is configured as GPIO1_IO10 */
|
||||
0U);
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_04_ENET_RX_DATA00, /* GPIO_B1_04 is configured as ENET_RX_DATA00 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_05_ENET_RX_DATA01, /* GPIO_B1_05 is configured as ENET_RX_DATA01 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_06_ENET_RX_EN, /* GPIO_B1_06 is configured as ENET_RX_EN */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_07_ENET_TX_DATA00, /* GPIO_B1_07 is configured as ENET_TX_DATA00 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_08_ENET_TX_DATA01, /* GPIO_B1_08 is configured as ENET_TX_DATA01 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_09_ENET_TX_EN, /* GPIO_B1_09 is configured as ENET_TX_EN */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_10_ENET_REF_CLK, /* GPIO_B1_10 is configured as ENET_REF_CLK */
|
||||
1U); /* Software Input On Field: Force input path of pad GPIO_B1_10 */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_11_ENET_RX_ER, /* GPIO_B1_11 is configured as ENET_RX_ER */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_EMC_40_ENET_MDC, /* GPIO_EMC_40 is configured as ENET_MDC */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_EMC_41_ENET_MDIO, /* GPIO_EMC_41 is configured as ENET_MDIO */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_AD_B0_09 PAD functional properties : */
|
||||
0xB0A9u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_05_ENET_RX_DATA01, /* GPIO_B1_05 is configured as ENET_RX_DATA01 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_06_ENET_RX_EN, /* GPIO_B1_06 is configured as ENET_RX_EN */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_07_ENET_TX_DATA00, /* GPIO_B1_07 is configured as ENET_TX_DATA00 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_08_ENET_TX_DATA01, /* GPIO_B1_08 is configured as ENET_TX_DATA01 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_09_ENET_TX_EN, /* GPIO_B1_09 is configured as ENET_TX_EN */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_10_ENET_REF_CLK, /* GPIO_B1_10 is configured as ENET_REF_CLK */
|
||||
1U); /* Software Input On Field: Force input path of pad GPIO_B1_10 */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_11_ENET_RX_ER, /* GPIO_B1_11 is configured as ENET_RX_ER */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_EMC_40_ENET_MDC, /* GPIO_EMC_40 is configured as ENET_MDC */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_EMC_41_ENET_MDIO, /* GPIO_EMC_41 is configured as ENET_MDIO */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_AD_B0_03_GPIO1_IO03, /* GPIO_AD_B0_09 PAD functional properties : */
|
||||
0xB0A9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: medium(100MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -818,9 +835,10 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, /* GPIO_AD_B0_10 PAD functional properties : */
|
||||
0xB0A9u); /* Slew Rate Field: Fast Slew Rate
|
||||
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, /* GPIO_AD_B0_10 PAD functional properties : */
|
||||
0xB0A9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: medium(100MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -828,9 +846,9 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_04_ENET_RX_DATA00, /* GPIO_B1_04 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_04_ENET_RX_DATA00, /* GPIO_B1_04 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: max(200MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -838,9 +856,9 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_05_ENET_RX_DATA01, /* GPIO_B1_05 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_05_ENET_RX_DATA01, /* GPIO_B1_05 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: max(200MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -848,9 +866,9 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_06_ENET_RX_EN, /* GPIO_B1_06 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_06_ENET_RX_EN, /* GPIO_B1_06 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: max(200MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -858,9 +876,9 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_07_ENET_TX_DATA00, /* GPIO_B1_07 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_07_ENET_TX_DATA00, /* GPIO_B1_07 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: max(200MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -868,9 +886,9 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_08_ENET_TX_DATA01, /* GPIO_B1_08 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_08_ENET_TX_DATA01, /* GPIO_B1_08 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: max(200MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -878,9 +896,9 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_09_ENET_TX_EN, /* GPIO_B1_09 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_09_ENET_TX_EN, /* GPIO_B1_09 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: max(200MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -888,9 +906,9 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_10_ENET_REF_CLK, /* GPIO_B1_10 PAD functional properties : */
|
||||
0x31u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_10_ENET_REF_CLK, /* GPIO_B1_10 PAD functional properties : */
|
||||
0x31u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/6
|
||||
Speed Field: low(50MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -898,9 +916,9 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Keeper
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Down
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_11_ENET_RX_ER, /* GPIO_B1_11 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_11_ENET_RX_ER, /* GPIO_B1_11 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: max(200MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -908,9 +926,9 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_EMC_40_ENET_MDC, /* GPIO_EMC_40 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_EMC_40_ENET_MDC, /* GPIO_EMC_40 PAD functional properties : */
|
||||
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: max(200MHz)
|
||||
Open Drain Enable Field: Open Drain Disabled
|
||||
|
|
@ -918,9 +936,9 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_EMC_41_ENET_MDIO, /* GPIO_EMC_41 PAD functional properties : */
|
||||
0xB829u); /* Slew Rate Field: Fast Slew Rate
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_EMC_41_ENET_MDIO, /* GPIO_EMC_41 PAD functional properties : */
|
||||
0xB829u); /* Slew Rate Field: Fast Slew Rate
|
||||
Drive Strength Field: R0/5
|
||||
Speed Field: low(50MHz)
|
||||
Open Drain Enable Field: Open Drain Enabled
|
||||
|
|
@ -928,6 +946,7 @@ void imxrt_enet_pins_init(void)
|
|||
Pull / Keep Select Field: Pull
|
||||
Pull Up / Down Config. Field: 100K Ohm Pull Up
|
||||
Hyst. Enable Field: Hysteresis Disabled */
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -943,14 +962,14 @@ void rt_hw_board_init()
|
|||
imxrt_uart_pins_init();
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SDRAM
|
||||
imxrt_semc_pins_init();
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ETH
|
||||
imxrt_enet_pins_init();
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SDRAM
|
||||
imxrt_semc_pins_init();
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_DMA
|
||||
imxrt_dma_init();
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue