developer
/
xiuos
forked from xuos/xiuos
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

fix addr map

This commit is contained in:
lr 2024-06-27 17:58:54 +08:00
parent 11f7eb0da8
commit e450284d86
4 changed files with 11 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_base.c
View File

@ -122,12 +122,10 @@ __attribute__((always_inline)) static inline HAL_Status TimerDelayUs(uint32_t us
from = HAL_TIMER_GetCount(SYS_TIMER);
count = PLL_INPUT_OSC_RATE / 1000000 * us;
do {
now = HAL_TIMER_GetCount(SYS_TIMER);
pass = now > from ? now - from : from - now;
} while (pass < count);
return HAL_OK;
}
#endif
@ -314,13 +312,13 @@ __attribute__((weak)) HAL_Status HAL_DelayMs(uint32_t ms)
*/
HAL_Status HAL_DelayUs(uint32_t us)
{
#if defined(SYS_TIMER) && defined(HAL_TIMER_MODULE_ENABLED)
// #if defined(SYS_TIMER) && defined(HAL_TIMER_MODULE_ENABLED)
return TimerDelayUs(us);
#else
// return TimerDelayUs(us);
// #else
return HAL_CPUDelayUs(us);
#endif
// #endif
}
/**

2
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_bsp.c
View File

@ -323,7 +323,7 @@ const struct HAL_CANFD_DEV g_can2Dev =
#ifdef HAL_GMAC_MODULE_ENABLED
const struct HAL_GMAC_DEV g_gmac0Dev =
{
.pReg = GMAC0_VADDR,
.pReg = GMAC0,
.clkID = CLK_MAC0_2TOP,
.clkGateID = CLK_MAC0_2TOP_GATE,
.pclkID = PCLK_PHP,

2
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_base.h
View File

@ -18,8 +18,6 @@
#include "hal_driver.h"
#include "hal_debug.h"
#define GMAC0_VADDR ((struct GMAC_REG *)(0x1000000000U + GMAC0_BASE))
#define GPIO2_VADDR ((struct GPIO_REG *)(0x2000000000U + GPIO2_BASE))
/***************************** MACRO Definition ******************************/
/** @defgroup HAL_BASE_Exported_Definition_Group1 Basic Definition

12
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/rk3568.h
View File

@ -1235,11 +1235,11 @@ struct INTMUX_REG {
/****************************************************************************************/
/* Module Variable Define */
#define GRF ((struct GRF_REG *) GRF_BASE)
#define PMUCRU ((struct PMUCRU_REG *) PMUCRU_BASE)
#define GRF ((struct GRF_REG *) (GRF_BASE + 0x2000000000ULL))
#define PMUCRU ((struct PMUCRU_REG *) (PMUCRU_BASE + 0x2000000000ULL))
#define TIMER6 ((struct TIMER_REG *) TIMER6_BASE)
#define TIMER7 ((struct TIMER_REG *) TIMER7_BASE)
#define CRU ((struct CRU_REG *) CRU_BASE)
#define CRU ((struct CRU_REG *) (CRU_BASE + 0x2000000000ULL))
#define I2C0 ((struct I2C_REG *) I2C0_BASE)
#define UART0 ((struct UART_REG *) UART0_BASE)
#define GPIO0 ((struct GPIO_REG *) GPIO0_BASE)
@ -1247,7 +1247,7 @@ struct INTMUX_REG {
#define PMU ((struct PMU_REG *) PMU_BASE)
#define SPINLOCK ((struct SPINLOCK_REG *) SPINLOCK_BASE)
#define GMAC1 ((struct GMAC_REG *) GMAC1_BASE)
#define GMAC0 ((struct GMAC_REG *) GMAC0_BASE)
#define GMAC0 ((struct GMAC_REG *) (GMAC0_BASE + 0x2000000000ULL))
#define MMC ((struct MMC_REG *) MMC_BASE)
#define FSPI ((struct FSPI_REG *) FSPI_BASE)
#define DMA0 ((struct DMA_REG *) DMA0_BASE)
@ -1265,7 +1265,7 @@ struct INTMUX_REG {
#define TIMER2 ((struct TIMER_REG *) TIMER2_BASE)
#define TIMER3 ((struct TIMER_REG *) TIMER3_BASE)
#define TIMER4 ((struct TIMER_REG *) TIMER4_BASE)
#define TIMER5 ((struct TIMER_REG *) TIMER5_BASE)
#define TIMER5 ((struct TIMER_REG *) (TIMER5_BASE + 0x2000000000ULL))
#define WDT ((struct WDT_REG *) WDT_BASE)
#define SPI0 ((struct SPI_REG *) SPI0_BASE)
#define SPI1 ((struct SPI_REG *) SPI1_BASE)
@ -1286,7 +1286,7 @@ struct INTMUX_REG {
#define TSADC ((struct TSADC_REG *) TSADC_BASE)
#define SARADC ((struct SARADC_REG *) SARADC_BASE)
#define GPIO1 ((struct GPIO_REG *) GPIO1_BASE)
#define GPIO2 ((struct GPIO_REG *) GPIO2_BASE)
#define GPIO2 ((struct GPIO_REG *) (GPIO2_BASE + 0x2000000000ULL))
#define GPIO3 ((struct GPIO_REG *) GPIO3_BASE)
#define GPIO4 ((struct GPIO_REG *) GPIO4_BASE)
#define MBOX0 ((struct MBOX_REG *) MBOX0_BASE)