forked from xuos/xiuos
Merge branch 'prepare_for_master' of https://gitlink.org.cn/xuos/xiuos into prepare_for_master
This commit is contained in:
commit
e31199a104
|
@ -2,7 +2,6 @@
|
|||
# APP_Framework/Applications/Make.defs
|
||||
############################################################################
|
||||
CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Applications
|
||||
CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Applications/app_test
|
||||
CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Applications/general_functions/list
|
||||
|
||||
include $(wildcard $(APPDIR)/../../../APP_Framework/Applications/*/Make.defs)
|
||||
|
|
|
@ -10,6 +10,14 @@ ifeq ($(CONFIG_ADD_NUTTX_FETURES),y)
|
|||
CSRCS += test_lcd.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_TOUCH),y)
|
||||
CSRCS += test_touch.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_MUSL_LIBC),y)
|
||||
CSRCS += test_musl.c
|
||||
endif
|
||||
|
||||
include $(APPDIR)/Application.mk
|
||||
|
||||
endif
|
||||
|
|
|
@ -1,26 +1,22 @@
|
|||
/****************************************************************************
|
||||
* apps/examples/fb/fb_main.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
/**
|
||||
* @file: test_lcd.c
|
||||
* @brief: a application of dac function
|
||||
* @version: 2.0
|
||||
* @author: AIIT XUOS Lab
|
||||
* @date: 2022/1/11
|
||||
*/
|
||||
|
||||
#include <transform.h>
|
||||
|
||||
|
@ -29,40 +25,39 @@
|
|||
#ifdef CONFIG_K210_LCD
|
||||
void LcdDemo(void)
|
||||
{
|
||||
int x1 = 50, y1 = 50, x2 = LCD_XSIZE_TFT - 50, y2 = LCD_YSIZE_TFT - 50;
|
||||
int lcd_fd = PrivOpen("/dev/lcd_dev",O_RDWR);
|
||||
LcdWriteParam disp_info;
|
||||
|
||||
Main_Image_Start_Address(LCD_START_ADDR);
|
||||
Main_Image_Width(LCD_XSIZE_TFT);
|
||||
Main_Window_Start_XY(0, 0);
|
||||
Canvas_Image_Start_address(LCD_START_ADDR);
|
||||
Canvas_image_width(LCD_XSIZE_TFT);
|
||||
Active_Window_XY(0, 0);
|
||||
Active_Window_WH(LCD_XSIZE_TFT, LCD_YSIZE_TFT);
|
||||
up_mdelay(10);
|
||||
Canvas_Image_Start_address(LCD_START_ADDR);
|
||||
disp_info.type = 0;
|
||||
disp_info.string_info.x_pos = 80;
|
||||
disp_info.string_info.y_pos = 80;
|
||||
disp_info.string_info.width = 250;
|
||||
disp_info.string_info.height = 24;
|
||||
disp_info.string_info.font_size = 24;
|
||||
disp_info.string_info.addr = "wecome test lcd";
|
||||
disp_info.string_info.font_color = GREEN;
|
||||
disp_info.string_info.back_color = BLUE;
|
||||
PrivWrite(lcd_fd, &disp_info, sizeof(LcdWriteParam));
|
||||
PrivTaskDelay(2000);
|
||||
|
||||
for(int i = 0; i < 3; i++)
|
||||
{
|
||||
x1 = 50;
|
||||
y1 = 50;
|
||||
x2 = LCD_XSIZE_TFT - 50;
|
||||
y2 = LCD_YSIZE_TFT - 50;
|
||||
syslog(LOG_NOTICE, "Disp_demo %d (%d,%d - %d,%d)\n", i, x1, y1, x2, y2);
|
||||
LT768_DrawSquare_Fill(x1, y1, x2, y2, Red);
|
||||
up_mdelay(2000);
|
||||
x1 += 20;
|
||||
y1 += 20;
|
||||
x2 -= 20;
|
||||
y2 -= 20;
|
||||
LT768_DrawSquare_Fill(x1, y1, x2, y2, Green);
|
||||
up_mdelay(2000);
|
||||
x1 += 20;
|
||||
y1 += 20;
|
||||
x2 -= 20;
|
||||
y2 -= 20;
|
||||
LT768_DrawSquare_Fill(x1, y1, x2, y2, Blue);
|
||||
up_mdelay(2000);
|
||||
}
|
||||
disp_info.type = 1;
|
||||
lv_color_t redcolor = {
|
||||
.ch = {
|
||||
.red = 0b11111,
|
||||
.green = 0,
|
||||
.blue = 0
|
||||
}
|
||||
};
|
||||
disp_info.pixel_info.x_startpos = 0;
|
||||
disp_info.pixel_info.x_endpos = 50;
|
||||
disp_info.pixel_info.y_startpos = 0;
|
||||
disp_info.pixel_info.y_endpos = 50;
|
||||
disp_info.pixel_info.pixel_color = &redcolor;
|
||||
PrivWrite(lcd_fd, &disp_info, sizeof(LcdWriteParam));
|
||||
PrivTaskDelay(2000);
|
||||
|
||||
disp_info.type = SHOW_TRIANGLE;
|
||||
PrivWrite(lcd_fd, &disp_info, sizeof(LcdWriteParam));
|
||||
}
|
||||
|
||||
#else
|
||||
|
|
|
@ -0,0 +1,103 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file: test_musl.c
|
||||
* @brief: a application of musl test function
|
||||
* @version: 2.0
|
||||
* @author: AIIT XUOS Lab
|
||||
* @date: 2022/11/8
|
||||
*/
|
||||
|
||||
#include <transform.h>
|
||||
|
||||
#ifdef ADD_NUTTX_FETURES
|
||||
|
||||
#if defined(CONFIG_MUSL_LIBC) && defined(CONFIG_FS_AUTOMOUNTER)
|
||||
|
||||
static void file_read_and_write(void)
|
||||
{
|
||||
FILE *p;
|
||||
char s[] = "good luck to you!";
|
||||
char buffer[20];
|
||||
|
||||
if((p = fopen("/mnt/sdcard/test.txt","w+")) == NULL)
|
||||
{
|
||||
printf("Can not open file!\n");
|
||||
}
|
||||
fwrite(s, sizeof(s) + 1, 1, p);
|
||||
fseek(p, SEEK_SET, 0);
|
||||
fread(buffer, sizeof(buffer) + 1, 1, p);
|
||||
printf("read string is: %s\n", buffer);
|
||||
fclose(p);
|
||||
}
|
||||
|
||||
static void file_operations(void)
|
||||
{
|
||||
int ret;
|
||||
FILE *fp;
|
||||
char filename1[] = "/mnt/sdcard/file1.txt";
|
||||
char filename2[] = "/mnt/sdcard/file2.txt";
|
||||
|
||||
fp = fopen(filename1, "w");
|
||||
|
||||
fprintf(fp, "%s", "this is runoob.com");
|
||||
fclose(fp);
|
||||
|
||||
ret = remove(filename1);
|
||||
|
||||
if(ret == 0)
|
||||
{
|
||||
printf("remove file1 success!\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("error,can not remove file1!\n");
|
||||
}
|
||||
|
||||
ret = remove(filename2);
|
||||
if(ret == 0)
|
||||
{
|
||||
printf("remove file2 success!\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("error,can not remove file2!\n");
|
||||
}
|
||||
}
|
||||
|
||||
static void malloc_and_free(void)
|
||||
{
|
||||
int *p;
|
||||
int len;
|
||||
for(int i = 0; i < 100; i++)
|
||||
{
|
||||
len = 1024*(i+1);
|
||||
p = malloc(len);
|
||||
if(p)
|
||||
{
|
||||
printf("malloc %d bytes success!\n",len);
|
||||
free(p);
|
||||
}
|
||||
}
|
||||
}
|
||||
void Testmusl(void)
|
||||
{
|
||||
printf("--------start test file read and write!--------\n");
|
||||
file_read_and_write();
|
||||
printf("----------start test file operationsn!---------\n");
|
||||
file_operations();
|
||||
printf("---------start test malloc and free!-----------\n");
|
||||
malloc_and_free();
|
||||
}
|
||||
#endif
|
||||
#endif
|
|
@ -1,3 +1,46 @@
|
|||
/****************************************************************************
|
||||
* apps/examples/fb/fb_main.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <transform.h>
|
||||
|
||||
#ifdef ADD_NUTTX_FETURES
|
||||
|
||||
#ifdef CONFIG_BSP_USING_TOUCH
|
||||
void TestTouch(void)
|
||||
{
|
||||
int fd;
|
||||
TouchDataParam point = {0, 0, 0};
|
||||
fd = PrivOpen("/dev/touch_dev", O_RDWR);
|
||||
while(1)
|
||||
{
|
||||
PrivRead(fd,&point,1);
|
||||
printf("Now touch point:(%d,%d)\n",point.x,point.y);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <transform.h>
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
#include <nuttx/semaphore.h>
|
||||
#include <nuttx/time.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <nuttx/clock.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <unistd.h>
|
||||
|
@ -44,6 +45,7 @@
|
|||
#ifdef CONFIG_USER_TEST_LCD
|
||||
#ifdef CONFIG_K210_LCD
|
||||
# include "nuttx/lcd/lt768.h"
|
||||
# include "nuttx/lcd/lt768_learn.h"
|
||||
# include "nuttx/lcd/lt768_lib.h"
|
||||
# include "nuttx/lcd/if_port.h"
|
||||
#else
|
||||
|
@ -127,6 +129,23 @@ extern "C" {
|
|||
#define EOK 0
|
||||
#define x_err_t int
|
||||
|
||||
typedef union {
|
||||
struct {
|
||||
uint16_t blue : 5;
|
||||
uint16_t green : 6;
|
||||
uint16_t red : 5;
|
||||
} ch;
|
||||
uint16_t full;
|
||||
} lv_color16_t;
|
||||
typedef lv_color16_t lv_color_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t x;
|
||||
uint16_t y;
|
||||
uint16_t press;
|
||||
}TouchDataParam;
|
||||
|
||||
struct PinDevIrq
|
||||
{
|
||||
int irq_mode;//< RISING/FALLING/HIGH/LOW
|
||||
|
|
|
@ -0,0 +1,74 @@
|
|||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
CONFIG_ADD_NUTTX_FETURES=y
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="xidatong-arm32"
|
||||
CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
|
||||
CONFIG_ARCH_CHIP="imxrt"
|
||||
CONFIG_ARCH_CHIP_IMXRT=y
|
||||
CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=10240
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARMV7M_DCACHE=y
|
||||
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
|
||||
CONFIG_ARMV7M_ICACHE=y
|
||||
CONFIG_ARMV7M_USEBASEPRI=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=104926
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_FAT_LCNAMES=y
|
||||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_FAT_LFN=y
|
||||
CONFIG_FS_FAT=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO2_16_31_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_DEV_GPIO=y
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_IMXRT_USDHC1=y
|
||||
CONFIG_IMXRT_USDHC1_WIDTH_D1_D4=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_IOB_NBUFFERS=24
|
||||
CONFIG_IOB_NCHAINS=8
|
||||
CONFIG_LIBC_STRERROR=y
|
||||
CONFIG_LPUART1_SERIAL_CONSOLE=y
|
||||
CONFIG_MMCSD=y
|
||||
CONFIG_MMCSD_SDIO=y
|
||||
CONFIG_MM_IOB=y
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_CMDOPT_DD_STATS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=32768
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_RAM_SIZE=524288
|
||||
CONFIG_RAM_START=0x20200000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_SCHED_CHILD_STATUS=y
|
||||
CONFIG_SCHED_HAVE_PARENT=y
|
||||
CONFIG_SCHED_HPWORK=y
|
||||
CONFIG_SCHED_LPWORK=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_SDIO_BLOCKSETUP=y
|
||||
CONFIG_SERIAL_TERMIOS=y
|
||||
CONFIG_START_DAY=14
|
||||
CONFIG_START_MONTH=3
|
||||
CONFIG_SYSTEM_CLE_CMD_HISTORY=y
|
||||
CONFIG_SYSTEM_COLOR_CLE=y
|
||||
CONFIG_FS_AUTOMOUNTER=y
|
||||
CONFIG_XIDATONG_ARM32_SDIO_AUTOMOUNT=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_CMD_HISTORY_LEN=100
|
||||
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_MUSL_LIBC=y
|
||||
CONFIG_INIT_ENTRYPOINT="nsh_main"
|
|
@ -39,6 +39,12 @@ menuconfig BSP_USING_TOUCH
|
|||
bool "Using touch device"
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_CAN
|
||||
select K210_16550_UART
|
||||
select K210_16550_UART1
|
||||
bool "Using CAN device"
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_CH438
|
||||
bool "Using CH438 device"
|
||||
default n
|
||||
|
|
|
@ -0,0 +1,73 @@
|
|||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
# CONFIG_NSH_DISABLE_LOSMART is not set
|
||||
# CONFIG_STANDARD_SERIAL is not set
|
||||
CONFIG_ADD_NUTTX_FETURES=y
|
||||
CONFIG_ARCH="risc-v"
|
||||
CONFIG_ARCH_BOARD="xidatong-riscv64"
|
||||
CONFIG_ARCH_BOARD_XIDATONG_RISCV64=y
|
||||
CONFIG_ARCH_CHIP="k210"
|
||||
CONFIG_ARCH_CHIP_K210=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=2048
|
||||
CONFIG_ARCH_RISCV=y
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_BINFMT_DISABLE=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=46000
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_DEBUG_FULLOPT=y
|
||||
CONFIG_DEBUG_SYMBOLS=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_INIT_ENTRYPOINT="nsh_main"
|
||||
CONFIG_INIT_STACKSIZE=3072
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_LIBC_PERROR_STDOUT=y
|
||||
CONFIG_LIBC_STRERROR=y
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_DISABLE_MKDIR=y
|
||||
CONFIG_NSH_DISABLE_RM=y
|
||||
CONFIG_NSH_DISABLE_RMDIR=y
|
||||
CONFIG_NSH_DISABLE_UMOUNT=y
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_NSH_STRERROR=y
|
||||
CONFIG_PREALLOC_TIMERS=4
|
||||
CONFIG_RAM_SIZE=2097152
|
||||
CONFIG_RAM_START=0x80400000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_CMD_HISTORY_LEN=100
|
||||
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
|
||||
CONFIG_RR_INTERVAL=200
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_STACK_COLORATION=y
|
||||
CONFIG_START_DAY=28
|
||||
CONFIG_START_MONTH=12
|
||||
CONFIG_START_YEAR=2019
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_TASK_NAME_SIZE=20
|
||||
CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
CONFIG_SCHED_HPWORK=y
|
||||
CONFIG_DEV_GPIO=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_K210_16550_UART=y
|
||||
CONFIG_K210_16550_UART1=y
|
||||
CONFIG_K210_16550_UART1_BASE=0x50210000
|
||||
CONFIG_K210_16550_UART1_CLOCK=195000000
|
||||
CONFIG_K210_16550_UART1_IRQ=38
|
||||
CONFIG_K210_16550_UART1_BAUD=115200
|
||||
CONFIG_K210_16550_UART1_PARITY=0
|
||||
CONFIG_K210_16550_UART1_BITS=8
|
||||
CONFIG_K210_16550_UART1_2STOP=0
|
||||
CONFIG_K210_16550_UART1_RXBUFSIZE=128
|
||||
CONFIG_K210_16550_UART1_TXBUFSIZE=128
|
||||
CONFIG_BSP_USING_CAN=y
|
||||
CONFIG_SERIAL_TERMIOS=y
|
|
@ -78,8 +78,6 @@ extern "C"
|
|||
#endif
|
||||
|
||||
/*************************** GPIO define ***************************/
|
||||
/* Connected to red led */
|
||||
#define BOARD_LED_PAD 14
|
||||
|
||||
/* UART IO */
|
||||
#define GPIO_WIFI_RXD 7
|
||||
|
@ -88,6 +86,8 @@ extern "C"
|
|||
#define GPIO_EC200T_TXD 20
|
||||
#define GPIO_CH376T_RXD 22
|
||||
#define GPIO_CH376T_TXD 23
|
||||
#define GPIO_CAN_RXD 18
|
||||
#define GPIO_CAN_TXD 19
|
||||
|
||||
/* ch438 IO */
|
||||
#define CH438_ALE_PIN 24
|
||||
|
@ -128,12 +128,12 @@ extern "C"
|
|||
#define GPIO_E220_M1 45
|
||||
#define GPIO_E18_MODE 46
|
||||
#define GPIO_WIFI_EN 8
|
||||
#define GPIO_CAN_CFG 43
|
||||
|
||||
/************************** end GPIO define **************************/
|
||||
|
||||
|
||||
/*************************** FPIOA define ***************************/
|
||||
#define BOARD_LED_IO 0
|
||||
|
||||
/* UART FPOA */
|
||||
#define FPOA_USART1_RX K210_IO_FUNC_UART1_RX
|
||||
|
@ -182,6 +182,7 @@ extern "C"
|
|||
#define FPIOA_E220_M1 2
|
||||
#define FPIOA_E18_MODE 3
|
||||
#define FPIOA_WIFI_EN 4
|
||||
#define FPIOA_CAN_NCFG 5
|
||||
|
||||
/************************** end FPIOA define **************************/
|
||||
|
||||
|
|
|
@ -58,4 +58,8 @@ ifeq ($(CONFIG_BSP_USING_TOUCH),y)
|
|||
CSRCS += k210_touch.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_CAN),y)
|
||||
CSRCS += can_demo.c
|
||||
endif
|
||||
|
||||
include $(TOPDIR)/boards/Board.mk
|
||||
|
|
|
@ -0,0 +1,147 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file can_demo.c
|
||||
* @brief xidatong-riscv64 can_demo.c
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.11.10
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/pthread.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <nuttx/time.h>
|
||||
#include <nuttx/fs/fs.h>
|
||||
#include <nuttx/fs/ioctl.h>
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <unistd.h>
|
||||
#include <stdbool.h>
|
||||
#include "time.h"
|
||||
#include <debug.h>
|
||||
#include <assert.h>
|
||||
#include <fcntl.h>
|
||||
#include <termios.h>
|
||||
#include <nuttx/ioexpander/gpio.h>
|
||||
#include "k210_uart_16550.h"
|
||||
#include "k210_fpioa.h"
|
||||
#include "k210_gpiohs.h"
|
||||
#include "k210_gpio_common.h"
|
||||
|
||||
static int fd, flag=0;
|
||||
|
||||
static void serial_thread_entry(void)
|
||||
{
|
||||
uint8_t ch;
|
||||
while(read(fd, &ch, 1) == 1)
|
||||
{
|
||||
printf("%02x ",ch);
|
||||
}
|
||||
}
|
||||
|
||||
static void start_thread(void)
|
||||
{
|
||||
int ret;
|
||||
pthread_t thread;
|
||||
pthread_attr_t attr = PTHREAD_ATTR_INITIALIZER;
|
||||
attr.priority = 20;
|
||||
attr.stacksize = 2048;
|
||||
|
||||
ret = pthread_create(&thread, &attr, (void*)serial_thread_entry, NULL);
|
||||
if (ret != 0)
|
||||
{
|
||||
printf("task create failed, status=%d\n", ret);
|
||||
}
|
||||
|
||||
flag = 1;
|
||||
}
|
||||
|
||||
static void set_baud(unsigned long speed)
|
||||
{
|
||||
struct termios cfg;
|
||||
tcgetattr(fd, &cfg);
|
||||
cfsetspeed(&cfg, speed);
|
||||
tcsetattr(fd, TCSANOW, &cfg);
|
||||
}
|
||||
|
||||
static void can_cfg_start(void)
|
||||
{
|
||||
uint8_t cmd[8];
|
||||
set_baud(9600);
|
||||
up_mdelay(1000);
|
||||
|
||||
k210_gpiohs_set_direction(FPIOA_CAN_NCFG, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_value(FPIOA_CAN_NCFG, GPIO_PV_LOW);
|
||||
up_mdelay(200);
|
||||
|
||||
cmd[0] = 0xAA;
|
||||
cmd[1] = 0x55;
|
||||
cmd[2] = 0xFD;
|
||||
cmd[3] = 0x32;
|
||||
cmd[4] = 0x01;
|
||||
cmd[5] = 0x0B;
|
||||
cmd[6] = 0xc4;
|
||||
cmd[7] = 0x29;
|
||||
write(fd, cmd, 8);
|
||||
}
|
||||
|
||||
static void can_cfg_end(void)
|
||||
{
|
||||
k210_gpiohs_set_direction(FPIOA_CAN_NCFG, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_value(FPIOA_CAN_NCFG, GPIO_PV_HIGH);
|
||||
set_baud(115200);
|
||||
}
|
||||
|
||||
void can_test(void)
|
||||
{
|
||||
uint8_t msg[8];
|
||||
uint8_t i;
|
||||
|
||||
fd = open("/dev/ttyS1", O_RDWR);
|
||||
if (flag == 0)
|
||||
{
|
||||
/* 1、start thread */
|
||||
start_thread();
|
||||
up_mdelay(20);
|
||||
|
||||
/* 2、config can prama */
|
||||
can_cfg_start();
|
||||
up_mdelay(20);
|
||||
|
||||
/* 3、exit config */
|
||||
can_cfg_end();
|
||||
up_mdelay(20);;
|
||||
}
|
||||
|
||||
/* 4、send data */
|
||||
for(i=0;i<10;i++)
|
||||
{
|
||||
msg[0] = 0x11;
|
||||
msg[1] = 0x22;
|
||||
msg[2] = 0x33;
|
||||
msg[3] = 0x44;
|
||||
msg[4] = 0x55;
|
||||
msg[5] = 0x66;
|
||||
msg[6] = 0x77;
|
||||
msg[7] = 0x99;
|
||||
write(fd, msg, 8);
|
||||
up_mdelay(20);
|
||||
}
|
||||
}
|
|
@ -60,7 +60,7 @@ void CH376Demo(void)
|
|||
printf( "CH376FileCreatePath:0x%02x\n",(uint16_t)s );
|
||||
|
||||
printf( "Write some data to file\n" );
|
||||
strcpy( (char *)buf, "This is 演示数据\xd\xa" );
|
||||
strcpy( (char *)buf, "This is test case!\xd\xa" );
|
||||
s = CH376ByteWrite(buf, strlen((char *)buf), NULL );
|
||||
printf( "CH376ByteWrite:0x%02x\n",(uint16_t)s );
|
||||
|
||||
|
|
|
@ -47,6 +47,10 @@
|
|||
# include "k210_ch438.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BSP_USING_TOUCH
|
||||
# include "k210_touch.h"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
@ -87,23 +91,40 @@ int k210_bringup(void)
|
|||
board_lcd_initialize();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BSP_USING_TOUCH
|
||||
board_touch_initialize();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_K210_16550_UART1
|
||||
#ifdef CONFIG_ADAPTER_ESP8285_WIFI
|
||||
sysctl_clock_enable(SYSCTL_CLOCK_UART1);
|
||||
sysctl_reset(SYSCTL_RESET_UART1);
|
||||
|
||||
fpioa_set_function(GPIO_WIFI_TXD, FPOA_USART1_RX);
|
||||
fpioa_set_function(GPIO_WIFI_RXD, FPOA_USART1_TX);
|
||||
|
||||
fpioa_set_function(GPIO_WIFI_EN, K210_IO_FUNC_GPIOHS0 + GPIO_WIFI_EN);
|
||||
k210_gpiohs_set_direction(GPIO_WIFI_EN, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_value(GPIO_WIFI_EN, GPIO_PV_LOW);
|
||||
fpioa_set_function(GPIO_WIFI_EN, K210_IO_FUNC_GPIOHS0 + FPIOA_WIFI_EN);
|
||||
k210_gpiohs_set_direction(FPIOA_WIFI_EN, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_value(FPIOA_WIFI_EN, GPIO_PV_LOW);
|
||||
up_mdelay(50);
|
||||
k210_gpiohs_set_value(GPIO_WIFI_EN, GPIO_PV_HIGH);
|
||||
k210_gpiohs_set_value(FPIOA_WIFI_EN, GPIO_PV_HIGH);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BSP_USING_CAN
|
||||
sysctl_clock_enable(SYSCTL_CLOCK_UART1);
|
||||
sysctl_reset(SYSCTL_RESET_UART1);
|
||||
|
||||
fpioa_set_function(GPIO_CAN_TXD, FPOA_USART1_TX);
|
||||
fpioa_set_function(GPIO_CAN_RXD, FPOA_USART1_RX);
|
||||
|
||||
k210_fpioa_config(GPIO_CAN_CFG, HS_GPIO(FPIOA_CAN_NCFG) | K210_IOFLAG_GPIOHS);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_K210_16550_UART2
|
||||
sysctl_clock_enable(SYSCTL_CLOCK_UART2);
|
||||
sysctl_reset(SYSCTL_RESET_UART2);
|
||||
|
||||
fpioa_set_function(GPIO_EC200T_RXD, FPOA_USART2_RX);
|
||||
fpioa_set_function(GPIO_EC200T_TXD, FPOA_USART2_TX);
|
||||
#endif
|
||||
|
@ -111,6 +132,7 @@ int k210_bringup(void)
|
|||
#ifdef CONFIG_K210_16550_UART3
|
||||
sysctl_clock_enable(SYSCTL_CLOCK_UART3);
|
||||
sysctl_reset(SYSCTL_RESET_UART3);
|
||||
|
||||
fpioa_set_function(GPIO_CH376T_RXD, FPOA_USART3_RX);
|
||||
fpioa_set_function(GPIO_CH376T_TXD, FPOA_USART3_TX);
|
||||
#endif
|
||||
|
|
|
@ -18,8 +18,8 @@
|
|||
* @date 2022.04.26
|
||||
*/
|
||||
|
||||
#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H
|
||||
#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H
|
||||
#ifndef __BOARDS_XIDATONG_SRC_RISCV64_CH438_H
|
||||
#define __BOARDS_XIDATONG_SRC_RISCV64_CH438_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
|
@ -322,5 +322,5 @@
|
|||
void board_ch438_initialize(void);
|
||||
#endif
|
||||
|
||||
#endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H */
|
||||
#endif /* __BOARDS_XIDATONG_SRC_RISCV64_CH438_H */
|
||||
|
||||
|
|
|
@ -22,19 +22,25 @@
|
|||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include "k210_fpioa.h"
|
||||
#include "k210_gpiohs.h"
|
||||
#include "nuttx/arch.h"
|
||||
#include "nuttx/lcd/lt768.h"
|
||||
#include "nuttx/lcd/lt768_lib.h"
|
||||
#include "nuttx/lcd/if_port.h"
|
||||
#include "nuttx/lcd/lt768_learn.h"
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
#include <nuttx/fs/fs.h>
|
||||
#include <nuttx/fs/ioctl.h>
|
||||
#ifdef CONFIG_LCD_LCDDRV_SPIIF
|
||||
#include "nuttx/lcd/lcddrv_spiif.h"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
#define NCS_H() k210_gpiohs_set_value(FPIOA_LCD_NCS, GPIO_PV_HIGH); up_udelay(20)
|
||||
#define NCS_L() k210_gpiohs_set_value(FPIOA_LCD_NCS, GPIO_PV_LOW); up_udelay(20)
|
||||
#define CLK_H() k210_gpiohs_set_value(FPIOA_LCD_SCLK, GPIO_PV_HIGH); up_udelay(20)
|
||||
|
@ -42,6 +48,25 @@
|
|||
#define MOSI_H() k210_gpiohs_set_value(FPIOA_LCD_MOSI, GPIO_PV_HIGH)
|
||||
#define MOSI_L() k210_gpiohs_set_value(FPIOA_LCD_MOSI, GPIO_PV_LOW)
|
||||
|
||||
static int lcd_open(FAR struct file *filep);
|
||||
static int lcd_close(FAR struct file *filep);
|
||||
static ssize_t lcd_read(FAR struct file *filep, FAR char *buffer, size_t buflen);
|
||||
static ssize_t lcd_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
/* LCD POSIX interface */
|
||||
static const struct file_operations g_lcdfops =
|
||||
{
|
||||
lcd_open,
|
||||
lcd_close,
|
||||
lcd_read,
|
||||
lcd_write,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
@ -184,23 +209,7 @@ void lcd_drv_init(void)
|
|||
Canvas_Image_Start_address(LCD_START_ADDR);
|
||||
|
||||
//fill blue background
|
||||
LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, Blue);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: k210_lcd_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the LCD. Setup backlight (initially off)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int board_lcd_initialize(void)
|
||||
{
|
||||
/* Configure the LCD backlight (and turn the backlight off) */
|
||||
lcd_backlight_init(true);
|
||||
lcd_drv_init();
|
||||
return 0;
|
||||
LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, WHITE);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -218,3 +227,127 @@ void k210_backlight(bool blon)
|
|||
lcd_backlight_init(blon);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* Name: lcd_open
|
||||
****************************************************************************/
|
||||
static int lcd_open(FAR struct file *filep)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: lcd_close
|
||||
****************************************************************************/
|
||||
static int lcd_close(FAR struct file *filep)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: lcd_read
|
||||
****************************************************************************/
|
||||
static ssize_t lcd_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_write
|
||||
****************************************************************************/
|
||||
static ssize_t lcd_write(FAR struct file *filep, FAR const char *buffer, size_t buflen)
|
||||
{
|
||||
ssize_t ret = buflen;
|
||||
if (buffer == NULL)
|
||||
{
|
||||
return -ERROR;
|
||||
}
|
||||
LcdWriteParam * show = (LcdWriteParam *)buffer;
|
||||
|
||||
/* output string */
|
||||
switch (show->type)
|
||||
{
|
||||
|
||||
/* output string */
|
||||
case SHOW_STRING:
|
||||
LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, WHITE);
|
||||
LT768_Select_Internal_Font_Init(show->string_info.height, 1, 1, 1, 1);
|
||||
LT768_Print_Internal_Font_String(show->string_info.x_pos, show->string_info.y_pos, show->string_info.font_color,show->string_info.back_color,show->string_info.addr);
|
||||
break;
|
||||
|
||||
/* output dot */
|
||||
case SHOW_WDOT:
|
||||
LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, WHITE);
|
||||
LT768_DrawSquare_Fill(show->pixel_info.x_startpos,show->pixel_info.y_startpos, show->pixel_info.x_endpos, show->pixel_info.y_endpos, *(uint32_t *)(show->pixel_info.pixel_color));
|
||||
break;
|
||||
|
||||
/* output rgb */
|
||||
case SHOW_RGB:
|
||||
LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, WHITE);
|
||||
Display_RGB();
|
||||
break;
|
||||
|
||||
/* output pip */
|
||||
case SHOW_PIP:
|
||||
LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, WHITE);
|
||||
Display_PIP();
|
||||
break;
|
||||
|
||||
/* output Internal Font */
|
||||
case SHOW_INTERNAL_FONT:
|
||||
LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, WHITE);
|
||||
Display_Internal_Font();
|
||||
break;
|
||||
|
||||
/* output Outside Font */
|
||||
case SHOW_OUTSIDE_FONT:
|
||||
LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, WHITE);
|
||||
Display_Outside_Font();
|
||||
break;
|
||||
|
||||
/* output Triangle */
|
||||
case SHOW_TRIANGLE:
|
||||
LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, WHITE);
|
||||
Display_Triangle();
|
||||
break;
|
||||
|
||||
/* output picture */
|
||||
case SHOW_PICTURE:
|
||||
LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, WHITE);
|
||||
Display_Picture();
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = -ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
/****************************************************************************
|
||||
* Name: k210_lcd_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the LCD. Setup backlight (initially off)
|
||||
*
|
||||
****************************************************************************/
|
||||
int board_lcd_initialize(void)
|
||||
{
|
||||
/* Configure the LCD backlight (and turn the backlight off) */
|
||||
lcd_backlight_init(true);
|
||||
lcd_drv_init();
|
||||
up_mdelay(10);
|
||||
Main_Image_Start_Address(LCD_START_ADDR);
|
||||
Main_Image_Width(LCD_XSIZE_TFT);
|
||||
Main_Window_Start_XY(0, 0);
|
||||
Canvas_Image_Start_address(LCD_START_ADDR);
|
||||
Canvas_image_width(LCD_XSIZE_TFT);
|
||||
Active_Window_XY(0, 0);
|
||||
Active_Window_WH(LCD_XSIZE_TFT, LCD_YSIZE_TFT);
|
||||
up_mdelay(10);
|
||||
Canvas_Image_Start_address(LCD_START_ADDR);
|
||||
/* register device */
|
||||
register_driver("/dev/lcd_dev", &g_lcdfops, 0666, NULL);
|
||||
return OK;
|
||||
}
|
||||
|
|
|
@ -36,23 +36,12 @@
|
|||
|
||||
void board_autoled_initialize(void)
|
||||
{
|
||||
k210_fpioa_config(BOARD_LED_PAD, BOARD_LED_IO_FUNC | K210_IOFLAG_GPIOHS);
|
||||
k210_gpiohs_set_direction(BOARD_LED_IO, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_value(BOARD_LED_IO, true); /* LED off */
|
||||
}
|
||||
|
||||
void board_autoled_on(int led)
|
||||
{
|
||||
if (led == LED_PANIC)
|
||||
{
|
||||
k210_gpiohs_set_value(BOARD_LED_IO, false);
|
||||
}
|
||||
}
|
||||
|
||||
void board_autoled_off(int led)
|
||||
{
|
||||
if (led == LED_PANIC)
|
||||
{
|
||||
k210_gpiohs_set_value(BOARD_LED_IO, true);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -24,6 +24,44 @@
|
|||
****************************************************************************/
|
||||
#include "k210_touch.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
static void IIC_Init(void);
|
||||
static void SDA_IN(void);
|
||||
static void SDA_OUT(void);
|
||||
static uint8_t READ_SDA(void);
|
||||
static void IIC_SCL(uint8_t val);
|
||||
static void IIC_SDA(uint8_t val);
|
||||
static void IIC_Start(void);
|
||||
static void IIC_Stop(void);
|
||||
static uint8_t IIC_Wait_Ack(void);
|
||||
static void IIC_Ack(void);
|
||||
static void IIC_NAck(void);
|
||||
static void IIC_Send_Byte(uint8_t txd);
|
||||
static uint8_t IIC_Read_Byte(uint8_t ack);
|
||||
static bool GT911_Scan(POINT* point);
|
||||
|
||||
static int touch_open(FAR struct file *filep);
|
||||
static int touch_close(FAR struct file *filep);
|
||||
static ssize_t touch_read(FAR struct file *filep, FAR char *buffer, size_t buflen);
|
||||
static ssize_t touch_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
/* touch POSIX interface */
|
||||
static const struct file_operations g_touchfops =
|
||||
{
|
||||
touch_open,
|
||||
touch_close,
|
||||
touch_read,
|
||||
touch_write,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Name: IIC_Init
|
||||
* Description: i2c pin mode configure
|
||||
|
@ -31,7 +69,7 @@
|
|||
* output: None
|
||||
* return:none
|
||||
****************************************************************************/
|
||||
void IIC_Init(void)
|
||||
static void IIC_Init(void)
|
||||
{
|
||||
/* config simluate IIC bus */
|
||||
k210_fpioa_config(BSP_IIC_SDA, GT911_FUNC_GPIO(FPIOA_IIC_SDA));
|
||||
|
@ -48,7 +86,7 @@ void IIC_Init(void)
|
|||
* output: None
|
||||
* return:none
|
||||
****************************************************************************/
|
||||
void SDA_IN(void)
|
||||
static void SDA_IN(void)
|
||||
{
|
||||
k210_gpiohs_set_direction(FPIOA_IIC_SDA, GPIO_DM_INPUT_PULL_UP);
|
||||
}
|
||||
|
@ -60,7 +98,7 @@ void SDA_IN(void)
|
|||
* output: None
|
||||
* return:none
|
||||
****************************************************************************/
|
||||
void SDA_OUT(void)
|
||||
static void SDA_OUT(void)
|
||||
{
|
||||
k210_gpiohs_set_direction(FPIOA_IIC_SDA, GPIO_DM_OUTPUT);
|
||||
}
|
||||
|
@ -72,7 +110,7 @@ void SDA_OUT(void)
|
|||
* output: None
|
||||
* return: sda pin value
|
||||
****************************************************************************/
|
||||
uint8_t READ_SDA(void)
|
||||
static uint8_t READ_SDA(void)
|
||||
{
|
||||
return k210_gpiohs_get_value(FPIOA_IIC_SDA);
|
||||
}
|
||||
|
@ -84,7 +122,7 @@ uint8_t READ_SDA(void)
|
|||
* output: None
|
||||
* return: None
|
||||
****************************************************************************/
|
||||
void IIC_SCL(uint8_t val)
|
||||
static void IIC_SCL(uint8_t val)
|
||||
{
|
||||
if (val)
|
||||
k210_gpiohs_set_value(FPIOA_IIC_SCL,GPIO_PV_HIGH);
|
||||
|
@ -101,7 +139,7 @@ void IIC_SCL(uint8_t val)
|
|||
* output: None
|
||||
* return: None
|
||||
****************************************************************************/
|
||||
void IIC_SDA(uint8_t val)
|
||||
static void IIC_SDA(uint8_t val)
|
||||
{
|
||||
if (val)
|
||||
k210_gpiohs_set_value(FPIOA_IIC_SDA,GPIO_PV_HIGH);
|
||||
|
@ -118,7 +156,7 @@ void IIC_SDA(uint8_t val)
|
|||
* output: None
|
||||
* return: None
|
||||
****************************************************************************/
|
||||
void IIC_Start(void)
|
||||
static void IIC_Start(void)
|
||||
{
|
||||
SDA_OUT();
|
||||
IIC_SDA(1);
|
||||
|
@ -136,7 +174,7 @@ void IIC_Start(void)
|
|||
* output: None
|
||||
* return: None
|
||||
****************************************************************************/
|
||||
void IIC_Stop(void)
|
||||
static void IIC_Stop(void)
|
||||
{
|
||||
SDA_OUT();
|
||||
IIC_SCL(1);
|
||||
|
@ -153,7 +191,7 @@ void IIC_Stop(void)
|
|||
* output: None
|
||||
* return: Return value: 1:failed to receive response,0:the received response is successful.
|
||||
********************************************************************************************/
|
||||
uint8_t IIC_Wait_Ack(void)
|
||||
static uint8_t IIC_Wait_Ack(void)
|
||||
{
|
||||
uint16_t ucErrTime=0;
|
||||
SDA_IN();
|
||||
|
@ -181,7 +219,7 @@ uint8_t IIC_Wait_Ack(void)
|
|||
* output: None
|
||||
* return: None
|
||||
****************************************************************************/
|
||||
void IIC_Ack(void)
|
||||
static void IIC_Ack(void)
|
||||
{
|
||||
IIC_SCL(0);
|
||||
SDA_OUT();
|
||||
|
@ -200,7 +238,7 @@ void IIC_Ack(void)
|
|||
* output: None
|
||||
* return: None
|
||||
****************************************************************************/
|
||||
void IIC_NAck(void)
|
||||
static void IIC_NAck(void)
|
||||
{
|
||||
IIC_SCL(0);
|
||||
SDA_OUT();
|
||||
|
@ -219,7 +257,7 @@ void IIC_NAck(void)
|
|||
* output: None
|
||||
* return: 1:there is a response,0:no response
|
||||
****************************************************************************/
|
||||
void IIC_Send_Byte(uint8_t txd)
|
||||
static void IIC_Send_Byte(uint8_t txd)
|
||||
{
|
||||
uint8_t t;
|
||||
SDA_OUT();
|
||||
|
@ -243,7 +281,7 @@ void IIC_Send_Byte(uint8_t txd)
|
|||
* output: None
|
||||
* return: Returns one byte of data read
|
||||
****************************************************************************/
|
||||
uint8_t IIC_Read_Byte(uint8_t ack)
|
||||
static uint8_t IIC_Read_Byte(uint8_t ack)
|
||||
{
|
||||
uint8_t i,receive=0;
|
||||
SDA_IN();
|
||||
|
@ -322,20 +360,6 @@ static void GT911_RD_Reg(uint16_t reg,uint8_t *buf,uint8_t len)
|
|||
IIC_Stop();
|
||||
}
|
||||
|
||||
/***********************************************************************************
|
||||
* Name: GT911_ReadFirmwareVersion
|
||||
* Description: Get firmware version number
|
||||
* input: None
|
||||
* output: None
|
||||
* return: version number
|
||||
***********************************************************************************/
|
||||
static uint16_t GT911_ReadFirmwareVersion(void)
|
||||
{
|
||||
uint8_t buf[2];
|
||||
GT911_RD_Reg(GT911_FIRMWARE_VERSION_REG, buf, 2);
|
||||
return ((uint16_t)buf[1] << 8) + buf[0];
|
||||
}
|
||||
|
||||
/***********************************************************************************
|
||||
* Name: GT911_Scan
|
||||
* Description: point:structure to store coordinates
|
||||
|
@ -343,7 +367,7 @@ static uint16_t GT911_ReadFirmwareVersion(void)
|
|||
* output: None
|
||||
* return: Returns true for touch, false for no touch
|
||||
***********************************************************************************/
|
||||
bool GT911_Scan(POINT* point)
|
||||
static bool GT911_Scan(POINT* point)
|
||||
{
|
||||
GT911_Dev Dev_Now;
|
||||
uint8_t Clearbuf = 0;
|
||||
|
@ -378,32 +402,74 @@ bool GT911_Scan(POINT* point)
|
|||
if(Dev_Now.Y[i] > GT911_MAX_HEIGHT -20) Dev_Now.Y[i]=GT911_MAX_HEIGHT - 20;
|
||||
if(Dev_Now.X[i] < 20) Dev_Now.X[i] = 20;
|
||||
if(Dev_Now.X[i] > GT911_MAX_WIDTH-20) Dev_Now.X[i] = GT911_MAX_WIDTH - 20;
|
||||
point->X = Dev_Now.X[i];
|
||||
point->Y = Dev_Now.Y[i];
|
||||
point->x = Dev_Now.X[i];
|
||||
point->y = Dev_Now.Y[i];
|
||||
}
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: touch_open
|
||||
****************************************************************************/
|
||||
static int touch_open(FAR struct file *filep)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: touch_close
|
||||
****************************************************************************/
|
||||
static int touch_close(FAR struct file *filep)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: lcd_read
|
||||
****************************************************************************/
|
||||
static ssize_t touch_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
|
||||
{
|
||||
int ret = -ERROR;
|
||||
POINT touch_point = {0, 0, 0};
|
||||
|
||||
if (buffer == NULL)
|
||||
{
|
||||
return -ERROR;
|
||||
}
|
||||
|
||||
POINT* data = (POINT*)buffer;
|
||||
while(1)
|
||||
{
|
||||
if(GT911_Scan(&touch_point))
|
||||
{
|
||||
data->x = touch_point.x;
|
||||
data->y = touch_point.y;
|
||||
ret = buflen;
|
||||
break;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: lcd_read
|
||||
****************************************************************************/
|
||||
static ssize_t touch_write(FAR struct file *filep, FAR const char *buffer, size_t buflen)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
||||
/***********************************************************************************
|
||||
* Name: GT911_test
|
||||
* Description: gt911 test code
|
||||
* Name: board_touch_initialize
|
||||
* Description: touch initialize
|
||||
* input: None
|
||||
* output: None
|
||||
* return: Returns true for touch, false for no touch
|
||||
* return: None
|
||||
***********************************************************************************/
|
||||
void GT911_test(void)
|
||||
void board_touch_initialize(void)
|
||||
{
|
||||
uint16_t res;
|
||||
POINT point = {0, 0};
|
||||
IIC_Init();
|
||||
res = GT911_ReadFirmwareVersion();
|
||||
printf("FirmwareVersion:%2x\n",res);
|
||||
while(1)
|
||||
{
|
||||
if(GT911_Scan(&point))
|
||||
{
|
||||
printf("Now touch point:(%d,%d)\n",point.X,point.Y);
|
||||
}
|
||||
}
|
||||
/* register device */
|
||||
register_driver("/dev/touch_dev", &g_touchfops, 0666, NULL);
|
||||
}
|
|
@ -63,26 +63,13 @@ typedef struct
|
|||
uint16_t S[CT_MAX_TOUCH];
|
||||
}GT911_Dev;
|
||||
|
||||
typedef struct
|
||||
typedef struct
|
||||
{
|
||||
uint16_t X;
|
||||
uint16_t Y;
|
||||
uint16_t x;
|
||||
uint16_t y;
|
||||
uint16_t press;
|
||||
}POINT;
|
||||
|
||||
void IIC_Init(void);
|
||||
void SDA_IN(void);
|
||||
void SDA_OUT(void);
|
||||
uint8_t READ_SDA(void);
|
||||
void IIC_SCL(uint8_t val);
|
||||
void IIC_SDA(uint8_t val);
|
||||
void IIC_Start(void);
|
||||
void IIC_Stop(void);
|
||||
uint8_t IIC_Wait_Ack(void);
|
||||
void IIC_Ack(void);
|
||||
void IIC_NAck(void);
|
||||
void IIC_Send_Byte(uint8_t txd);
|
||||
uint8_t IIC_Read_Byte(uint8_t ack);
|
||||
bool GT911_Scan(POINT* point);
|
||||
void GT911_test(void);
|
||||
void board_touch_initialize(void);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -667,6 +667,14 @@ config NSH_DISABLE_K210_FFT
|
|||
bool "Disable the K210 fft device."
|
||||
default n
|
||||
|
||||
config NSH_DISABLE_MUSL_TEST
|
||||
bool "Disable the musl test."
|
||||
default n
|
||||
|
||||
config NSH_NSH_DISABLE_CAN_TEST
|
||||
bool "Disable the can test."
|
||||
default n
|
||||
|
||||
endmenu
|
||||
|
||||
if MMCSD
|
||||
|
|
|
@ -1587,6 +1587,13 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb,
|
|||
int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MUSL_LIBC) && !defined(CONFIG_NSH_DISABLE_MUSL_TEST)
|
||||
int cmd_musl(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BSP_USING_CAN) && !defined(CONFIG_NSH_DISABLE_CAN_TEST)
|
||||
int cmd_cantest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -68,11 +68,11 @@ int cmd_w5500(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
|||
* Name: cmd_Touch
|
||||
****************************************************************************/
|
||||
#if defined(CONFIG_BSP_USING_TOUCH) && !defined(CONFIG_NSH_DISABLE_TOUCH)
|
||||
extern void GT911_test(void);
|
||||
extern void TestTouch(void);
|
||||
int cmd_Touch(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
||||
{
|
||||
nsh_output(vtbl, "Hello, world!\n");
|
||||
GT911_test();
|
||||
TestTouch();
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
@ -500,3 +500,23 @@ int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
|||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MUSL_LIBC) && !defined(CONFIG_NSH_DISABLE_MUSL_TEST)
|
||||
extern void Testmusl(void);
|
||||
int cmd_musl(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
||||
{
|
||||
nsh_output(vtbl, "Hello, test musl!\n");
|
||||
Testmusl();
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BSP_USING_CAN) && !defined(CONFIG_NSH_DISABLE_CAN_TEST)
|
||||
extern void can_test(void);
|
||||
int cmd_cantest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
||||
{
|
||||
nsh_output(vtbl, "Hello, world!\n");
|
||||
can_test();
|
||||
return OK;
|
||||
}
|
||||
#endif
|
|
@ -732,6 +732,14 @@ static const struct cmdmap_s g_cmdmap[] =
|
|||
{ "fft", cmd_fft, 1, 1, "[K210 fft function.]" },
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MUSL_LIBC) && !defined(CONFIG_NSH_DISABLE_MUSL_TEST)
|
||||
{ "testmusl", cmd_musl, 1, 1, "[test musl function.]" },
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BSP_USING_CAN) && !defined(CONFIG_NSH_DISABLE_CAN_TEST)
|
||||
{ "cantest", cmd_cantest, 1, 1, "[test can function.]" },
|
||||
#endif
|
||||
|
||||
{ NULL, NULL, 1, 1, NULL }
|
||||
};
|
||||
|
||||
|
|
|
@ -118,7 +118,7 @@ ifeq ($(CONFIG_LCD_ILI9341),y)
|
|||
endif
|
||||
|
||||
ifeq ($(CONFIG_LCD_LT768),y)
|
||||
CSRCS += lt768.c lt768_lib.c
|
||||
CSRCS += lt768.c lt768_lib.c lt768_learn.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_LCD_LCDDRV_SPIIF),y)
|
||||
|
|
|
@ -6282,7 +6282,7 @@ uint8_t Read_Key_Strobe_Data_2(void)
|
|||
return temp;
|
||||
}
|
||||
|
||||
void Show_String(char *str)
|
||||
void Show_String(uint8_t *str)
|
||||
{
|
||||
Text_Mode(); //text mode
|
||||
LCD_CmdWrite(0x04);
|
||||
|
|
|
@ -0,0 +1,545 @@
|
|||
/*
|
||||
* Copyright (c) 2022 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file lt768_learn.c
|
||||
* @brief lt768_learn.c
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.9.19
|
||||
*/
|
||||
#include <syslog.h>
|
||||
#include "nuttx/arch.h"
|
||||
#include "nuttx/lcd/lt768_learn.h"
|
||||
|
||||
const uint8_t g_Image_pen_il[256] = { /* 0X00,0X02,0X20,0X00,0X20,0X00, */
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0X96,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X91,0X6A,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0XA4,0X15,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XA4,0X00,0X6A,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0XA9,0X01,0X1A,0XAA,0XAA,0XAA,0XAA,0XAA,0XA9,0X00,0X46,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0XAA,0X40,0X51,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X90,0X14,0X6A,0XAA,0XAA,0XAA,0XAA,
|
||||
0XAA,0XA4,0X05,0X1A,0XAA,0XAA,0XAA,0XAA,0XAA,0XA9,0X01,0X46,0XAA,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0X40,0X51,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X90,0X14,0X6A,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XA4,0X05,0X1A,0XAA,0XAA,0XAA,0XAA,0XAA,0XA9,0X01,0X46,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XAA,0X40,0X51,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X90,0X14,0X69,0XAA,0XAA,
|
||||
0XAA,0XAA,0XAA,0XA4,0X01,0X14,0X6A,0XAA,0XAA,0XAA,0XAA,0XA9,0X00,0X44,0X1A,0XAA,
|
||||
0XAA,0XAA,0XAA,0XAA,0X40,0X11,0X06,0XAA,0XAA,0XAA,0XAA,0XAA,0X90,0X04,0X41,0XAA,
|
||||
0XAA,0XAA,0XAA,0XAA,0XA4,0X01,0X10,0X6A,0XAA,0XAA,0XAA,0XAA,0XA9,0X00,0X44,0X1A,
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0X40,0X11,0X1A,0XAA,0XAA,0XAA,0XAA,0XAA,0X90,0X04,0X1A,
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XA4,0X01,0X1A,0XAA,0XAA,0XAA,0XAA,0XAA,0XA9,0X00,0X1A,
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X40,0X6A,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X95,0XAA,
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
};
|
||||
|
||||
const uint8_t g_Image_arrow_il[256] = { /* 0X00,0X02,0X20,0X00,0X20,0X00, */
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X6A,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0X5A,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X46,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0X41,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X40,0X6A,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0X40,0X1A,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X40,0X06,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0X40,0X01,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X40,0X00,0X6A,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0X40,0X00,0X1A,0XAA,0XAA,0XAA,0XAA,0XAA,0X40,0X00,0X06,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0X40,0X00,0X01,0XAA,0XAA,0XAA,0XAA,0XAA,0X40,0X00,0X00,0X6A,0XAA,0XAA,0XAA,0XAA,
|
||||
0X40,0X00,0X00,0X1A,0XAA,0XAA,0XAA,0XAA,0X40,0X00,0X00,0X06,0XAA,0XAA,0XAA,0XAA,
|
||||
0X40,0X00,0X00,0X01,0XAA,0XAA,0XAA,0XAA,0X40,0X00,0X00,0X00,0X6A,0XAA,0XAA,0XAA,
|
||||
0X40,0X00,0X15,0X55,0X5A,0XAA,0XAA,0XAA,0X40,0X10,0X1A,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0X40,0X64,0X06,0XAA,0XAA,0XAA,0XAA,0XAA,0X41,0XA4,0X06,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0X46,0XA9,0X01,0XAA,0XAA,0XAA,0XAA,0XAA,0X5A,0XA9,0X01,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0X6A,0XAA,0X40,0X6A,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X40,0X6A,0XAA,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0X90,0X1A,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X90,0X1A,0XAA,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XA4,0X06,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XA4,0X06,0XAA,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XA9,0X5A,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
};
|
||||
|
||||
const uint8_t g_Image_busy_im[256] = { /* 0X00,0X02,0X20,0X00,0X20,0X00, */
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X55,0X55,0X55,0X55,0X6A,0XAA,
|
||||
0XAA,0XAA,0X54,0X00,0X00,0X05,0X6A,0XAA,0XAA,0XAA,0X55,0X55,0X55,0X55,0X6A,0XAA,
|
||||
0XAA,0XAA,0X94,0X00,0X00,0X05,0XAA,0XAA,0XAA,0XAA,0X94,0X00,0X00,0X05,0XAA,0XAA,
|
||||
0XAA,0XAA,0X94,0X44,0X44,0X45,0XAA,0XAA,0XAA,0XAA,0X94,0X11,0X11,0X05,0XAA,0XAA,
|
||||
0XAA,0XAA,0X95,0X04,0X44,0X15,0XAA,0XAA,0XAA,0XAA,0XA5,0X41,0X10,0X56,0XAA,0XAA,
|
||||
0XAA,0XAA,0XA9,0X50,0X41,0X5A,0XAA,0XAA,0XAA,0XAA,0XAA,0X54,0X05,0X6A,0XAA,0XAA,
|
||||
0XAA,0XAA,0XAA,0X94,0X05,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X94,0X05,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XAA,0X94,0X45,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X94,0X05,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XAA,0X50,0X01,0X6A,0XAA,0XAA,0XAA,0XAA,0XA9,0X40,0X40,0X5A,0XAA,0XAA,
|
||||
0XAA,0XAA,0XA5,0X00,0X10,0X16,0XAA,0XAA,0XAA,0XAA,0X94,0X00,0X00,0X05,0XAA,0XAA,
|
||||
0XAA,0XAA,0X94,0X04,0X44,0X05,0XAA,0XAA,0XAA,0XAA,0X94,0X11,0X11,0X05,0XAA,0XAA,
|
||||
0XAA,0XAA,0X94,0X44,0X44,0X45,0XAA,0XAA,0XAA,0XAA,0X95,0X11,0X11,0X15,0XAA,0XAA,
|
||||
0XAA,0XAA,0X55,0X55,0X55,0X55,0X6A,0XAA,0XAA,0XAA,0X54,0X00,0X00,0X05,0X6A,0XAA,
|
||||
0XAA,0XAA,0X55,0X55,0X55,0X55,0X6A,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
};
|
||||
|
||||
const uint8_t g_Image_no_im[256] = { /* 0X00,0X02,0X20,0X00,0X20,0X00, */
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0X95,0X55,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XA9,0X40,0X00,0X5A,0XAA,0XAA,0XAA,0XAA,0X94,0X00,0X00,0X05,0XAA,0XAA,
|
||||
0XAA,0XAA,0X40,0X00,0X00,0X00,0X6A,0XAA,0XAA,0XA9,0X00,0X15,0X55,0X00,0X1A,0XAA,
|
||||
0XAA,0XA4,0X00,0X6A,0XAA,0X50,0X06,0XAA,0XAA,0XA4,0X00,0X6A,0XAA,0XA4,0X06,0XAA,
|
||||
0XAA,0X90,0X00,0X1A,0XAA,0XA9,0X01,0XAA,0XAA,0X90,0X10,0X06,0XAA,0XA9,0X01,0XAA,
|
||||
0XAA,0X40,0X64,0X01,0XAA,0XAA,0X40,0X6A,0XAA,0X40,0X69,0X00,0X6A,0XAA,0X40,0X6A,
|
||||
0XAA,0X40,0X6A,0X40,0X1A,0XAA,0X40,0X6A,0XAA,0X40,0X6A,0X90,0X06,0XAA,0X40,0X6A,
|
||||
0XAA,0X40,0X6A,0XA4,0X01,0XAA,0X40,0X6A,0XAA,0X40,0X6A,0XA9,0X00,0X6A,0X40,0X6A,
|
||||
0XAA,0X40,0X6A,0XAA,0X40,0X1A,0X40,0X6A,0XAA,0X90,0X1A,0XAA,0X90,0X05,0X01,0XAA,
|
||||
0XAA,0X90,0X1A,0XAA,0XA4,0X00,0X01,0XAA,0XAA,0XA4,0X06,0XAA,0XA9,0X00,0X06,0XAA,
|
||||
0XAA,0XA4,0X01,0X6A,0XAA,0X40,0X06,0XAA,0XAA,0XA9,0X00,0X15,0X55,0X00,0X1A,0XAA,
|
||||
0XAA,0XAA,0X40,0X00,0X00,0X00,0X6A,0XAA,0XAA,0XAA,0X94,0X00,0X00,0X05,0XAA,0XAA,
|
||||
0XAA,0XAA,0XA9,0X40,0X00,0X5A,0XAA,0XAA,0XAA,0XAA,0XAA,0X95,0X55,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,0XAA,
|
||||
};
|
||||
|
||||
|
||||
void Display_RGB(void)
|
||||
{
|
||||
Select_Main_Window_16bpp();
|
||||
Main_Image_Start_Address(0);
|
||||
Main_Image_Width(LCD_XSIZE_TFT);
|
||||
Main_Window_Start_XY(0,0);
|
||||
Canvas_Image_Start_address(0);
|
||||
Canvas_image_width(LCD_XSIZE_TFT);
|
||||
Active_Window_XY(0,0);
|
||||
Active_Window_WH(LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
|
||||
while(1)
|
||||
{
|
||||
BTE_Solid_Fill(0,LCD_XSIZE_TFT,0,0,RED,LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
up_mdelay(500);
|
||||
BTE_Solid_Fill(0,LCD_XSIZE_TFT,0,0,GREEN,LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
up_mdelay(500);
|
||||
BTE_Solid_Fill(0,LCD_XSIZE_TFT,0,0,BLUE,LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
up_mdelay(500);
|
||||
}
|
||||
}
|
||||
|
||||
#define Picture_1_Addr 0
|
||||
#define Picture_2_Addr (LCD_XSIZE_TFT*LCD_YSIZE_TFT*2)
|
||||
#define Picture_3_Addr (LCD_XSIZE_TFT*LCD_YSIZE_TFT*4)
|
||||
#define Picture_4_Addr (LCD_XSIZE_TFT*LCD_YSIZE_TFT*6)
|
||||
|
||||
void Display_Picture(void)
|
||||
{
|
||||
uint8_t i = 0;
|
||||
|
||||
Select_Main_Window_16bpp();
|
||||
Main_Image_Start_Address(0);
|
||||
Main_Image_Width(LCD_XSIZE_TFT);
|
||||
Main_Window_Start_XY(0,0);
|
||||
Canvas_Image_Start_address(0);
|
||||
Canvas_image_width(LCD_XSIZE_TFT);
|
||||
Active_Window_XY(0,0);
|
||||
Active_Window_WH(LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
|
||||
while(1)
|
||||
{
|
||||
for(i = 0;i < 4;i++)
|
||||
{
|
||||
switch(i)
|
||||
{
|
||||
case 0:LT768_DMA_24bit_Block(1,0,0,0,LCD_XSIZE_TFT,LCD_YSIZE_TFT,LCD_XSIZE_TFT,Picture_1_Addr);break;
|
||||
case 1:LT768_DMA_24bit_Block(1,0,0,0,LCD_XSIZE_TFT,LCD_YSIZE_TFT,LCD_XSIZE_TFT,Picture_2_Addr);break;
|
||||
case 2:LT768_DMA_24bit_Block(1,0,0,0,LCD_XSIZE_TFT,LCD_YSIZE_TFT,LCD_XSIZE_TFT,Picture_3_Addr);break;
|
||||
case 3:LT768_DMA_24bit_Block(1,0,0,0,LCD_XSIZE_TFT,LCD_YSIZE_TFT,LCD_XSIZE_TFT,Picture_4_Addr);break;
|
||||
default: break;
|
||||
}
|
||||
up_mdelay(500);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void Display_PIP(void)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
Select_Main_Window_16bpp();
|
||||
Main_Image_Start_Address(0);
|
||||
Main_Image_Width(LCD_XSIZE_TFT);
|
||||
Main_Window_Start_XY(0,0);
|
||||
Canvas_Image_Start_address(0);
|
||||
Canvas_image_width(LCD_XSIZE_TFT);
|
||||
Active_Window_XY(0,0);
|
||||
Active_Window_WH(LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
|
||||
BTE_Solid_Fill(0,LCD_XSIZE_TFT,0,0,BLUE2,LCD_XSIZE_TFT,LCD_YSIZE_TFT); // 底图颜色
|
||||
BTE_Solid_Fill(LCD_XSIZE_TFT*LCD_YSIZE_TFT*2,LCD_XSIZE_TFT,0,0,RED,LCD_XSIZE_TFT,LCD_YSIZE_TFT); // PIP1颜色
|
||||
BTE_Solid_Fill(LCD_XSIZE_TFT*LCD_YSIZE_TFT*4,LCD_XSIZE_TFT,0,0,GREEN,LCD_XSIZE_TFT,LCD_YSIZE_TFT); // PIP2颜色
|
||||
|
||||
LT768_PIP_Init(1,1,LCD_XSIZE_TFT*LCD_YSIZE_TFT*2,250,250,1024,0,175,250,250); // 初始化PIP1
|
||||
LT768_PIP_Init(1,2,LCD_XSIZE_TFT*LCD_YSIZE_TFT*4,300,300,1024,774,150,300,300); // 初始化PIP2
|
||||
|
||||
while(1)
|
||||
{
|
||||
for(i=0;i<550;i=i+2)
|
||||
{
|
||||
LT768_Set_DisWindowPos(1,1,i,175);
|
||||
LT768_Set_DisWindowPos(1,2,734-i,150);
|
||||
up_mdelay(5);
|
||||
}
|
||||
|
||||
for(i=0;i<550;i=i+2)
|
||||
{
|
||||
LT768_Set_DisWindowPos(1,1,550-i,175);
|
||||
LT768_Set_DisWindowPos(1,2,734-550+i,150);
|
||||
up_mdelay(5);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void Display_Internal_Font(void)
|
||||
{
|
||||
char c[2] = "0";
|
||||
unsigned int i = 0;
|
||||
unsigned int x = 0;
|
||||
unsigned int y = 0;
|
||||
unsigned int z = 0;
|
||||
|
||||
Select_Main_Window_16bpp();
|
||||
Main_Image_Start_Address(0);
|
||||
Main_Image_Width(LCD_XSIZE_TFT);
|
||||
Main_Window_Start_XY(0,0);
|
||||
Canvas_Image_Start_address(0);
|
||||
Canvas_image_width(LCD_XSIZE_TFT);
|
||||
Active_Window_XY(0,0);
|
||||
Active_Window_WH(LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
|
||||
while(1)
|
||||
{
|
||||
LT768_DrawSquare_Fill(0,0,LCD_XSIZE_TFT,LCD_YSIZE_TFT,BLUE2);
|
||||
|
||||
LT768_Select_Internal_Font_Init(16,1,1,0,0);
|
||||
LT768_Print_Internal_Font_String(0,10,BLACK,BLUE2,"Embedded 8x16 ASCII Character");
|
||||
|
||||
LT768_Select_Internal_Font_Init(24,1,1,0,0);
|
||||
LT768_Print_Internal_Font_String(0,30,BLUE,BLUE2,"Embedded 12x24 ASCII Character");
|
||||
|
||||
LT768_Select_Internal_Font_Init(32,1,1,0,0);
|
||||
LT768_Print_Internal_Font_String(0,55,GREEN,BLUE2,"Embedded 16x32 ASCII Character");
|
||||
|
||||
LT768_Print_Internal_Font_String(0,95,RED,BLUE2,"The Text Cursor");
|
||||
|
||||
for(i = 0 ; i < 14 ; i++)
|
||||
{
|
||||
up_mdelay(100);
|
||||
LT768_Text_cursor_Init(1,15,1+i,15-i);
|
||||
}
|
||||
up_mdelay(100);
|
||||
LT768_Text_cursor_Init(1,15,10,2);
|
||||
|
||||
|
||||
c[0] = '0';
|
||||
for(i = 0 ; i < 10 ; i++)
|
||||
{
|
||||
up_mdelay(50);
|
||||
LT768_Print_Internal_Font_String(10+16*i,135,RED,BLUE2,&c[0]);
|
||||
c[0]++;
|
||||
}
|
||||
|
||||
c[0] = 0;
|
||||
x = 0;
|
||||
y = 175;
|
||||
z = 0;
|
||||
for(i = 0 ; i < 127 ; i++)
|
||||
{
|
||||
up_mdelay(50);
|
||||
x = z * 16;
|
||||
z++;
|
||||
if(x>1024)
|
||||
{
|
||||
y = y + 40;
|
||||
x = 0;
|
||||
z = 0;
|
||||
}
|
||||
|
||||
LT768_Print_Internal_Font_String(x,y,RED,BLUE2,&c[0]);
|
||||
c[0]++;
|
||||
}
|
||||
|
||||
up_mdelay(1000);
|
||||
up_mdelay(1000);
|
||||
|
||||
|
||||
LT768_DMA_24bit_Block(1,0,200,300,600,280,1024,Picture_3_Addr);
|
||||
|
||||
LT768_Graphic_cursor_Init(1,0xff,0x00,0,0,(uint8_t*)g_Image_pen_il);
|
||||
LT768_Graphic_cursor_Init(2,0xff,0x00,0,0,(uint8_t*)g_Image_arrow_il);
|
||||
LT768_Graphic_cursor_Init(3,0xff,0x00,0,0,(uint8_t*)g_Image_busy_im);
|
||||
LT768_Graphic_cursor_Init(4,0xff,0x00,0,0,(uint8_t*)g_Image_no_im);
|
||||
|
||||
|
||||
LT768_Set_Graphic_cursor_Pos(1,100,300);
|
||||
up_mdelay(500);
|
||||
LT768_Set_Graphic_cursor_Pos(2,100,300);
|
||||
up_mdelay(500);
|
||||
LT768_Set_Graphic_cursor_Pos(3,100,300);
|
||||
up_mdelay(500);
|
||||
LT768_Set_Graphic_cursor_Pos(4,100,300);
|
||||
up_mdelay(500);
|
||||
LT768_Set_Graphic_cursor_Pos(1,100,300);
|
||||
|
||||
for(i = 100 ; i < 924 ; i++)
|
||||
{
|
||||
LT768_Set_Graphic_cursor_Pos(1,i,90);
|
||||
up_mdelay(2);
|
||||
}
|
||||
|
||||
for(i = 200 ; i < 800 ; i++)
|
||||
{
|
||||
LT768_Set_Graphic_cursor_Pos(2,i,i-200);
|
||||
up_mdelay(2);
|
||||
}
|
||||
|
||||
for(i = 800 ; i > 100 ; i--)
|
||||
{
|
||||
LT768_Set_Graphic_cursor_Pos(3,i,800-i);
|
||||
up_mdelay(2);
|
||||
}
|
||||
|
||||
for(i = 924 ; i > 100 ; i--)
|
||||
{
|
||||
LT768_Set_Graphic_cursor_Pos(4,i,400);
|
||||
up_mdelay(2);
|
||||
}
|
||||
|
||||
up_mdelay(1000);
|
||||
up_mdelay(1000);
|
||||
|
||||
LT768_Disable_Text_Cursor();
|
||||
LT768_Disable_Graphic_Cursor();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
#define MEMORY_ADDR_16 0x003E0D760
|
||||
#define MEMORY_ADDR_24 0x003E537E0
|
||||
#define MEMORY_ADDR_32 0x003EEBD00
|
||||
|
||||
#define FLASH_ADDR_16 0x00829150
|
||||
#define FLASH_ADDR_24 0x0078DC20
|
||||
#define FLASH_ADDR_32 0x00679A10
|
||||
|
||||
#define SIZE_16_NUM 0x00045080
|
||||
#define SIZE_24_NUM 0x0009B520
|
||||
#define SIZE_32_NUM 0x00114200
|
||||
|
||||
void Display_Outside_Font(void)
|
||||
{
|
||||
Select_Main_Window_16bpp();
|
||||
Main_Image_Start_Address(0);
|
||||
Main_Image_Width(LCD_XSIZE_TFT);
|
||||
Main_Window_Start_XY(0,0);
|
||||
Canvas_Image_Start_address(0);
|
||||
Canvas_image_width(LCD_XSIZE_TFT);
|
||||
Active_Window_XY(0,0);
|
||||
Active_Window_WH(LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
|
||||
while(1)
|
||||
{
|
||||
LT768_DrawSquare_Fill(0,0,LCD_XSIZE_TFT,LCD_YSIZE_TFT,WHITE);
|
||||
LT768_Select_Outside_Font_Init(1,0,FLASH_ADDR_16,MEMORY_ADDR_16,SIZE_16_NUM,16,1,1,0,0);
|
||||
LT768_Print_Outside_Font_String(425,50,RED,WHITE,(uint8_t*)"16X16微软雅黑字体");
|
||||
up_mdelay(500);
|
||||
Font_Width_X2();
|
||||
Font_Height_X2();
|
||||
LT768_Print_Outside_Font_String(250,75,GREY-1200,WHITE,(uint8_t*)"16X16微软雅黑字体长宽各扩1倍");
|
||||
up_mdelay(500);
|
||||
Font_Width_X3();
|
||||
Font_Height_X3();
|
||||
LT768_Print_Outside_Font_String(150,120,BLUE,WHITE,(uint8_t*)"16X16微软雅黑字体长宽各扩2倍");
|
||||
up_mdelay(500);
|
||||
Font_Width_X4();
|
||||
Font_Height_X4();
|
||||
LT768_Print_Outside_Font_String(60,178,MAGENTA,WHITE,(uint8_t*)"16X16微软雅黑字体长宽各扩3倍");
|
||||
up_mdelay(500);
|
||||
|
||||
LT768_Select_Outside_Font_Init(1,0,FLASH_ADDR_24,MEMORY_ADDR_24,SIZE_24_NUM,24,1,1,0,0);
|
||||
LT768_Print_Outside_Font_String(445,280,RED,WHITE,(uint8_t*)"24X24楷体");
|
||||
up_mdelay(500);
|
||||
Font_Width_X2();
|
||||
Font_Height_X2();
|
||||
LT768_Print_Outside_Font_String(260,315,GREEN,WHITE,(uint8_t*)"24X24楷体长宽各扩1倍");
|
||||
up_mdelay(500);
|
||||
Font_Width_X3();
|
||||
Font_Height_X3();
|
||||
LT768_Print_Outside_Font_String(150,375,CYAN,WHITE,(uint8_t*)"24X24楷体长宽各扩2倍");
|
||||
up_mdelay(500);
|
||||
Font_Width_X4();
|
||||
Font_Height_X4();
|
||||
LT768_Print_Outside_Font_String(30,455,YELLOW,WHITE,(uint8_t*)"24X24楷体长宽各扩3倍");
|
||||
up_mdelay(500);
|
||||
|
||||
LT768_Select_Outside_Font_Init(1,0,FLASH_ADDR_32,MEMORY_ADDR_32,SIZE_32_NUM,32,1,1,0,0);
|
||||
LT768_DrawSquare_Fill(0,0,LCD_XSIZE_TFT,LCD_YSIZE_TFT,WHITE);
|
||||
LT768_Print_Outside_Font_String(430,105,RED,WHITE,(uint8_t*)"32X32隶书");
|
||||
up_mdelay(500);
|
||||
Font_Width_X2();
|
||||
Font_Height_X2();
|
||||
LT768_Print_Outside_Font_String(360,165,GREEN,WHITE,(uint8_t*)"32X32隶书");
|
||||
up_mdelay(500);
|
||||
Font_Width_X3();
|
||||
Font_Height_X3();
|
||||
LT768_Print_Outside_Font_String(285,250,BLUE,WHITE,(uint8_t*)"32X32隶书");
|
||||
up_mdelay(500);
|
||||
Font_Width_X4();
|
||||
Font_Height_X4();
|
||||
LT768_Print_Outside_Font_String(220,360,YELLOW,WHITE,(uint8_t*)"32X32隶书");
|
||||
up_mdelay(500);
|
||||
}
|
||||
}
|
||||
|
||||
void Display_Triangle(void)
|
||||
{
|
||||
unsigned long i,j,h;
|
||||
unsigned long resx1,resy1,resx2,resy2,resx3,resy3;
|
||||
|
||||
Select_Main_Window_16bpp();
|
||||
Main_Image_Start_Address(0);
|
||||
Main_Image_Width(LCD_XSIZE_TFT);
|
||||
Canvas_Image_Start_address(0);
|
||||
Canvas_image_width(LCD_XSIZE_TFT);
|
||||
Active_Window_XY(0,0);
|
||||
Active_Window_WH(LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
|
||||
Main_Window_Start_XY(0,0);
|
||||
|
||||
while(1)
|
||||
{
|
||||
LT768_DrawSquare_Fill(0,0,LCD_XSIZE_TFT,LCD_YSIZE_TFT,WHITE);
|
||||
h=0;
|
||||
do
|
||||
{
|
||||
resx1=rand()%LCD_XSIZE_TFT; // 点1的x轴
|
||||
resy1=rand()%(LCD_YSIZE_TFT); // 点1的y轴
|
||||
resx2=rand()%LCD_XSIZE_TFT; // 点2的x轴
|
||||
resy2=rand()%(LCD_YSIZE_TFT); // 点2的y轴
|
||||
resx3=rand()%LCD_XSIZE_TFT; // 点3的x轴
|
||||
resy3=rand()%(LCD_YSIZE_TFT); // 点3的y轴
|
||||
i=rand()%65536; // 颜色
|
||||
j=rand()%3;
|
||||
if(j) LT768_DrawTriangle(resx1,resy1,resx2,resy2,resx3,resy3,i); // 无填充色三角形
|
||||
else LT768_DrawTriangle_Fill(resx1,resy1,resx2,resy2,resx3,resy3,i); // 填充色三角形
|
||||
h++;
|
||||
up_mdelay(120);
|
||||
}
|
||||
while(h<20);
|
||||
|
||||
h=0;
|
||||
do
|
||||
{
|
||||
resx1=rand()%LCD_XSIZE_TFT; // 点1的x轴
|
||||
resy1=rand()%(LCD_YSIZE_TFT); // 点1的y轴
|
||||
resx2=rand()%LCD_XSIZE_TFT; // 点2的x轴
|
||||
resy2=rand()%(LCD_YSIZE_TFT); // 点2的y轴
|
||||
resx3=rand()%LCD_XSIZE_TFT; // 点3的x轴
|
||||
resy3=rand()%(LCD_YSIZE_TFT); // 点3的y轴
|
||||
i=rand()%65536; // 颜色
|
||||
j=rand()%3;
|
||||
if(j) LT768_DrawTriangle(resx1,resy1,resx2,resy2,resx3,resy3,i); // 无填充色三角形
|
||||
else LT768_DrawTriangle_Fill(resx1,resy1,resx2,resy2,resx3,resy3,i); // 填充色三角形
|
||||
h++;
|
||||
up_mdelay(1);
|
||||
}
|
||||
while(h<2500);
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
void Tsst(void)
|
||||
{
|
||||
unsigned long i,j,h;
|
||||
unsigned long resx1,resy1,resx2,resy2,resx3,resy3;
|
||||
|
||||
Select_Main_Window_16bpp();
|
||||
Main_Image_Start_Address(0);
|
||||
Main_Image_Width(LCD_XSIZE_TFT);
|
||||
Main_Window_Start_XY(0,0);
|
||||
Canvas_Image_Start_address(0);
|
||||
Canvas_image_width(LCD_XSIZE_TFT);
|
||||
Active_Window_XY(0,0);
|
||||
Active_Window_WH(LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
|
||||
while(1)
|
||||
{
|
||||
|
||||
BTE_Solid_Fill(0,LCD_XSIZE_TFT,0,0,RED,LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
up_mdelay(600);
|
||||
BTE_Solid_Fill(0,LCD_XSIZE_TFT,0,0,GREEN,LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
up_mdelay(600);
|
||||
BTE_Solid_Fill(0,LCD_XSIZE_TFT,0,0,BLUE,LCD_XSIZE_TFT,LCD_YSIZE_TFT);
|
||||
up_mdelay(600);
|
||||
|
||||
BTE_Solid_Fill(LCD_XSIZE_TFT*LCD_YSIZE_TFT*2,LCD_XSIZE_TFT,0,0,RED,LCD_XSIZE_TFT,LCD_YSIZE_TFT); // PIP1颜色
|
||||
BTE_Solid_Fill(LCD_XSIZE_TFT*LCD_YSIZE_TFT*4,LCD_XSIZE_TFT,0,0,GREEN,LCD_XSIZE_TFT,LCD_YSIZE_TFT); // PIP2颜色
|
||||
LT768_PIP_Init(1,1,LCD_XSIZE_TFT*LCD_YSIZE_TFT*2,0,0,LCD_XSIZE_TFT,0,100,50,50); // 初始化PIP1
|
||||
LT768_PIP_Init(1,2,LCD_XSIZE_TFT*LCD_YSIZE_TFT*4,0,0,LCD_XSIZE_TFT,430,85,80,80); // 初始化PIP2
|
||||
|
||||
for(i=0;i<300;i=i+4)
|
||||
{
|
||||
LT768_Set_DisWindowPos(1,1,i,100);
|
||||
LT768_Set_DisWindowPos(1,2,430-i,85);
|
||||
up_mdelay(15);
|
||||
}
|
||||
|
||||
for(i=0;i<300;i=i+2)
|
||||
{
|
||||
LT768_Set_DisWindowPos(1,1,300-i,100);
|
||||
LT768_Set_DisWindowPos(1,2,430-300+i,85);
|
||||
up_mdelay(10);
|
||||
}
|
||||
Disable_PIP1();
|
||||
Disable_PIP2();
|
||||
|
||||
|
||||
LT768_DrawSquare_Fill(0,0,LCD_XSIZE_TFT,LCD_YSIZE_TFT,WHITE);
|
||||
h=0;
|
||||
do
|
||||
{
|
||||
resx1=rand()%LCD_XSIZE_TFT; // 点1的x轴
|
||||
resy1=rand()%(LCD_YSIZE_TFT); // 点1的y轴
|
||||
resx2=rand()%LCD_XSIZE_TFT; // 点2的x轴
|
||||
resy2=rand()%(LCD_YSIZE_TFT); // 点2的y轴
|
||||
resx3=rand()%LCD_XSIZE_TFT; // 点3的x轴
|
||||
resy3=rand()%(LCD_YSIZE_TFT); // 点3的y轴
|
||||
i=rand()%65536; // 颜色
|
||||
j=rand()%3;
|
||||
if(j) LT768_DrawTriangle(resx1,resy1,resx2,resy2,resx3,resy3,i); // 无填充色三角形
|
||||
else LT768_DrawTriangle_Fill(resx1,resy1,resx2,resy2,resx3,resy3,i); // 填充色三角形
|
||||
h++;
|
||||
up_mdelay(120);
|
||||
}
|
||||
while(h<20);
|
||||
|
||||
h=0;
|
||||
do
|
||||
{
|
||||
resx1=rand()%LCD_XSIZE_TFT; // 点1的x轴
|
||||
resy1=rand()%(LCD_YSIZE_TFT); // 点1的y轴
|
||||
resx2=rand()%LCD_XSIZE_TFT; // 点2的x轴
|
||||
resy2=rand()%(LCD_YSIZE_TFT); // 点2的y轴
|
||||
resx3=rand()%LCD_XSIZE_TFT; // 点3的x轴
|
||||
resy3=rand()%(LCD_YSIZE_TFT); // 点3的y轴
|
||||
i=rand()%65536; // 颜色
|
||||
j=rand()%3;
|
||||
if(j) LT768_DrawTriangle(resx1,resy1,resx2,resy2,resx3,resy3,i); // 无填充色三角形
|
||||
else LT768_DrawTriangle_Fill(resx1,resy1,resx2,resy2,resx3,resy3,i); // 填充色三角形
|
||||
h++;
|
||||
up_mdelay(1);
|
||||
}
|
||||
while(h<2500);
|
||||
|
||||
up_mdelay(100);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
@ -303,7 +303,7 @@ void MPU8_24bpp_Memory_Write
|
|||
|
||||
|
||||
|
||||
void MPuint16_t_16bpp_Memory_Write
|
||||
void MPU16_16bpp_Memory_Write
|
||||
(
|
||||
uint16_t x
|
||||
, uint16_t y
|
||||
|
@ -332,7 +332,7 @@ void MPuint16_t_16bpp_Memory_Write
|
|||
Check_Mem_WR_FIFO_Empty();
|
||||
}
|
||||
|
||||
void MPuint16_t_24bpp_Mode1_Memory_Write
|
||||
void MPU16_24bpp_Mode1_Memory_Write
|
||||
(
|
||||
uint16_t x
|
||||
, uint16_t y
|
||||
|
@ -368,7 +368,7 @@ void MPuint16_t_24bpp_Mode1_Memory_Write
|
|||
}
|
||||
|
||||
|
||||
void MPuint16_t_24bpp_Mode2_Memory_Write
|
||||
void MPU16_24bpp_Mode2_Memory_Write
|
||||
(
|
||||
uint16_t x
|
||||
, uint16_t y
|
||||
|
@ -1388,7 +1388,7 @@ void LT768_Print_Internal_Font_String
|
|||
, uint16_t y // font start y
|
||||
, uint32_t FontColor // font color
|
||||
, uint32_t BackGroundColor // font background color(when font background is transparent, it is invalid)
|
||||
, char *c // data start address
|
||||
, uint8_t *c // data start address
|
||||
)
|
||||
{
|
||||
Text_Mode();
|
||||
|
|
|
@ -21,6 +21,46 @@
|
|||
#ifndef __LT768_H_
|
||||
#define __LT768_H_
|
||||
|
||||
typedef enum _LcdOperation
|
||||
{
|
||||
SHOW_STRING = 0,
|
||||
SHOW_WDOT,
|
||||
SHOW_RGB,
|
||||
SHOW_PIP,
|
||||
SHOW_INTERNAL_FONT,
|
||||
SHOW_OUTSIDE_FONT,
|
||||
SHOW_TRIANGLE,
|
||||
SHOW_PICTURE,
|
||||
} LcdOperation;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t x_pos;
|
||||
uint16_t y_pos;
|
||||
uint16_t width;
|
||||
uint16_t height;
|
||||
uint8_t font_size;
|
||||
uint8_t *addr;
|
||||
uint16_t font_color;
|
||||
uint16_t back_color;
|
||||
}LcdStringParam;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t x_startpos;
|
||||
uint16_t x_endpos;
|
||||
uint16_t y_startpos;
|
||||
uint16_t y_endpos;
|
||||
void* pixel_color;
|
||||
}LcdPixelParam;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
LcdOperation type;
|
||||
LcdPixelParam pixel_info;
|
||||
LcdStringParam string_info;
|
||||
}LcdWriteParam;
|
||||
|
||||
#define cSetb0 0x01
|
||||
#define cSetb1 0x02
|
||||
#define cSetb2 0x04
|
||||
|
@ -691,7 +731,7 @@ uint8_t Read_Key_Strobe_Data_0(void);
|
|||
uint8_t Read_Key_Strobe_Data_1(void);
|
||||
uint8_t Read_Key_Strobe_Data_2(void);
|
||||
|
||||
void Show_String(char *str);
|
||||
void Show_String(uint8_t *str);
|
||||
void Show_picture(uint32_t numbers, const uint16_t *data);
|
||||
|
||||
void PWM0_ON(void); //PWM0
|
||||
|
|
|
@ -0,0 +1,34 @@
|
|||
/*
|
||||
* Copyright (c) 2022 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file lt768.h
|
||||
* @brief lt768 register relative driver, inherit from Levetop Electronics
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.9.19
|
||||
*/
|
||||
|
||||
#ifndef _LT768_LEARN_H
|
||||
#define _LT768_LEARN_H
|
||||
#include "nuttx/lcd/if_port.h"
|
||||
#include <stdlib.h>
|
||||
|
||||
void Display_RGB(void);
|
||||
void Display_Picture(void);
|
||||
void Display_PIP(void);
|
||||
void Display_Internal_Font(void);
|
||||
void Display_Outside_Font(void);
|
||||
void Display_Triangle(void);
|
||||
void Tsst(void);
|
||||
|
||||
#endif
|
|
@ -99,16 +99,31 @@
|
|||
#define color16M_purple color16M_red|color16M_blue
|
||||
|
||||
/* LCD color */
|
||||
#define White 0xFFFF
|
||||
#define Black 0x0000
|
||||
#define Grey 0xF7DE
|
||||
#define Blue 0x001F
|
||||
#define Blue2 0x051F
|
||||
#define Red 0xF800
|
||||
#define Magenta 0xF81F
|
||||
#define Green 0x07E0
|
||||
#define Cyan 0x7FFF
|
||||
#define Yellow 0xFFE0
|
||||
#define WHITE 0xFFFF
|
||||
#define BLACK 0x0000
|
||||
#define BLUE 0x001F
|
||||
#define GREY 0xF7DE
|
||||
#define BRED 0xF81F
|
||||
#define GRED 0xFFE0
|
||||
#define GBLUE 0x07FF
|
||||
#define BLUE2 0x051F
|
||||
#define RED 0xF800
|
||||
#define MAGENTA 0xF81F
|
||||
#define GREEN 0x07E0
|
||||
#define CYAN 0x7FFF
|
||||
#define YELLOW 0xFFE0
|
||||
#define BROWN 0xBC40
|
||||
#define BRRED 0xFC07
|
||||
#define GRAY 0x8430
|
||||
|
||||
#define DARKBLUE 0x01CF
|
||||
#define LIGHTBLUE 0x7D7C
|
||||
#define GRAYBLUE 0x5458
|
||||
#define LIGHTGREEN 0x841F
|
||||
#define LGRAY 0xC618
|
||||
#define LGRAYBLUE 0xA651
|
||||
#define LBBLUE 0x2B12
|
||||
|
||||
|
||||
#define Line0 0
|
||||
#define Line1 24
|
||||
|
@ -140,32 +155,32 @@
|
|||
void lt768_init(void);
|
||||
|
||||
/* write to memory */
|
||||
void MPuint8_t_8bpp_Memory_Write(uint16_t x,
|
||||
void MPU8_8bpp_Memory_Write(uint16_t x,
|
||||
uint16_t y,
|
||||
uint16_t w,
|
||||
uint16_t h,
|
||||
const uint8_t *data);
|
||||
void MPuint8_t_16bpp_Memory_Write(uint16_t x,
|
||||
void MPU8_16bpp_Memory_Write(uint16_t x,
|
||||
uint16_t y,
|
||||
uint16_t w,
|
||||
uint16_t h,
|
||||
const uint8_t *data);
|
||||
void MPuint8_t_24bpp_Memory_Write(uint16_t x,
|
||||
void MPU8_24bpp_Memory_Write(uint16_t x,
|
||||
uint16_t y,
|
||||
uint16_t w,
|
||||
uint16_t h,
|
||||
const uint8_t *data);
|
||||
void MPuint16_t_16bpp_Memory_Write(uint16_t x,
|
||||
void MPU16_16bpp_Memory_Write(uint16_t x,
|
||||
uint16_t y,
|
||||
uint16_t w,
|
||||
uint16_t h,
|
||||
const uint16_t *data);
|
||||
void MPuint16_t_24bpp_Mode1_Memory_Write(uint16_t x,
|
||||
void MPU16_24bpp_Mode1_Memory_Write(uint16_t x,
|
||||
uint16_t y,
|
||||
uint16_t w,
|
||||
uint16_t h,
|
||||
const uint16_t *data);
|
||||
void MPuint16_t_24bpp_Mode2_Memory_Write(uint16_t x,
|
||||
void MPU16_24bpp_Mode2_Memory_Write(uint16_t x,
|
||||
uint16_t y,
|
||||
uint16_t w,
|
||||
uint16_t h,
|
||||
|
@ -474,7 +489,7 @@ void LT768_Print_Internal_Font_String(uint16_t x,
|
|||
uint16_t y,
|
||||
uint32_t FontColor,
|
||||
uint32_t BackGroundColor,
|
||||
char *c);
|
||||
uint8_t *c);
|
||||
|
||||
/* nor flash use outside font */
|
||||
/* 16*16 24*24 32*32 */
|
||||
|
|
|
@ -0,0 +1,16 @@
|
|||
|
||||
|
||||
void InvalidInsCache()
|
||||
{
|
||||
PlatInvalidInsCache();
|
||||
}
|
||||
|
||||
void InvalidDataCache(unsigned long start, unsigned long end)
|
||||
{
|
||||
PlatInvalidDateCache(start, end);
|
||||
}
|
||||
|
||||
void CleanDataCache(unsigned long start, unsigned long end)
|
||||
{
|
||||
PlatCleanDateCache(start, end);
|
||||
}
|
|
@ -48,7 +48,7 @@ Modification:
|
|||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
;</h>
|
||||
*/
|
||||
.equ Stack_Size, 0x00002000
|
||||
.equ Stack_Size, 0x00004000
|
||||
|
||||
.section .stack
|
||||
.align 3
|
||||
|
@ -60,26 +60,6 @@ __StackLimit:
|
|||
__StackTop:
|
||||
.size __StackTop, . - __StackTop
|
||||
|
||||
|
||||
/*
|
||||
;<h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
;</h>
|
||||
*/
|
||||
.equ Heap_Size, 0x00002000
|
||||
|
||||
.if Heap_Size != 0 /* Heap is provided */
|
||||
.section .heap
|
||||
.align 3
|
||||
.globl __HeapBase
|
||||
.globl __HeapLimit
|
||||
__HeapBase:
|
||||
.space Heap_Size
|
||||
.size __HeapBase, . - __HeapBase
|
||||
__HeapLimit:
|
||||
.size __HeapLimit, . - __HeapLimit
|
||||
.endif
|
||||
|
||||
/*
|
||||
;<h> Reset handler start.
|
||||
*/
|
||||
|
|
|
@ -35,9 +35,11 @@ menu "aiit-arm32-board feature"
|
|||
|
||||
menu "config board peripheral"
|
||||
config MOUNT_SDCARD
|
||||
bool "mount cd card"
|
||||
bool
|
||||
default n
|
||||
config MOUNT_USB
|
||||
bool
|
||||
default n
|
||||
select BSP_USING_SDIO
|
||||
endmenu
|
||||
endmenu
|
||||
endmenu
|
||||
|
|
|
@ -51,6 +51,7 @@ extern int HwSramInit(void);
|
|||
extern int Stm32HwAdcInit(void);
|
||||
extern int Stm32HwDacInit(void);
|
||||
extern int Stm32HwLcdInit(void);
|
||||
extern int Stm32HwUsbInit(void);
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
|
@ -147,6 +148,11 @@ struct InitSequenceDesc _board_init[] =
|
|||
#ifdef BSP_USING_SDIO
|
||||
{"hw sdcard init",HwSdioInit},
|
||||
#endif
|
||||
#ifdef BSP_USING_USB
|
||||
#ifdef BSP_USING_STM32_USBH
|
||||
{ "hw usb", Stm32HwUsbInit },
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BSP_USING_EXTMEM
|
||||
{ "hw extern sram", HwSramInit },
|
||||
#endif
|
||||
|
|
|
@ -396,7 +396,7 @@ static const struct LoraDevDone lora_done =
|
|||
* @param bus_name spi bus name
|
||||
* @param dev_name spi dev name
|
||||
* @param drv_name spi drv name
|
||||
* @param flash_name flash dev name
|
||||
* @param lora_name lora name
|
||||
*/
|
||||
SpiLoraDeviceType SpiLoraInit(char *bus_name, char *dev_name, char *drv_name, char *lora_name)
|
||||
{
|
||||
|
@ -493,7 +493,7 @@ int LoraSx12xxSpiDeviceInit(void)
|
|||
return EOK;
|
||||
}
|
||||
|
||||
//#define LORA_TEST
|
||||
#define LORA_TEST
|
||||
#ifdef LORA_TEST
|
||||
/*Just for lora test*/
|
||||
static struct Bus *bus;
|
||||
|
@ -504,11 +504,11 @@ void LoraOpen(void)
|
|||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
ret = LoraSx12xxSpiDeviceInit();
|
||||
if (EOK != ret) {
|
||||
KPrintf("LoraSx12xxSpiDeviceInit failed\n");
|
||||
return;
|
||||
}
|
||||
// ret = LoraSx12xxSpiDeviceInit();
|
||||
// if (EOK != ret) {
|
||||
// KPrintf("LoraSx12xxSpiDeviceInit failed\n");
|
||||
// return;
|
||||
// }
|
||||
|
||||
bus = BusFind(SPI_BUS_NAME_2);
|
||||
dev = BusFindDevice(bus, SX12XX_DEVICE_NAME);
|
||||
|
|
|
@ -103,7 +103,7 @@ static x_err_t Stm32SpiInit(struct Stm32Spi *SpiDrv, struct SpiMasterParam *cfg)
|
|||
|
||||
SPI_InitTypeDef *SpiInit = &SpiDrv->init;
|
||||
|
||||
if (cfg->spi_work_mode & DEV_SPI_SLAVE)
|
||||
if (cfg->spi_work_mode & SPI_DEV_SLAVE)
|
||||
{
|
||||
SpiInit->SPI_Mode = SPI_Mode_Slave;
|
||||
}
|
||||
|
|
|
@ -784,12 +784,12 @@ uint32_t SX1276LoraChannelEmpty( void )
|
|||
|
||||
if(result == RF_CHANNEL_EMPTY)
|
||||
{
|
||||
KPrintf("\nLora--信道可用(RF_CHANNEL_EMPTY)\n");
|
||||
KPrintf("\nLora--RF_CHANNEL_EMPTY\n");
|
||||
return 0;
|
||||
}
|
||||
else if(result == RF_CHANNEL_ACTIVITY_DETECTED)
|
||||
{
|
||||
KPrintf("\nLora--信道正被占用(RF_CHANNEL_ACTIVITY_DETECTED)\n");
|
||||
KPrintf("\nLora--RF_CHANNEL_ACTIVITY_DETECTED\n");
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
config BSP_USING_STM32_USBH
|
||||
bool "Using usb host"
|
||||
default y
|
||||
default n
|
||||
if BSP_USING_STM32_USBH
|
||||
config USB_BUS_NAME
|
||||
string "usb bus name"
|
||||
|
@ -11,5 +11,15 @@ config BSP_USING_STM32_USBH
|
|||
config USB_DEVICE_NAME
|
||||
string "usb bus device name"
|
||||
default "usb_dev"
|
||||
config MOUNT_USB_FS
|
||||
bool "mount usb file system"
|
||||
default y
|
||||
select MOUNT_USB
|
||||
|
||||
if MOUNT_USB_FS
|
||||
config MOUNT_USB_FS_TYPE
|
||||
int "choose file system type : FATFS(0) LWEXT4(3)"
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
|
||||
|
|
|
@ -25,6 +25,14 @@
|
|||
uint32 UdiskRead_new_api(void *dev, struct BusBlockReadParam *read_param);
|
||||
uint32 UdiskWirte_new_api(void *dev, struct BusBlockWriteParam *write_param);
|
||||
|
||||
#ifdef MOUNT_USB
|
||||
int MountUsb(void)
|
||||
{
|
||||
STM32USBHostRegister();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static uint32 UdiskOpenNewApi(void *dev)
|
||||
{
|
||||
return EOK;
|
||||
|
|
|
@ -37,7 +37,7 @@ menu "aiit-riscv64-board feature"
|
|||
|
||||
menu "config board peripheral"
|
||||
config MOUNT_SDCARD
|
||||
bool "mount cd card"
|
||||
bool "mount sd card"
|
||||
default n
|
||||
select BSP_USING_SDIO
|
||||
config MOUNT_USB
|
||||
|
|
|
@ -71,7 +71,7 @@ extern int HwCh376Init(void);
|
|||
* @description: Mount USB
|
||||
* @return 0
|
||||
*/
|
||||
int MountUSB(void)
|
||||
int MountUsb(void)
|
||||
{
|
||||
if (MountFilesystem(USB_BUS_NAME, USB_DEVICE_NAME, USB_DRIVER_NAME, FSTYPE_CH376, "/") == 0)
|
||||
KPrintf("usb mount to '/'");
|
||||
|
|
|
@ -389,7 +389,7 @@ static const struct LoraDevDone lora_done =
|
|||
* @param bus_name spi bus name
|
||||
* @param dev_name spi dev name
|
||||
* @param drv_name spi drv name
|
||||
* @param flash_name flash dev name
|
||||
* @param lora_name lora name
|
||||
*/
|
||||
SpiLoraDeviceType SpiLoraInit(char *bus_name, char *dev_name, char *drv_name, char *lora_name)
|
||||
{
|
||||
|
|
|
@ -221,7 +221,7 @@ static uint32 SpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStand
|
|||
{
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
|
||||
|
||||
uint32 spi_read_length = 0;;
|
||||
uint32 spi_read_length = 0;
|
||||
uint8 device_id = dev_param->spi_slave_param->spi_slave_id;
|
||||
uint8 device_master_id = dev_param->spi_dma_param->spi_master_id;
|
||||
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
|
||||
|
@ -394,9 +394,15 @@ static int BoardSpiDevBend(struct SpiDmaParam *spi_initparam)
|
|||
static struct SpiHardwareDevice spi_device2;
|
||||
memset(&spi_device2, 0, sizeof(struct SpiHardwareDevice));
|
||||
|
||||
spi_initparam->spi_slave_id[SPI_DEVICE_SLAVE_ID_2] = SPI_DEVICE_SLAVE_ID_2;
|
||||
spi_initparam->spi_cs_gpio_pin[SPI_DEVICE_SLAVE_ID_2] = SPI1_CS2_PIN;
|
||||
spi_initparam->spi_cs_select_id[SPI_DEVICE_SLAVE_ID_2] = SPI_CHIP_SELECT_2;
|
||||
static struct SpiSlaveParam spi_slaveparam2;
|
||||
memset(&spi_slaveparam2, 0, sizeof(struct SpiSlaveParam));
|
||||
|
||||
spi_slaveparam2.spi_slave_id = SPI_DEVICE_SLAVE_ID_2;
|
||||
spi_slaveparam2.spi_cs_gpio_pin = SPI1_CS2_PIN;
|
||||
spi_slaveparam2.spi_cs_select_id = SPI_CHIP_SELECT_2;
|
||||
|
||||
spi_device2.spi_param.spi_dma_param = spi_initparam;
|
||||
spi_device2.spi_param.spi_slave_param = &spi_slaveparam2;
|
||||
|
||||
spi_device2.spi_dev_done = &(spi_dev_done);
|
||||
|
||||
|
@ -417,9 +423,15 @@ static int BoardSpiDevBend(struct SpiDmaParam *spi_initparam)
|
|||
static struct SpiHardwareDevice spi_device3;
|
||||
memset(&spi_device3, 0, sizeof(struct SpiHardwareDevice));
|
||||
|
||||
spi_initparam->spi_slave_id[SPI_DEVICE_SLAVE_ID_3] = SPI_DEVICE_SLAVE_ID_3;
|
||||
spi_initparam->spi_cs_gpio_pin[SPI_DEVICE_SLAVE_ID_3] = SPI1_CS3_PIN;
|
||||
spi_initparam->spi_cs_select_id[SPI_DEVICE_SLAVE_ID_3] = SPI_CHIP_SELECT_3;
|
||||
static struct SpiSlaveParam spi_slaveparam3;
|
||||
memset(&spi_slaveparam3, 0, sizeof(struct SpiSlaveParam));
|
||||
|
||||
spi_slaveparam3.spi_slave_id = SPI_DEVICE_SLAVE_ID_3;
|
||||
spi_slaveparam3.spi_cs_gpio_pin = SPI1_CS3_PIN;
|
||||
spi_slaveparam3.spi_cs_select_id = SPI_CHIP_SELECT_3;
|
||||
|
||||
spi_device3.spi_param.spi_dma_param = spi_initparam;
|
||||
spi_device3.spi_param.spi_slave_param = &spi_slaveparam3;
|
||||
|
||||
spi_device3.spi_dev_done = &(spi_dev_done);
|
||||
|
||||
|
|
|
@ -784,12 +784,12 @@ uint32_t SX1276LoraChannelEmpty( void )
|
|||
|
||||
if(result == RF_CHANNEL_EMPTY)
|
||||
{
|
||||
KPrintf("\nLora--信道可用(RF_CHANNEL_EMPTY)\n");
|
||||
KPrintf("\nLora--RF_CHANNEL_EMPTY\n");
|
||||
return 0;
|
||||
}
|
||||
else if(result == RF_CHANNEL_ACTIVITY_DETECTED)
|
||||
{
|
||||
KPrintf("\nLora--信道正被占用(RF_CHANNEL_ACTIVITY_DETECTED)\n");
|
||||
KPrintf("\nLora--RF_CHANNEL_ACTIVITY_DETECTED)\n");
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
|
|
|
@ -73,7 +73,7 @@ extern int HwSoftSPIInit(void);
|
|||
* @description: Mount USB
|
||||
* @return 0
|
||||
*/
|
||||
int MountUSB(void)
|
||||
int MountUsb(void)
|
||||
{
|
||||
if (MountFilesystem(USB_BUS_NAME, USB_DEVICE_NAME, USB_DRIVER_NAME, FSTYPE_CH376, "/") == 0)
|
||||
KPrintf("usb mount to '/'\n");
|
||||
|
|
|
@ -80,8 +80,7 @@ static struct io_config
|
|||
IOCONFIG(BSP_I2C_SCL, FUNC_GPIO4),
|
||||
#endif
|
||||
#ifdef BSP_USING_TOUCH
|
||||
// IOCONFIG(BSP_TOUCH_TP_INT, HS_GPIO(FPIOA_TOUCH_TP_INT)),
|
||||
IOCONFIG(BSP_TOUCH_TP_INT, HS_GPIO(FUNC_GPIOHS30)),
|
||||
IOCONFIG(BSP_TOUCH_TP_INT, HS_GPIO(FPIOA_TOUCH_TP_INT)),
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SOFT_SPI
|
||||
|
|
|
@ -28,6 +28,12 @@ menu "hc32f4a0 feature"
|
|||
endmenu
|
||||
endmenu
|
||||
|
||||
config MOUNT_SDCARD
|
||||
bool
|
||||
default n
|
||||
config MOUNT_USB
|
||||
bool
|
||||
default n
|
||||
endmenu
|
||||
|
||||
menu "Hardware feature"
|
||||
|
|
|
@ -34,6 +34,18 @@ Modification:
|
|||
#include <hc32_ll.h>
|
||||
#include <connect_usart.h>
|
||||
|
||||
#ifdef BSP_USING_SDIO
|
||||
#include <connect_sdio.h>
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI
|
||||
#include <connect_spi.h>
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USB
|
||||
#include <connect_usb.h>
|
||||
#endif
|
||||
|
||||
extern void entry(void);
|
||||
extern int HwUsartInit();
|
||||
|
||||
|
@ -46,15 +58,10 @@ void SystemClockConfig(void)
|
|||
stc_clock_xtal_init_t stcXtalInit;
|
||||
stc_clock_pll_init_t stcPLLHInit;
|
||||
|
||||
/* PCLK0, HCLK Max 240MHz */
|
||||
/* PCLK1, PCLK4 Max 120MHz */
|
||||
/* PCLK2, PCLK3 Max 60MHz */
|
||||
/* EX BUS Max 120MHz */
|
||||
CLK_SetClockDiv(CLK_BUS_CLK_ALL, \
|
||||
(CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | CLK_PCLK2_DIV4 | \
|
||||
CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2 | CLK_EXCLK_DIV2 | \
|
||||
CLK_SetClockDiv(CLK_BUS_CLK_ALL,
|
||||
(CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | CLK_PCLK2_DIV4 |
|
||||
CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2 | CLK_EXCLK_DIV2 |
|
||||
CLK_HCLK_DIV1));
|
||||
|
||||
(void)CLK_XtalStructInit(&stcXtalInit);
|
||||
/* Config Xtal and enable Xtal */
|
||||
stcXtalInit.u8Mode = CLK_XTAL_MD_OSC;
|
||||
|
@ -64,26 +71,37 @@ void SystemClockConfig(void)
|
|||
(void)CLK_XtalInit(&stcXtalInit);
|
||||
|
||||
(void)CLK_PLLStructInit(&stcPLLHInit);
|
||||
|
||||
stcPLLHInit.u8PLLState = CLK_PLL_ON;
|
||||
stcPLLHInit.PLLCFGR = 0UL;
|
||||
stcPLLHInit.PLLCFGR_f.PLLM = 1UL - 1UL;
|
||||
|
||||
#ifdef BSP_USING_USB
|
||||
/* VCO = (8/1)*120 = 960MHz*/
|
||||
stcPLLHInit.u8PLLState = CLK_PLL_ON;
|
||||
stcPLLHInit.PLLCFGR = 0UL;
|
||||
stcPLLHInit.PLLCFGR_f.PLLM = 1UL - 1UL;
|
||||
stcPLLHInit.PLLCFGR_f.PLLN = 120UL - 1UL;
|
||||
stcPLLHInit.PLLCFGR_f.PLLP = 4UL - 1UL;
|
||||
stcPLLHInit.PLLCFGR_f.PLLQ = 4UL - 1UL;
|
||||
stcPLLHInit.PLLCFGR_f.PLLR = 4UL - 1UL;
|
||||
stcPLLHInit.PLLCFGR_f.PLLN = 120UL - 1UL;
|
||||
#else
|
||||
/* VCO = (8/1)*100 = 800MHz*/
|
||||
stcPLLHInit.PLLCFGR_f.PLLN = 100UL - 1UL;
|
||||
#endif
|
||||
stcPLLHInit.PLLCFGR_f.PLLP = 4UL - 1UL;
|
||||
stcPLLHInit.PLLCFGR_f.PLLQ = 4UL - 1UL;
|
||||
stcPLLHInit.PLLCFGR_f.PLLR = 4UL - 1UL;
|
||||
stcPLLHInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL;
|
||||
(void)CLK_PLLInit(&stcPLLHInit);
|
||||
|
||||
#ifdef BSP_USING_USB
|
||||
/* Highspeed SRAM set to 0 Read/Write wait cycle */
|
||||
SRAM_SetWaitCycle(SRAM_SRAMH, SRAM_WAIT_CYCLE0, SRAM_WAIT_CYCLE0);
|
||||
|
||||
/* SRAM1_2_3_4_backup set to 1 Read/Write wait cycle */
|
||||
SRAM_SetWaitCycle((SRAM_SRAM123 | SRAM_SRAM4 | SRAM_SRAMB), SRAM_WAIT_CYCLE1, SRAM_WAIT_CYCLE1);
|
||||
|
||||
#else
|
||||
/* Highspeed SRAM set to 1 Read/Write wait cycle */
|
||||
SRAM_SetWaitCycle(SRAM_SRAMH, SRAM_WAIT_CYCLE1, SRAM_WAIT_CYCLE1);
|
||||
/* SRAM1_2_3_4_backup set to 2 Read/Write wait cycle */
|
||||
SRAM_SetWaitCycle((SRAM_SRAM123 | SRAM_SRAM4 | SRAM_SRAMB), SRAM_WAIT_CYCLE2, SRAM_WAIT_CYCLE2);
|
||||
#endif
|
||||
/* 0-wait @ 40MHz */
|
||||
(void)EFM_SetWaitCycle(EFM_WAIT_CYCLE5);
|
||||
|
||||
EFM_SetWaitCycle(EFM_WAIT_CYCLE5);
|
||||
/* 4 cycles for 200 ~ 250MHz */
|
||||
GPIO_SetReadWaitCycle(GPIO_RD_WAIT4);
|
||||
CLK_SetSysClockSrc(CLK_SYSCLK_SRC_PLL);
|
||||
|
@ -98,7 +116,7 @@ void PeripheralClockConfig(void)
|
|||
CLK_SetCANClockSrc(CLK_CAN2, CLK_CANCLK_SYSCLK_DIV6);
|
||||
#endif
|
||||
|
||||
#if defined(RT_USING_ADC)
|
||||
#if defined(BSP_USING_ADC)
|
||||
CLK_SetPeriClockSrc(CLK_PERIPHCLK_PCLK);
|
||||
#endif
|
||||
}
|
||||
|
@ -117,12 +135,26 @@ void SysTickConfiguration(void)
|
|||
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
x_base lock = 0;
|
||||
lock = DISABLE_INTERRUPT();
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
ENABLE_INTERRUPT(lock);
|
||||
}
|
||||
|
||||
struct InitSequenceDesc _board_init[] =
|
||||
{
|
||||
{ " NONE ",NONE },
|
||||
{
|
||||
#ifdef BSP_USING_SDIO
|
||||
{ "sdio", HwSdioInit },
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI
|
||||
{ "spi", HwSpiInit },
|
||||
#endif
|
||||
#ifdef BSP_USING_USB
|
||||
{ "usb", HwUsbHostInit },
|
||||
#endif
|
||||
{ " NONE ", NONE },
|
||||
};
|
||||
|
||||
void InitBoardHardware()
|
||||
|
|
|
@ -35,11 +35,11 @@ Modification:
|
|||
|
||||
#include <stdint.h>
|
||||
|
||||
extern int __bss_end;
|
||||
extern int __heap_start;
|
||||
extern unsigned int g_service_table_start;
|
||||
extern unsigned int g_service_table_end;
|
||||
|
||||
#define MEMORY_START_ADDRESS (&__bss_end)
|
||||
#define MEMORY_START_ADDRESS (&__heap_start)
|
||||
#define HC32F4_SRAM_SIZE 512
|
||||
#define MEMORY_END_ADDRESS (0x1FFE0000 + HC32F4_SRAM_SIZE * 1024)
|
||||
|
||||
|
|
|
@ -216,20 +216,18 @@ SECTIONS
|
|||
__end__ = .;
|
||||
PROVIDE(end = .);
|
||||
PROVIDE(_end = .);
|
||||
*(.heap*)
|
||||
. = ALIGN(8);
|
||||
__HeapLimit = .;
|
||||
|
||||
__StackLimit = .;
|
||||
*(.stack*)
|
||||
. = ALIGN(8);
|
||||
__StackTop = .;
|
||||
|
||||
__heap_start = .;
|
||||
} >RAM
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
|
||||
PROVIDE(_stack = __StackTop);
|
||||
PROVIDE(_Min_Heap_Size = __HeapLimit - __HeapBase);
|
||||
PROVIDE(_Min_Stack_Size = __StackTop - __StackLimit);
|
||||
|
||||
__RamEnd = ORIGIN(RAM) + LENGTH(RAM);
|
||||
|
|
|
@ -5,3 +5,27 @@ menuconfig BSP_USING_UART
|
|||
if BSP_USING_UART
|
||||
source "$BSP_DIR/third_party_driver/usart/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Using SPI device"
|
||||
default n
|
||||
select RESOURCES_SPI
|
||||
if BSP_USING_SPI
|
||||
source "$BSP_DIR/third_party_driver/spi/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SDIO
|
||||
bool "Using SD CARD device"
|
||||
default n
|
||||
select RESOURCES_SDIO
|
||||
if BSP_USING_SDIO
|
||||
source "$BSP_DIR/third_party_driver/sdio/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_USB
|
||||
bool "Using USB device"
|
||||
default n
|
||||
select RESOURCES_USB
|
||||
if BSP_USING_USB
|
||||
source "$BSP_DIR/third_party_driver/usb/Kconfig"
|
||||
endif
|
||||
|
|
|
@ -4,4 +4,16 @@ ifeq ($(CONFIG_BSP_USING_UART),y)
|
|||
SRC_DIR += usart
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_SPI),y)
|
||||
SRC_DIR += spi
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_SDIO),y)
|
||||
SRC_DIR += sdio
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_USB),y)
|
||||
SRC_DIR += usb
|
||||
endif
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
|
@ -101,7 +101,7 @@ extern "C"
|
|||
#define LL_TMRA_ENABLE (DDL_ON)
|
||||
#define LL_TRNG_ENABLE (DDL_ON)
|
||||
#define LL_USART_ENABLE (DDL_ON)
|
||||
#define LL_USB_ENABLE (DDL_OFF)
|
||||
#define LL_USB_ENABLE (DDL_ON)
|
||||
#define LL_VREF_ENABLE (DDL_OFF)
|
||||
#define LL_WDT_ENABLE (DDL_ON)
|
||||
|
||||
|
|
|
@ -4,4 +4,16 @@ ifeq ($(CONFIG_BSP_USING_UART),y)
|
|||
SRC_FILES += hc32_ll_usart.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_SDIO),y)
|
||||
SRC_FILES += hc32_ll_sdioc.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_SPI),y)
|
||||
SRC_FILES += hc32_ll_spi.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_USB),y)
|
||||
SRC_FILES += hc32_ll_usb.c
|
||||
endif
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_sdio.h
|
||||
* @brief define hc32f4a0-board sdio function and struct
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-03-15
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_SDIO_H
|
||||
#define CONNECT_SDIO_H
|
||||
|
||||
#include <device.h>
|
||||
#include <hc32_ll_gpio.h>
|
||||
#include <hc32_ll_fcg.h>
|
||||
#include <hc32_ll_sdioc.h>
|
||||
#include <hardware_sdio.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define SD_CARD_STACK_SIZE 2048
|
||||
|
||||
int HwSdioInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,39 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_spi.h
|
||||
* @brief define hc32f4a0-board spi function and struct
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-10-17
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_SPI_H
|
||||
#define CONNECT_SPI_H
|
||||
|
||||
#include <device.h>
|
||||
#include <hardware_irq.h>
|
||||
#include <hc32_ll_spi.h>
|
||||
#include <hc32_ll_gpio.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
int HwSpiInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,61 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_spi_lora.h
|
||||
* @brief define spi lora dev function and struct using bus driver framework
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-10-31
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_SPI_LORA_H
|
||||
#define CONNECT_SPI_LORA_H
|
||||
|
||||
#include <device.h>
|
||||
#include <hc32_ll_utility.h>
|
||||
#include <connect_spi.h>
|
||||
#include <radio.h>
|
||||
#include <spi_lora_sx12xx.h>
|
||||
#include <sx1276.h>
|
||||
#include <sx1276-Hal.h>
|
||||
#include <sx1276-LoRa.h>
|
||||
#include <sx1276-LoRaMisc.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//#define SPI_LORA_FREQUENCY 10000000
|
||||
#define SPI_LORA_BUFFER_SIZE 256
|
||||
|
||||
typedef struct SpiLoraDevice *SpiLoraDeviceType;
|
||||
|
||||
struct LoraDevDone
|
||||
{
|
||||
uint32 (*open) (void *dev);
|
||||
uint32 (*close) (void *dev);
|
||||
uint32 (*write) (void *dev, struct BusBlockWriteParam *write_param);
|
||||
uint32 (*read) (void *dev, struct BusBlockReadParam *read_param);
|
||||
};
|
||||
|
||||
struct SpiLoraDevice
|
||||
{
|
||||
struct SpiHardwareDevice *spi_dev;
|
||||
struct SpiHardwareDevice lora_dev;
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_usb.h
|
||||
* @brief define hc32f4a0-board usb function and struct
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-11-07
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_USB_H
|
||||
#define CONNECT_USB_H
|
||||
|
||||
#include <device.h>
|
||||
#include <hc32_ll_utility.h>
|
||||
#include <hc32_ll_gpio.h>
|
||||
#include <usb_lib.h>
|
||||
#include <usb_host_user.h>
|
||||
#include <usb_host_driver.h>
|
||||
#include <usb_host_core.h>
|
||||
#include <usb_host_msc_class.h>
|
||||
#include <usb_host_msc_scsi.h>
|
||||
#include <usb_host_msc_bot.h>
|
||||
#include <usb_host_int.h>
|
||||
|
||||
#if defined(FS_VFS)
|
||||
#include <iot-vfs.h>
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define USB_HOST_STACK_SIZE 4096
|
||||
|
||||
#define USB_SINGLE_BLOCK_SIZE 512
|
||||
|
||||
int HwUsbHostInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,298 @@
|
|||
/**
|
||||
*******************************************************************************
|
||||
* @file sdioc/sdioc_sd/source/sd.h
|
||||
* @brief This file contains all the functions prototypes of the Secure
|
||||
* Digital(SD) driver library.
|
||||
@verbatim
|
||||
Change Logs:
|
||||
Date Author Notes
|
||||
2022-03-31 CDT First version
|
||||
@endverbatim
|
||||
*******************************************************************************
|
||||
* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
|
||||
*
|
||||
* This software component is licensed by XHSC under BSD 3-Clause license
|
||||
* (the "License"); You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file hardware_sdio.h
|
||||
* @brief define hc32f4a0-board sdio function and struct
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-10-18
|
||||
*/
|
||||
|
||||
#ifndef __HARDWARE_SDIO_H__
|
||||
#define __HARDWARE_SDIO_H__
|
||||
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Include files
|
||||
******************************************************************************/
|
||||
#include "hc32_ll_sdioc.h"
|
||||
#include "hc32_ll_dma.h"
|
||||
#include "hc32_ll_utility.h"
|
||||
|
||||
/**
|
||||
* @addtogroup HC32F4A0_DDL_Examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup SDIOC_SD_Card
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Global type definitions ('typedef')
|
||||
******************************************************************************/
|
||||
/**
|
||||
* @defgroup SD_Global_Types SD Global Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SD Card State enumeration structure definition
|
||||
*/
|
||||
typedef enum {
|
||||
SD_CARD_STAT_IDLE = 0x00U, /*!< Card state is idle */
|
||||
SD_CARD_STAT_RDY = 0x01U, /*!< Card state is ready */
|
||||
SD_CARD_STAT_IDENTIFY = 0x02U, /*!< Card is in identification state */
|
||||
SD_CARD_STAT_STANDBY = 0x03U, /*!< Card is in standby state */
|
||||
SD_CARD_STAT_TRANS = 0x04U, /*!< Card is in transfer state */
|
||||
SD_CARD_STAT_TX_DATA = 0x05U, /*!< Card is sending an operation */
|
||||
SD_CARD_STAT_RX_DATA = 0x06U, /*!< Card is receiving operation information */
|
||||
SD_CARD_STAT_PGM = 0x07U, /*!< Card is in programming state */
|
||||
SD_CARD_STAT_DISCONNECT = 0x08U /*!< Card is disconnected */
|
||||
} en_sd_card_state_t;
|
||||
|
||||
/**
|
||||
* @brief SD Card Information Structure definition
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t u32CardType; /*!< Specifies the card Type */
|
||||
uint32_t u32CardVersion; /*!< Specifies the card version */
|
||||
uint32_t u32Class; /*!< Specifies the class of the card class */
|
||||
uint32_t u32RelativeCardAddr; /*!< Specifies the Relative Card Address */
|
||||
uint32_t u32BlockNum; /*!< Specifies the Card Capacity in blocks */
|
||||
uint32_t u32BlockSize; /*!< Specifies one block size in bytes */
|
||||
uint32_t u32LogBlockNum; /*!< Specifies the Card logical Capacity in blocks */
|
||||
uint32_t u32LogBlockSize; /*!< Specifies logical block size in bytes */
|
||||
} stc_sd_card_info_t;
|
||||
|
||||
/**
|
||||
* @brief SD Card Specific Data(CSD Register) Structure definition
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t u8CSDStruct; /*!< CSD structure */
|
||||
uint8_t u8Reserved1; /*!< Reserved */
|
||||
uint8_t u8TAAC; /*!< Data read access time 1 */
|
||||
uint8_t u8NSAC; /*!< Data read access time 2 in CLK cycles */
|
||||
uint8_t u8MaxBusClkFreq; /*!< Max. bus clock frequency */
|
||||
uint16_t u16CardCmdClass; /*!< Card command classes */
|
||||
uint8_t u8ReadBlockLen; /*!< Max. read data block length */
|
||||
uint8_t u8BlockReadPartial; /*!< Partial blocks for read allowed */
|
||||
uint8_t u8WriteBlockMisalign; /*!< Write block misalignment */
|
||||
uint8_t u8ReadBlockMisalign; /*!< Read block misalignment */
|
||||
uint8_t u8DSRImplement; /*!< DSR implemented */
|
||||
uint8_t u8Reserved2; /*!< Reserved */
|
||||
uint32_t u32DeviceSize; /*!< Device Size */
|
||||
uint8_t u8MaxReadCurrVDDMin; /*!< Max. read current @ VDD min */
|
||||
uint8_t u8MaxReadCurrVDDMax; /*!< Max. read current @ VDD max */
|
||||
uint8_t u8MaxWriteCurrVDDMin; /*!< Max. write current @ VDD min */
|
||||
uint8_t u8MaxWriteCurrVDDMax; /*!< Max. write current @ VDD max */
|
||||
uint8_t u8DeviceSizeMul; /*!< Device size multiplier */
|
||||
uint8_t u8EraseSingleBlockEn; /*!< Erase single block enable */
|
||||
uint8_t u8EraseSectorSize; /*!< Erase sector size */
|
||||
uint8_t u8WriteProtectGroupSize; /*!< Write protect group size */
|
||||
uint8_t u8WriteProtectGroupEn; /*!< Write protect group enable */
|
||||
uint8_t u8Reserved3; /*!< Reserved */
|
||||
uint8_t u8WriteSpeedFactor; /*!< Write speed factor */
|
||||
uint8_t u8MaxWriteBlockLen; /*!< Max. write data block length */
|
||||
uint8_t u8WriteBlockPartial; /*!< Partial blocks for write allowed */
|
||||
uint8_t u8Reserved4; /*!< Reserved */
|
||||
uint8_t u8FileFormatGroup; /*!< File format group */
|
||||
uint8_t u8CopyFlag; /*!< Copy flag (OTP) */
|
||||
uint8_t u8PermWriteProtect; /*!< Permanent write protection */
|
||||
uint8_t u8TempWriteProtect; /*!< Temporary write protection */
|
||||
uint8_t u8FileFormat; /*!< File format */
|
||||
uint8_t u8Reserved5; /*!< Reserved */
|
||||
uint8_t u8CRCChecksum; /*!< CSD CRC7 checksum */
|
||||
uint8_t u8Reserved6; /*!< Always 1 */
|
||||
} stc_sd_card_csd_t;
|
||||
|
||||
/**
|
||||
* @brief SD Card Identification Data(CID Register) Structure definition
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t u8ManufacturerID; /*!< Manufacturer ID */
|
||||
uint16_t u16OemAppID; /*!< OEM/Application ID */
|
||||
uint32_t u32ProductName1; /*!< Product Name part1 */
|
||||
uint8_t u8ProductName2; /*!< Product Name part2 */
|
||||
uint8_t u8ProductRevision; /*!< Product Revision */
|
||||
uint32_t u32ProductSN; /*!< Product Serial Number */
|
||||
uint8_t u8Reserved1; /*!< Reserved1 */
|
||||
uint16_t u16ManufactDate; /*!< Manufacturing Date */
|
||||
uint8_t u8CRCChecksum; /*!< CRC7 checksum */
|
||||
uint8_t u8Reserved2; /*!< Always 1 */
|
||||
} stc_sd_card_cid_t;
|
||||
|
||||
/**
|
||||
* @brief SD Card Status Structure definition (returned by ACMD13)
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t u8DataBusWidth; /*!< Shows the currently defined data bus width */
|
||||
uint8_t u8SecuredMode; /*!< Card is in secured mode of operation */
|
||||
uint16_t u16CardType; /*!< Carries information about card type */
|
||||
uint32_t u32ProtectedAreaSize; /*!< Carries information about the capacity of protected area */
|
||||
uint8_t u8SpeedClass; /*!< Carries information about the speed class of the card */
|
||||
uint8_t u8PerformanceMove; /*!< Carries information about the card's performance move */
|
||||
uint8_t u8AllocUnitSize; /*!< Carries information about the card's allocation unit size */
|
||||
uint16_t u16EraseSize; /*!< Determines the number of AUs to be erased in one operation */
|
||||
uint8_t u8EraseTimeout; /*!< Determines the timeout for any number of AU erase */
|
||||
uint8_t u8EraseOffset; /*!< Carries information about the erase offset */
|
||||
} stc_sd_card_status_t;
|
||||
|
||||
/**
|
||||
* @brief SD handle Structure definition
|
||||
*/
|
||||
typedef struct {
|
||||
CM_SDIOC_TypeDef *SDIOCx; /*!< Pointer to SDIOC registers base address */
|
||||
stc_sdioc_init_t stcSdiocInit; /*!< SDIOC Initialize structure @ref stc_sdioc_init_t */
|
||||
CM_DMA_TypeDef *DMAx; /*!< Pointer to DMA registers base address */
|
||||
uint8_t u8DmaTxCh; /*!< Specifies the DMA channel used to send */
|
||||
uint8_t u8DmaRxCh; /*!< Specifies the DMA channel used to receive */
|
||||
uint8_t *pu8Buffer; /*!< Pointer to SD Tx/Rx transfer Buffer */
|
||||
uint32_t u32Len; /*!< SD Tx/Rx Transfer length */
|
||||
uint32_t u32Context; /*!< SD transfer context */
|
||||
uint32_t u32ErrorCode; /*!< SD Card Error codes */
|
||||
stc_sd_card_info_t stcSdCardInfo; /*!< SD Card information */
|
||||
uint32_t u32CSD[4]; /*!< SD card specific data table */
|
||||
uint32_t u32CID[4]; /*!< SD card identification number table */
|
||||
uint32_t u32SCR[2]; /*!< SD Configuration Register table */
|
||||
} stc_sd_handle_t;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Global pre-processor symbols/macros ('#define')
|
||||
******************************************************************************/
|
||||
/**
|
||||
* @defgroup SD_Global_Macros SD Global Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup SD_Transfer_Context SD Transfer Context
|
||||
* @{
|
||||
*/
|
||||
#define SD_CONTEXT_NONE (0x00UL) /*!< None */
|
||||
#define SD_CONTEXT_RD_SINGLE_BLOCK (0x01UL) /*!< Read single block operation */
|
||||
#define SD_CONTEXT_RD_MULTI_BLOCK (0x02UL) /*!< Read multiple blocks operation */
|
||||
#define SD_CONTEXT_WR_SINGLE_BLOCK (0x10UL) /*!< Write single block operation */
|
||||
#define SD_CONTEXT_WR_MULTI_BLOCK (0x20UL) /*!< Write multiple blocks operation */
|
||||
#define SD_CONTEXT_INT (0x40UL) /*!< Process in Interrupt mode */
|
||||
#define SD_CONTEXT_DMA (0x80UL) /*!< Process in DMA mode */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup SD_Support_Memory_Card SD Support Memory Card
|
||||
* @{
|
||||
*/
|
||||
#define SD_CARD_SDSC (0x00UL)
|
||||
#define SD_CARD_SDHC_SDXC (0x01UL)
|
||||
#define SD_CARD_SECURED (0x03UL)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup SD_Support_Version SD Support Version
|
||||
* @{
|
||||
*/
|
||||
#define SD_CARD_V1_X (0x00UL) /*!< SD Card version: 1.x */
|
||||
#define SD_CARD_V2_X (0x01UL) /*!< SD Card version: 2.x */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Global variable definitions ('extern')
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
Global function prototypes (definition in C source)
|
||||
******************************************************************************/
|
||||
/**
|
||||
* @addtogroup SD_Global_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t SD_DeInit(stc_sd_handle_t *handle);
|
||||
int32_t SD_Init(stc_sd_handle_t *handle);
|
||||
int32_t SD_GetCardState(stc_sd_handle_t *handle, en_sd_card_state_t *peCardState);
|
||||
int32_t SD_GetCardCID(const stc_sd_handle_t *handle, stc_sd_card_cid_t *pstcCardCID);
|
||||
int32_t SD_GetCardCSD(stc_sd_handle_t *handle, stc_sd_card_csd_t *pstcCardCSD);
|
||||
int32_t SD_GetCardStatus(stc_sd_handle_t *handle, stc_sd_card_status_t *pstcCardStatus);
|
||||
int32_t SD_GetCardInfo(stc_sd_handle_t *handle, stc_sd_card_info_t *pstcCardInfo);
|
||||
int32_t SD_GetErrorCode(const stc_sd_handle_t *handle, uint32_t *pu32ErrorCode);
|
||||
|
||||
/* Callback in non blocking modes */
|
||||
void SD_IRQHandler(stc_sd_handle_t *handle);
|
||||
void SD_TxCompleteCallback(stc_sd_handle_t *handle);
|
||||
void SD_RxCompleteCallback(stc_sd_handle_t *handle);
|
||||
void SD_ErrorCallback(stc_sd_handle_t *handle);
|
||||
|
||||
/* Polling Mode */
|
||||
int32_t SD_Erase(stc_sd_handle_t *handle, uint32_t u32BlockStartAddr, uint32_t u32BlockEndAddr);
|
||||
int32_t SD_ReadBlocks(stc_sd_handle_t *handle, uint32_t u32BlockAddr, uint16_t u16BlockCount,
|
||||
uint8_t *pu8Data, uint32_t u32Timeout);
|
||||
int32_t SD_WriteBlocks(stc_sd_handle_t *handle, uint32_t u32BlockAddr, uint16_t u16BlockCount,
|
||||
uint8_t *pu8Data, uint32_t u32Timeout);
|
||||
/* Interrupt Mode */
|
||||
int32_t SD_ReadBlocks_INT(stc_sd_handle_t *handle, uint32_t u32BlockAddr, uint16_t u16BlockCount, uint8_t *pu8Data);
|
||||
int32_t SD_WriteBlocks_INT(stc_sd_handle_t *handle, uint32_t u32BlockAddr, uint16_t u16BlockCount, uint8_t *pu8Data);
|
||||
/* DMA Mode */
|
||||
int32_t SD_ReadBlocks_DMA(stc_sd_handle_t *handle, uint32_t u32BlockAddr, uint16_t u16BlockCount, uint8_t *pu8Data);
|
||||
int32_t SD_WriteBlocks_DMA(stc_sd_handle_t *handle, uint32_t u32BlockAddr, uint16_t u16BlockCount, uint8_t *pu8Data);
|
||||
/* Abort */
|
||||
int32_t SD_Abort(stc_sd_handle_t *handle);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SD_H__ */
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF (not truncated)
|
||||
******************************************************************************/
|
|
@ -0,0 +1,24 @@
|
|||
if BSP_USING_SDIO
|
||||
config SDIO_BUS_NAME
|
||||
string "sdio bus name"
|
||||
default "sdio"
|
||||
|
||||
config SDIO_DRIVER_NAME
|
||||
string "sdio driver name"
|
||||
default "sdio_drv"
|
||||
|
||||
config SDIO_DEVICE_NAME
|
||||
string "sdio device name"
|
||||
default "sdio_dev"
|
||||
|
||||
config MOUNT_SDCARD_FS
|
||||
bool "mount sd card file system : if y then not support usb-mount-fs"
|
||||
default y
|
||||
select MOUNT_SDCARD
|
||||
|
||||
if MOUNT_SDCARD_FS
|
||||
config MOUNT_SDCARD_FS_TYPE
|
||||
int "choose file system type : FATFS(0)"
|
||||
default 0
|
||||
endif
|
||||
endif
|
|
@ -0,0 +1,3 @@
|
|||
SRC_FILES := connect_sdio.c hardware_sdio.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,349 @@
|
|||
/**
|
||||
*******************************************************************************
|
||||
* @file sdioc/sdioc_sd/source/main.c
|
||||
* @brief Main program of SDIOC SD card for the Device Driver Library.
|
||||
@verbatim
|
||||
Change Logs:
|
||||
Date Author Notes
|
||||
2022-03-31 CDT First version
|
||||
@endverbatim
|
||||
*******************************************************************************
|
||||
* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
|
||||
*
|
||||
* This software component is licensed by XHSC under BSD 3-Clause license
|
||||
* (the "License"); You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_sdio.c
|
||||
* @brief support sdio function using bus driver framework on hc32f4a0 board
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-10-18
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: connect_sdio.c
|
||||
Description: support hc32f4a0-board sd card configure and sdio bus register function
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2022-01-24
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support hc32f4a0-board sdio configure, write and read
|
||||
2. support hc32f4a0-board sdio bus device and driver register
|
||||
*************************************************/
|
||||
|
||||
#include <connect_sdio.h>
|
||||
|
||||
/* SD transfer mode */
|
||||
#define SD_TRANS_MD_POLLING (0U)
|
||||
#define SD_TRANS_MD_INT (1U)
|
||||
#define SD_TRANS_MD_DMA (2U)
|
||||
/* Populate the following macro with an value, reference "SD transfer mode" */
|
||||
#define SD_TRANS_MD (SD_TRANS_MD_POLLING)
|
||||
|
||||
/* SDIOC configuration define */
|
||||
#define SDIOC_SD_UINT (CM_SDIOC1)
|
||||
#define SDIOC_SD_CLK (FCG1_PERIPH_SDIOC1)
|
||||
|
||||
/* CD = PB13 */
|
||||
#define SDIOC_CD_PORT (GPIO_PORT_B)
|
||||
#define SDIOC_CD_PIN (GPIO_PIN_13)
|
||||
/* CK = PC12 */
|
||||
#define SDIOC_CK_PORT (GPIO_PORT_C)
|
||||
#define SDIOC_CK_PIN (GPIO_PIN_12)
|
||||
/* CMD = PD02 */
|
||||
#define SDIOC_CMD_PORT (GPIO_PORT_D)
|
||||
#define SDIOC_CMD_PIN (GPIO_PIN_02)
|
||||
/* D0 = PB07 */
|
||||
#define SDIOC_D0_PORT (GPIO_PORT_B)
|
||||
#define SDIOC_D0_PIN (GPIO_PIN_07)
|
||||
/* D1 = PA08 */
|
||||
#define SDIOC_D1_PORT (GPIO_PORT_A)
|
||||
#define SDIOC_D1_PIN (GPIO_PIN_08)
|
||||
/* D2 = PC10 */
|
||||
#define SDIOC_D2_PORT (GPIO_PORT_C)
|
||||
#define SDIOC_D2_PIN (GPIO_PIN_10)
|
||||
/* D3 = PB05 */
|
||||
#define SDIOC_D3_PORT (GPIO_PORT_B)
|
||||
#define SDIOC_D3_PIN (GPIO_PIN_05)
|
||||
|
||||
static stc_sd_handle_t gSdHandle;
|
||||
static int sd_lock = -1;
|
||||
|
||||
static void SdCardConfig(void)
|
||||
{
|
||||
/* Enable SDIOC clock */
|
||||
FCG_Fcg1PeriphClockCmd(SDIOC_SD_CLK, ENABLE);
|
||||
|
||||
/* SDIOC pins configuration */
|
||||
stc_gpio_init_t stcGpioInit;
|
||||
(void)GPIO_StructInit(&stcGpioInit);
|
||||
stcGpioInit.u16PinState = PIN_STAT_RST;
|
||||
stcGpioInit.u16PinDir = PIN_DIR_IN;
|
||||
(void)GPIO_Init(SDIOC_CD_PORT, SDIOC_CD_PIN, &stcGpioInit);
|
||||
|
||||
GPIO_SetFunc(SDIOC_CK_PORT, SDIOC_CK_PIN, GPIO_FUNC_9);
|
||||
GPIO_SetFunc(SDIOC_CMD_PORT, SDIOC_CMD_PIN, GPIO_FUNC_9);
|
||||
GPIO_SetFunc(SDIOC_D0_PORT, SDIOC_D0_PIN, GPIO_FUNC_9);
|
||||
GPIO_SetFunc(SDIOC_D1_PORT, SDIOC_D1_PIN, GPIO_FUNC_9);
|
||||
GPIO_SetFunc(SDIOC_D2_PORT, SDIOC_D2_PIN, GPIO_FUNC_9);
|
||||
GPIO_SetFunc(SDIOC_D3_PORT, SDIOC_D3_PIN, GPIO_FUNC_9);
|
||||
|
||||
/* Configure structure initialization */
|
||||
gSdHandle.SDIOCx = SDIOC_SD_UINT;
|
||||
gSdHandle.stcSdiocInit.u32Mode = SDIOC_MD_SD;
|
||||
gSdHandle.stcSdiocInit.u8CardDetect = SDIOC_CARD_DETECT_CD_PIN_LVL;
|
||||
gSdHandle.stcSdiocInit.u8SpeedMode = SDIOC_SPEED_MD_HIGH;
|
||||
gSdHandle.stcSdiocInit.u8BusWidth = SDIOC_BUS_WIDTH_4BIT;
|
||||
gSdHandle.stcSdiocInit.u16ClockDiv = SDIOC_CLK_DIV2;
|
||||
gSdHandle.DMAx = NULL;
|
||||
}
|
||||
|
||||
static uint32 SdioConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
if (configure_info->configure_cmd == OPER_BLK_GETGEOME) {
|
||||
NULL_PARAM_CHECK(configure_info->private_data);
|
||||
struct DeviceBlockArrange *args = (struct DeviceBlockArrange *)configure_info->private_data;
|
||||
|
||||
args->size_perbank = gSdHandle.stcSdCardInfo.u32BlockSize;
|
||||
args->block_size = gSdHandle.stcSdCardInfo.u32BlockSize;
|
||||
args->bank_num = gSdHandle.stcSdCardInfo.u32BlockNum;
|
||||
}
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 SdioOpen(void *dev)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
|
||||
if(sd_lock >= 0) {
|
||||
KSemaphoreDelete(sd_lock);
|
||||
}
|
||||
sd_lock = KSemaphoreCreate(1);
|
||||
if (sd_lock < 0){
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 SdioClose(void *dev)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
|
||||
KSemaphoreDelete(sd_lock);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 SdioRead(void *dev, struct BusBlockReadParam *read_param)
|
||||
{
|
||||
uint8 ret = EOK;
|
||||
uint32 sector = read_param->pos;
|
||||
uint32 block_num = read_param->size;
|
||||
uint8 *read_buffer = (uint8 *)read_param->buffer;
|
||||
|
||||
KSemaphoreObtain(sd_lock, WAITING_FOREVER);
|
||||
|
||||
if (LL_OK != SD_ReadBlocks(&gSdHandle, sector, block_num, read_buffer, 2000UL)) {
|
||||
KPrintf("Read data blocks failed.\r\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
KSemaphoreAbandon(sd_lock);
|
||||
|
||||
return read_param->size;
|
||||
}
|
||||
|
||||
static uint32 SdioWrite(void *dev, struct BusBlockWriteParam *write_param)
|
||||
{
|
||||
uint8 ret = EOK;
|
||||
uint32 sector = write_param->pos;
|
||||
uint32 block_num = write_param->size;
|
||||
uint8 *write_buffer = (uint8 *)write_param->buffer;
|
||||
|
||||
KSemaphoreObtain(sd_lock, WAITING_FOREVER);
|
||||
|
||||
if (LL_OK != SD_WriteBlocks(&gSdHandle, sector, block_num, write_buffer, 2000U)) {
|
||||
KPrintf("Write data blocks failed.\r\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
KSemaphoreAbandon(sd_lock);
|
||||
|
||||
return write_param->size;
|
||||
}
|
||||
|
||||
static int SdioControl(struct HardwareDev *dev, struct HalDevBlockParam *block_param)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
|
||||
if (OPER_BLK_GETGEOME == block_param->cmd) {
|
||||
block_param->dev_block.size_perbank = gSdHandle.stcSdCardInfo.u32BlockSize;
|
||||
block_param->dev_block.block_size = gSdHandle.stcSdCardInfo.u32BlockSize;
|
||||
block_param->dev_block.bank_num = gSdHandle.stcSdCardInfo.u32BlockNum;
|
||||
}
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static struct SdioDevDone dev_done =
|
||||
{
|
||||
SdioOpen,
|
||||
SdioClose,
|
||||
SdioWrite,
|
||||
SdioRead,
|
||||
};
|
||||
|
||||
#if defined(FS_VFS) && defined(MOUNT_SDCARD_FS)
|
||||
#include <iot-vfs.h>
|
||||
|
||||
/**
|
||||
* @description: Mount SD card
|
||||
* @return 0
|
||||
*/
|
||||
static int MountSDCardFs(enum FilesystemType fs_type)
|
||||
{
|
||||
if (MountFilesystem(SDIO_BUS_NAME, SDIO_DEVICE_NAME, SDIO_DRIVER_NAME, fs_type, "/") == 0)
|
||||
KPrintf("Sd card mount to '/'");
|
||||
else
|
||||
KPrintf("Sd card mount to '/' failed!");
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static void SdCardAttach(void)
|
||||
{
|
||||
static stc_sd_handle_t *sd_handle = &gSdHandle;
|
||||
|
||||
KPrintf("\r\nCard inserted.\r\n");
|
||||
|
||||
/* Reset and init SDIOC */
|
||||
if (LL_OK != SDIOC_SWReset(sd_handle->SDIOCx, SDIOC_SW_RST_ALL)) {
|
||||
KPrintf("Reset SDIOC failed!\r\n");
|
||||
} else if (LL_OK != SD_Init(sd_handle)) {
|
||||
KPrintf("SD card initialize failed!\r\n");
|
||||
} else {
|
||||
KPrintf("SD card init done!\r\n");
|
||||
}
|
||||
|
||||
#ifdef MOUNT_SDCARD_FS
|
||||
/*mount file system*/
|
||||
MountSDCardFs(MOUNT_SDCARD_FS_TYPE);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void SdCardDetach(void)
|
||||
{
|
||||
/*unmount file system*/
|
||||
KPrintf("\r\nCard detect extracted.\r\n");
|
||||
|
||||
#ifdef MOUNT_SDCARD_FS
|
||||
UnmountFileSystem("/");
|
||||
#endif
|
||||
}
|
||||
|
||||
static uint8 SdCardReadCd(void)
|
||||
{
|
||||
en_pin_state_t sd_cd_state = GPIO_ReadInputPins(SDIOC_CD_PORT, SDIOC_CD_PIN);
|
||||
|
||||
if (PIN_RESET == sd_cd_state) {
|
||||
return 0;
|
||||
} else {
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
static void SdCardTask(void* parameter)
|
||||
{
|
||||
static int sd_card_status = 0;
|
||||
|
||||
while (1) {
|
||||
if (!SdCardReadCd()) {
|
||||
if (!sd_card_status) {
|
||||
SdCardAttach();
|
||||
sd_card_status = 1;
|
||||
}
|
||||
} else {
|
||||
if (sd_card_status) {
|
||||
SdCardDetach();
|
||||
sd_card_status = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef MOUNT_SDCARD
|
||||
int MountSDCard()
|
||||
{
|
||||
int sd_card_task = 0;
|
||||
sd_card_task = KTaskCreate("sd_card", SdCardTask, NONE,
|
||||
SD_CARD_STACK_SIZE, 8);
|
||||
if(sd_card_task < 0) {
|
||||
KPrintf("sd_card_task create failed ...%s %d.\n", __FUNCTION__,__LINE__);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
StartupKTask(sd_card_task);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
#endif
|
||||
|
||||
int HwSdioInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
static struct SdioBus sdio_bus;
|
||||
static struct SdioDriver sdio_drv;
|
||||
static struct SdioHardwareDevice sdio_dev;
|
||||
|
||||
memset(&sdio_bus, 0, sizeof(struct SdioBus));
|
||||
memset(&sdio_drv, 0, sizeof(struct SdioDriver));
|
||||
memset(&sdio_dev, 0, sizeof(struct SdioHardwareDevice));
|
||||
|
||||
SdCardConfig();
|
||||
|
||||
ret = SdioBusInit(&sdio_bus, SDIO_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("Sdio bus init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SdioDriverInit(&sdio_drv, SDIO_DRIVER_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("Sdio driver init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = SdioDriverAttachToBus(SDIO_DRIVER_NAME, SDIO_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("Sdio driver attach error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
sdio_dev.dev_done = &dev_done;
|
||||
sdio_dev.haldev.dev_block_control = SdioControl;
|
||||
ret = SdioDeviceRegister(&sdio_dev, SDIO_DEVICE_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("Sdio device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = SdioDeviceAttachToBus(SDIO_DEVICE_NAME, SDIO_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("Sdio device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,42 @@
|
|||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI1
|
||||
bool "Using spi1"
|
||||
default y
|
||||
|
||||
if BSP_USING_SPI1
|
||||
config SPI_BUS_NAME_1
|
||||
string "spi bus 1 name"
|
||||
default "spi1"
|
||||
config SPI_1_DEVICE_NAME_0
|
||||
string "spi bus 1 device 0 name"
|
||||
default "spi1_dev0"
|
||||
config SPI_1_DRV_NAME
|
||||
string "spi bus 1 driver name"
|
||||
default "spi1_drv"
|
||||
|
||||
menuconfig RESOURCES_SPI_LORA
|
||||
bool "Using spi lora function"
|
||||
default n
|
||||
if RESOURCES_SPI_LORA
|
||||
config SX12XX_DEVICE_NAME
|
||||
string "SX12XX(SX1278 SX1276) lora device name"
|
||||
default "spi1_lora"
|
||||
endif
|
||||
endif
|
||||
|
||||
config BSP_USING_SPI6
|
||||
bool "Using spi6"
|
||||
default n
|
||||
|
||||
if BSP_USING_SPI6
|
||||
config SPI_BUS_NAME_6
|
||||
string "spi bus 6 name"
|
||||
default "spi6"
|
||||
config SPI_6_DEVICE_NAME_0
|
||||
string "spi bus 6 device 0 name"
|
||||
default "spi6_dev0"
|
||||
config SPI_6_DRV_NAME
|
||||
string "spi bus 6 driver name"
|
||||
default "spi6_drv"
|
||||
endif
|
||||
endif
|
|
@ -0,0 +1,8 @@
|
|||
SRC_FILES := connect_spi.c
|
||||
|
||||
ifeq ($(CONFIG_RESOURCES_SPI_LORA),y)
|
||||
SRC_DIR := third_party_spi_lora
|
||||
SRC_FILES += connect_lora_spi.c
|
||||
endif
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,469 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_lora_spi.c
|
||||
* @brief support to register spi lora pointer and function
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-10-31
|
||||
*/
|
||||
|
||||
#include <connect_spi_lora.h>
|
||||
|
||||
/* RST = PI02 */
|
||||
#define LORA_RST_PORT (GPIO_PORT_I)
|
||||
#define LORA_RST_PIN (GPIO_PIN_02)
|
||||
|
||||
static struct HardwareDev *g_spi_lora_dev;
|
||||
tRadioDriver *Radio = NONE;
|
||||
|
||||
void SX1276InitIo(void)
|
||||
{
|
||||
stc_gpio_init_t stcGpioInit;
|
||||
|
||||
(void)GPIO_StructInit(&stcGpioInit);
|
||||
stcGpioInit.u16PinState = PIN_STAT_RST;
|
||||
stcGpioInit.u16PinDir = PIN_DIR_OUT;
|
||||
(void)GPIO_Init(LORA_RST_PORT, LORA_RST_PIN, &stcGpioInit);
|
||||
}
|
||||
|
||||
inline void SX1276WriteRxTx(uint8_t txEnable)
|
||||
{
|
||||
if (txEnable != 0) {
|
||||
/*to do*/
|
||||
} else {
|
||||
/*to do*/
|
||||
}
|
||||
}
|
||||
|
||||
void SX1276SetReset(uint8_t state)
|
||||
{
|
||||
if (state == RADIO_RESET_ON) {
|
||||
GPIO_ResetPins(LORA_RST_PORT, LORA_RST_PIN);
|
||||
} else {
|
||||
stc_gpio_init_t stcGpioInit;
|
||||
(void)GPIO_StructInit(&stcGpioInit);
|
||||
stcGpioInit.u16PinDir = PIN_DIR_IN;
|
||||
(void)GPIO_Init(LORA_RST_PORT, LORA_RST_PIN, &stcGpioInit);
|
||||
}
|
||||
}
|
||||
|
||||
//Not-necessary Function
|
||||
uint8_t SX1276ReadDio0(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint8_t SX1276ReadDio1(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint8_t SX1276ReadDio2(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint8_t SX1276ReadDio3(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint8_t SX1276ReadDio4(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint8_t SX1276ReadDio5(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
void SX1276WriteBuffer(uint8_t addr, uint8_t *buffer, uint8_t size)
|
||||
{
|
||||
struct BusBlockWriteParam write_param;
|
||||
uint8 write_addr = addr | 0x80;
|
||||
|
||||
BusDevOpen(g_spi_lora_dev);
|
||||
|
||||
write_param.buffer = (void *)&write_addr;
|
||||
write_param.size = 1;
|
||||
BusDevWriteData(g_spi_lora_dev, &write_param);
|
||||
|
||||
write_param.buffer = (void *)buffer;
|
||||
write_param.size = size;
|
||||
BusDevWriteData(g_spi_lora_dev, &write_param);
|
||||
|
||||
BusDevClose(g_spi_lora_dev);
|
||||
}
|
||||
|
||||
void SX1276ReadBuffer(uint8_t addr, uint8_t *buffer, uint8_t size)
|
||||
{
|
||||
struct BusBlockWriteParam write_param;
|
||||
struct BusBlockReadParam read_param;
|
||||
|
||||
uint8 write_addr = addr & 0x7F;
|
||||
|
||||
BusDevOpen(g_spi_lora_dev);
|
||||
|
||||
write_param.buffer = (void *)&write_addr;
|
||||
write_param.size = 1;
|
||||
BusDevWriteData(g_spi_lora_dev, &write_param);
|
||||
|
||||
read_param.buffer = (void *)buffer;
|
||||
read_param.size = size;
|
||||
BusDevReadData(g_spi_lora_dev, &read_param);
|
||||
|
||||
BusDevClose(g_spi_lora_dev);
|
||||
}
|
||||
|
||||
void SX1276WriteFifo(uint8_t *buffer, uint8_t size)
|
||||
{
|
||||
SX1276WriteBuffer(0, buffer, size);
|
||||
}
|
||||
|
||||
void SX1276ReadFifo(uint8_t *buffer, uint8_t size)
|
||||
{
|
||||
SX1276ReadBuffer(0, buffer, size);
|
||||
}
|
||||
|
||||
void SX1276Write(uint8_t addr, uint8_t data)
|
||||
{
|
||||
SX1276WriteBuffer(addr, &data, 1);
|
||||
}
|
||||
|
||||
void SX1276Read(uint8_t addr, uint8_t *data)
|
||||
{
|
||||
SX1276ReadBuffer(addr, data, 1);
|
||||
}
|
||||
|
||||
uint8_t Sx1276SpiCheck(void)
|
||||
{
|
||||
uint8_t test = 0;
|
||||
|
||||
tLoRaSettings settings;
|
||||
SX1276Read(REG_LR_VERSION, &test);
|
||||
KPrintf("version code of the chip is 0x%x\n", test);
|
||||
|
||||
settings.RFFrequency = SX1276LoRaGetRFFrequency();
|
||||
KPrintf("SX1278 Lora parameters are :\nRFFrequency is %d\n", settings.RFFrequency);
|
||||
|
||||
settings.Power = SX1276LoRaGetRFPower();
|
||||
KPrintf("RFPower is %d\n",settings.Power);
|
||||
|
||||
settings.SignalBw = SX1276LoRaGetSignalBandwidth();
|
||||
KPrintf("SignalBw is %d\n",settings.SignalBw);
|
||||
|
||||
settings.SpreadingFactor = SX1276LoRaGetSpreadingFactor();
|
||||
KPrintf("SpreadingFactor is %d\n",settings.SpreadingFactor);
|
||||
|
||||
/*SPI confirm*/
|
||||
SX1276Write(REG_LR_HOPPERIOD, 0x91);
|
||||
SX1276Read(REG_LR_HOPPERIOD, &test);
|
||||
if (test != 0x91) {
|
||||
return 0;
|
||||
}
|
||||
return test;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function supports to write data to the lora.
|
||||
*
|
||||
* @param dev lora dev descriptor
|
||||
* @param write_param lora dev write datacfg param
|
||||
*/
|
||||
static uint32 SpiLoraWrite(void *dev, struct BusBlockWriteParam *write_param)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
NULL_PARAM_CHECK(write_param);
|
||||
|
||||
if (write_param->size > 256) {
|
||||
KPrintf("SpiLoraWrite ERROR:The message is too long!\n");
|
||||
return ERROR;
|
||||
} else {
|
||||
SX1276SetTxPacket(write_param->buffer, write_param->size);
|
||||
while(SX1276Process() != RF_TX_DONE);
|
||||
KPrintf("SpiLoraWrite success!\n");
|
||||
}
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function supports to read data from the lora.
|
||||
*
|
||||
* @param dev lora dev descriptor
|
||||
* @param read_param lora dev read datacfg param
|
||||
*/
|
||||
static uint32 SpiLoraRead(void *dev, struct BusBlockReadParam *read_param)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
NULL_PARAM_CHECK(read_param);
|
||||
|
||||
int read_times = 100;
|
||||
|
||||
SX1276StartRx();
|
||||
KPrintf("SpiLoraRead Ready!\n");
|
||||
|
||||
while (read_times) {
|
||||
if (SX1276Process() != RF_RX_DONE) {
|
||||
read_times --;
|
||||
MdelayKTask(500);
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (read_times > 0) {
|
||||
SX1276GetRxPacket(read_param->buffer, (uint16 *)&read_param->read_length);
|
||||
} else {
|
||||
read_param->read_length = 0;
|
||||
}
|
||||
|
||||
return read_param->read_length;
|
||||
}
|
||||
|
||||
static uint32 SpiLoraOpen(void *dev)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
|
||||
KPrintf("SpiLoraOpen start\n");
|
||||
|
||||
x_err_t ret = EOK;
|
||||
static x_bool lora_init_status = RET_FALSE;
|
||||
|
||||
if (RET_TRUE == lora_init_status) {
|
||||
return EOK;
|
||||
}
|
||||
|
||||
struct HardwareDev *haldev = (struct HardwareDev *)dev;
|
||||
|
||||
struct SpiHardwareDevice *lora_dev = CONTAINER_OF(haldev, struct SpiHardwareDevice, haldev);
|
||||
NULL_PARAM_CHECK(lora_dev);
|
||||
|
||||
SpiLoraDeviceType spi_lora_dev = CONTAINER_OF(lora_dev, struct SpiLoraDevice, lora_dev);
|
||||
NULL_PARAM_CHECK(spi_lora_dev);
|
||||
|
||||
struct Driver *spi_drv = spi_lora_dev->spi_dev->haldev.owner_bus->owner_driver;
|
||||
|
||||
struct BusConfigureInfo configure_info;
|
||||
struct SpiMasterParam spi_master_param;
|
||||
spi_master_param.spi_data_bit_width = 8;
|
||||
spi_master_param.spi_work_mode = SPI_MODE_0 | SPI_MSB;
|
||||
|
||||
configure_info.configure_cmd = OPE_CFG;
|
||||
configure_info.private_data = (void *)&spi_master_param;
|
||||
ret = BusDrvConfigure(spi_drv, &configure_info);
|
||||
if (ret) {
|
||||
KPrintf("spi drv OPE_CFG error drv %8p cfg %8p\n", spi_drv, &spi_master_param);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
configure_info.configure_cmd = OPE_INT;
|
||||
ret = BusDrvConfigure(spi_drv, &configure_info);
|
||||
if (ret) {
|
||||
KPrintf("spi drv OPE_INT error drv %8p\n", spi_drv);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
SX1276Init();
|
||||
|
||||
if (0x91 != Sx1276SpiCheck()) {
|
||||
KPrintf("LoRa check failed!\n!");
|
||||
} else {
|
||||
Radio = RadioDriverInit();
|
||||
KPrintf("LoRa check ok!\nNote: The length of the message that can be sent in a single time is 256 characters\n");
|
||||
}
|
||||
|
||||
lora_init_status = RET_TRUE;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint32 SpiLoraClose(void *dev)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static const struct LoraDevDone lora_done =
|
||||
{
|
||||
.open = SpiLoraOpen,
|
||||
.close = SpiLoraClose,
|
||||
.write = SpiLoraWrite,
|
||||
.read = SpiLoraRead,
|
||||
};
|
||||
|
||||
/**
|
||||
* This function supports to init spi_lora_dev
|
||||
*
|
||||
* @param bus_name spi bus name
|
||||
* @param dev_name spi dev name
|
||||
* @param drv_name spi drv name
|
||||
* @param lora_name lora dev name
|
||||
*/
|
||||
SpiLoraDeviceType SpiLoraInit(char *bus_name, char *dev_name, char *drv_name, char *lora_name)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev_name);
|
||||
NULL_PARAM_CHECK(drv_name);
|
||||
NULL_PARAM_CHECK(lora_name);
|
||||
NULL_PARAM_CHECK(bus_name);
|
||||
|
||||
x_err_t ret;
|
||||
static HardwareDevType haldev;
|
||||
|
||||
haldev = SpiDeviceFind(dev_name, TYPE_SPI_DEV);
|
||||
if (NONE == haldev) {
|
||||
KPrintf("SpiLoraInit find spi haldev %s error! \n", dev_name);
|
||||
return NONE;
|
||||
}
|
||||
|
||||
SpiLoraDeviceType spi_lora_dev = (SpiLoraDeviceType)malloc(sizeof(struct SpiLoraDevice));
|
||||
if (NONE == spi_lora_dev) {
|
||||
KPrintf("SpiLoraInit malloc spi_lora_dev failed\n");
|
||||
free(spi_lora_dev);
|
||||
return NONE;
|
||||
}
|
||||
|
||||
memset(spi_lora_dev, 0, sizeof(struct SpiLoraDevice));
|
||||
|
||||
spi_lora_dev->spi_dev = CONTAINER_OF(haldev, struct SpiHardwareDevice, haldev);
|
||||
|
||||
spi_lora_dev->lora_dev.spi_dev_flag = RET_TRUE;
|
||||
spi_lora_dev->lora_dev.haldev.dev_done = (struct HalDevDone *)&lora_done;
|
||||
|
||||
struct Driver *spi_driver = SpiDriverFind(drv_name, TYPE_SPI_DRV);
|
||||
if (NONE == spi_driver) {
|
||||
KPrintf("SpiLoraInit find spi driver %s error! \n", drv_name);
|
||||
free(spi_lora_dev);
|
||||
return NONE;
|
||||
}
|
||||
|
||||
//spi drv get spi dev param (SpiDeviceParam)
|
||||
spi_driver->private_data = spi_lora_dev->spi_dev->haldev.private_data;
|
||||
spi_lora_dev->spi_dev->haldev.owner_bus->owner_driver = spi_driver;
|
||||
|
||||
ret = SpiDeviceRegister(&spi_lora_dev->lora_dev, spi_lora_dev->spi_dev->haldev.private_data, lora_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("SpiLoraInit SpiDeviceRegister device %s error %d\n", lora_name, ret);
|
||||
free(spi_lora_dev);
|
||||
return NONE;
|
||||
}
|
||||
|
||||
ret = SpiDeviceAttachToBus(lora_name, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("SpiLoraInit SpiDeviceAttachToBus device %s error %d\n", lora_name, ret);
|
||||
free(spi_lora_dev);
|
||||
return NONE;
|
||||
}
|
||||
|
||||
g_spi_lora_dev = &spi_lora_dev->spi_dev->haldev;
|
||||
|
||||
return spi_lora_dev;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function supports to release spi_lora_dev
|
||||
*
|
||||
* @param spi_lora_dev spi lora descriptor
|
||||
*/
|
||||
uint32 SpiLoraRelease(SpiLoraDeviceType spi_lora_dev)
|
||||
{
|
||||
NULL_PARAM_CHECK(spi_lora_dev);
|
||||
|
||||
x_err_t ret;
|
||||
|
||||
DeviceDeleteFromBus(spi_lora_dev->lora_dev.haldev.owner_bus, &spi_lora_dev->lora_dev.haldev);
|
||||
|
||||
free(spi_lora_dev);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
int LoraSx12xxSpiDeviceInit(void)
|
||||
{
|
||||
#ifdef BSP_USING_SPI1
|
||||
if (NONE == SpiLoraInit(SPI_BUS_NAME_1, SPI_1_DEVICE_NAME_0, SPI_1_DRV_NAME, SX12XX_DEVICE_NAME)) {
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
#define LORA_TEST
|
||||
#ifdef LORA_TEST
|
||||
/*Just for lora test*/
|
||||
static struct Bus *bus;
|
||||
static struct HardwareDev *dev;
|
||||
|
||||
void LoraOpen(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
bus = BusFind(SPI_BUS_NAME_1);
|
||||
dev = BusFindDevice(bus, SX12XX_DEVICE_NAME);
|
||||
|
||||
ret = SpiLoraOpen(dev);
|
||||
if (EOK != ret) {
|
||||
KPrintf("LoRa init failed\n");
|
||||
return;
|
||||
}
|
||||
|
||||
KPrintf("LoRa init succeed\n");
|
||||
|
||||
return;
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
|
||||
LoraOpen, LoraOpen, open lora device and read parameters );
|
||||
|
||||
static void LoraReceive(void)
|
||||
{
|
||||
uint32 read_length = 0;
|
||||
struct BusBlockReadParam read_param;
|
||||
memset(&read_param, 0, sizeof(struct BusBlockReadParam));
|
||||
|
||||
read_param.buffer = malloc(SPI_LORA_BUFFER_SIZE);
|
||||
|
||||
read_length = SpiLoraRead(dev, &read_param);
|
||||
|
||||
KPrintf("LoraReceive length %d\n", read_length);
|
||||
for (int i = 0; i < read_length; i ++) {
|
||||
KPrintf("i %d data 0x%x\n", i, ((uint8 *)read_param.buffer)[i]);
|
||||
}
|
||||
|
||||
free(read_param.buffer);
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0),
|
||||
LoraReceive, LoraReceive, lora wait message );
|
||||
|
||||
static void LoraSend(int argc, char *argv[])
|
||||
{
|
||||
char Msg[SPI_LORA_BUFFER_SIZE] = {0};
|
||||
struct BusBlockWriteParam write_param;
|
||||
memset(&write_param, 0, sizeof(struct BusBlockWriteParam));
|
||||
|
||||
if (argc == 2) {
|
||||
strncpy(Msg, argv[1], SPI_LORA_BUFFER_SIZE);
|
||||
write_param.buffer = Msg;
|
||||
write_param.size = strlen(Msg);
|
||||
|
||||
KPrintf("LoraSend data %s length %d\n", Msg, strlen(Msg));
|
||||
|
||||
SpiLoraWrite(dev, &write_param);
|
||||
}
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
|
||||
LoraSend, LoraSend, lora send message );
|
||||
#endif
|
|
@ -0,0 +1,585 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_spi.c
|
||||
* @brief support hc32f4a0-board spi function and register to bus framework
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-10-17
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: connect_spi.c
|
||||
Description: support hc32f4a0-board spi function and register to bus framework
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2022-10-17
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support hc32f4a0-board spi configure, write and read
|
||||
2. support hc32f4a0-board spi bus device and driver register
|
||||
3. SPI1 for LoRa, SPI6 using J12-pin-header to connect
|
||||
*************************************************/
|
||||
|
||||
#include <connect_spi.h>
|
||||
|
||||
#define SPI1_MASTER_SLAVE_MODE (SPI_MASTER)
|
||||
|
||||
/* SPI1 definition */
|
||||
#define SPI1_UNIT (CM_SPI1)
|
||||
#define SPI1_CLK (FCG1_PERIPH_SPI1)
|
||||
|
||||
/* SS = PI01 */
|
||||
#define SPI1_SS_PORT (GPIO_PORT_I)
|
||||
#define SPI1_SS_PIN (GPIO_PIN_01)
|
||||
/* SCK = PH14 */
|
||||
#define SPI1_SCK_PORT (GPIO_PORT_H)
|
||||
#define SPI1_SCK_PIN (GPIO_PIN_14)
|
||||
#define SPI1_SCK_FUNC (GPIO_FUNC_40)
|
||||
/* MOSI = PI00 */
|
||||
#define SPI1_MOSI_PORT (GPIO_PORT_I)
|
||||
#define SPI1_MOSI_PIN (GPIO_PIN_00)
|
||||
#define SPI1_MOSI_FUNC (GPIO_FUNC_41)
|
||||
/* MISO = PH15 */
|
||||
#define SPI1_MISO_PORT (GPIO_PORT_H)
|
||||
#define SPI1_MISO_PIN (GPIO_PIN_15)
|
||||
#define SPI1_MISO_FUNC (GPIO_FUNC_42)
|
||||
|
||||
#define SPI1_DEVICE_SLAVE_ID_0 0
|
||||
|
||||
/* SPI6 definition */
|
||||
#define SPI6_UNIT (CM_SPI6)
|
||||
#define SPI6_CLK (FCG1_PERIPH_SPI6)
|
||||
|
||||
/* SS = PI01 */
|
||||
#define SPI6_SS_PORT (GPIO_PORT_I)
|
||||
#define SPI6_SS_PIN (GPIO_PIN_01)
|
||||
/* SCK = PH14 */
|
||||
#define SPI6_SCK_PORT (GPIO_PORT_H)
|
||||
#define SPI6_SCK_PIN (GPIO_PIN_14)
|
||||
#define SPI6_SCK_FUNC (GPIO_FUNC_40)
|
||||
/* MOSI = PI00 */
|
||||
#define SPI6_MOSI_PORT (GPIO_PORT_I)
|
||||
#define SPI6_MOSI_PIN (GPIO_PIN_00)
|
||||
#define SPI6_MOSI_FUNC (GPIO_FUNC_41)
|
||||
/* MISO = PH15 */
|
||||
#define SPI6_MISO_PORT (GPIO_PORT_H)
|
||||
#define SPI6_MISO_PIN (GPIO_PIN_15)
|
||||
#define SPI6_MISO_FUNC (GPIO_FUNC_42)
|
||||
|
||||
#define SPI6_DEVICE_SLAVE_ID_0 0
|
||||
|
||||
static void HwSpiEnable(CM_SPI_TypeDef *SPIx)
|
||||
{
|
||||
/* Check if the SPI is already enabled */
|
||||
if (SPI_CR1_SPE != (SPIx->CR1 & SPI_CR1_SPE)) {
|
||||
SPI_Cmd(SPIx, ENABLE);
|
||||
}
|
||||
}
|
||||
|
||||
/*Init the spi sdk intetface */
|
||||
static uint32 SpiSdkInit(struct SpiDriver *spi_drv)
|
||||
{
|
||||
NULL_PARAM_CHECK(spi_drv);
|
||||
|
||||
stc_spi_init_t stcSpiInit;
|
||||
stc_gpio_init_t stcGpioInit;
|
||||
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_drv->driver.private_data);
|
||||
|
||||
#ifdef BSP_USING_SPI1
|
||||
/* Configure Port */
|
||||
(void)GPIO_StructInit(&stcGpioInit);
|
||||
stcGpioInit.u16PinState = PIN_STAT_RST;
|
||||
stcGpioInit.u16PinDir = PIN_DIR_OUT;
|
||||
(void)GPIO_Init(SPI1_SS_PORT, SPI1_SS_PIN, &stcGpioInit);
|
||||
GPIO_SetPins(SPI1_SS_PORT, SPI1_SS_PIN);
|
||||
|
||||
GPIO_SetFunc(SPI1_SCK_PORT, SPI1_SCK_PIN, SPI1_SCK_FUNC);
|
||||
GPIO_SetFunc(SPI1_MOSI_PORT, SPI1_MOSI_PIN, SPI1_MOSI_FUNC);
|
||||
GPIO_SetFunc(SPI1_MISO_PORT, SPI1_MISO_PIN, SPI1_MISO_FUNC);
|
||||
|
||||
/* Configuration SPI */
|
||||
FCG_Fcg1PeriphClockCmd(SPI1_CLK, ENABLE);
|
||||
SPI_StructInit(&stcSpiInit);
|
||||
|
||||
stcSpiInit.u32WireMode = SPI_4_WIRE;
|
||||
stcSpiInit.u32TransMode = SPI_FULL_DUPLEX;
|
||||
stcSpiInit.u32MasterSlave = SPI1_MASTER_SLAVE_MODE;
|
||||
stcSpiInit.u32Parity = SPI_PARITY_INVD;
|
||||
|
||||
if (SPI_MODE_0 == dev_param->spi_master_param->spi_work_mode & 0x3) {
|
||||
stcSpiInit.u32SpiMode = SPI_MD_0;
|
||||
} else if (SPI_MODE_1 == dev_param->spi_master_param->spi_work_mode & 0x3) {
|
||||
stcSpiInit.u32SpiMode = SPI_MD_1;
|
||||
} else if (SPI_MODE_2 == dev_param->spi_master_param->spi_work_mode & 0x3) {
|
||||
stcSpiInit.u32SpiMode = SPI_MD_2;
|
||||
} else if (SPI_MODE_3 == dev_param->spi_master_param->spi_work_mode & 0x3) {
|
||||
stcSpiInit.u32SpiMode = SPI_MD_3;
|
||||
}
|
||||
|
||||
stcSpiInit.u32BaudRatePrescaler = SPI_BR_CLK_DIV64;
|
||||
|
||||
if (8 == dev_param->spi_master_param->spi_data_bit_width) {
|
||||
stcSpiInit.u32DataBits = SPI_DATA_SIZE_8BIT;
|
||||
} else if (7 == dev_param->spi_master_param->spi_data_bit_width) {
|
||||
stcSpiInit.u32DataBits = SPI_DATA_SIZE_7BIT;
|
||||
}
|
||||
|
||||
if (SPI_LSB == dev_param->spi_master_param->spi_work_mode & 0x4) {
|
||||
stcSpiInit.u32FirstBit = SPI_FIRST_LSB;
|
||||
} else if(SPI_MSB == dev_param->spi_master_param->spi_work_mode & 0x4) {
|
||||
stcSpiInit.u32FirstBit = SPI_FIRST_MSB;
|
||||
}
|
||||
|
||||
stcSpiInit.u32FrameLevel = SPI_1_FRAME;
|
||||
|
||||
(void)SPI_Init(SPI1_UNIT, &stcSpiInit);
|
||||
SPI_Cmd(SPI1_UNIT, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI6
|
||||
/* Configure Port */
|
||||
(void)GPIO_StructInit(&stcGpioInit);
|
||||
stcGpioInit.u16PinState = PIN_STAT_RST;
|
||||
stcGpioInit.u16PinDir = PIN_DIR_OUT;
|
||||
(void)GPIO_Init(SPI6_SS_PORT, SPI6_SS_PIN, &stcGpioInit);
|
||||
GPIO_SetPins(SPI6_SS_PORT, SPI6_SS_PIN);
|
||||
|
||||
GPIO_SetFunc(SPI6_SCK_PORT, SPI6_SCK_PIN, SPI6_SCK_FUNC);
|
||||
GPIO_SetFunc(SPI6_MOSI_PORT, SPI6_MOSI_PIN, SPI6_MOSI_FUNC);
|
||||
GPIO_SetFunc(SPI6_MISO_PORT, SPI6_MISO_PIN, SPI6_MISO_FUNC);
|
||||
|
||||
/* Configuration SPI */
|
||||
FCG_Fcg1PeriphClockCmd(SPI6_CLK, ENABLE);
|
||||
SPI_StructInit(&stcSpiInit);
|
||||
|
||||
stcSpiInit.u32WireMode = SPI_4_WIRE;
|
||||
stcSpiInit.u32TransMode = SPI_FULL_DUPLEX;
|
||||
stcSpiInit.u32MasterSlave = SPI1_MASTER_SLAVE_MODE;
|
||||
stcSpiInit.u32Parity = SPI_PARITY_INVD;
|
||||
|
||||
if (SPI_MODE_0 == dev_param->spi_master_param->spi_work_mode & 0x3) {
|
||||
stcSpiInit.u32SpiMode = SPI_MD_0;
|
||||
} else if (SPI_MODE_1 == dev_param->spi_master_param->spi_work_mode & 0x3) {
|
||||
stcSpiInit.u32SpiMode = SPI_MD_1;
|
||||
} else if (SPI_MODE_2 == dev_param->spi_master_param->spi_work_mode & 0x3) {
|
||||
stcSpiInit.u32SpiMode = SPI_MD_2;
|
||||
} else if (SPI_MODE_3 == dev_param->spi_master_param->spi_work_mode & 0x3) {
|
||||
stcSpiInit.u32SpiMode = SPI_MD_3;
|
||||
}
|
||||
|
||||
stcSpiInit.u32BaudRatePrescaler = SPI_BR_CLK_DIV64;
|
||||
|
||||
if (8 == dev_param->spi_master_param->spi_data_bit_width) {
|
||||
stcSpiInit.u32DataBits = SPI_DATA_SIZE_8BIT;
|
||||
} else if (7 == dev_param->spi_master_param->spi_data_bit_width) {
|
||||
stcSpiInit.u32DataBits = SPI_DATA_SIZE_7BIT;
|
||||
}
|
||||
|
||||
if (SPI_LSB == dev_param->spi_master_param->spi_work_mode & 0x4) {
|
||||
stcSpiInit.u32FirstBit = SPI_FIRST_LSB;
|
||||
} else if(SPI_MSB == dev_param->spi_master_param->spi_work_mode & 0x4) {
|
||||
stcSpiInit.u32FirstBit = SPI_FIRST_MSB;
|
||||
}
|
||||
|
||||
stcSpiInit.u32FrameLevel = SPI_1_FRAME;
|
||||
|
||||
(void)SPI_Init(SPI6_UNIT, &stcSpiInit);
|
||||
SPI_Cmd(SPI6_UNIT, ENABLE);
|
||||
#endif
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 SpiSdkCfg(struct SpiDriver *spi_drv, struct SpiMasterParam *spi_param)
|
||||
{
|
||||
NULL_PARAM_CHECK(spi_drv);
|
||||
NULL_PARAM_CHECK(spi_param);
|
||||
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_drv->driver.private_data);
|
||||
|
||||
dev_param->spi_master_param = spi_param;
|
||||
dev_param->spi_master_param->spi_work_mode = dev_param->spi_master_param->spi_work_mode & SPI_MODE_MASK;
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
/*Configure the spi device param, make sure struct (configure_info->private_data) = (SpiMasterParam)*/
|
||||
static uint32 SpiDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
x_err_t ret = EOK;
|
||||
struct SpiDriver *spi_drv = (struct SpiDriver *)drv;
|
||||
struct SpiMasterParam *spi_param;
|
||||
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
ret = SpiSdkInit(spi_drv);
|
||||
break;
|
||||
case OPE_CFG:
|
||||
spi_param = (struct SpiMasterParam *)configure_info->private_data;
|
||||
ret = SpiSdkCfg(spi_drv, spi_param);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint32 SpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
|
||||
{
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
|
||||
|
||||
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
|
||||
uint8 cs_gpio_port = dev_param->spi_slave_param->spi_cs_gpio_port;
|
||||
CM_SPI_TypeDef *spi = spi_dev->haldev.owner_bus->private_data;
|
||||
|
||||
int i = 0;
|
||||
uint32 ret = EOK;
|
||||
int32 spi_write_status = 0;
|
||||
|
||||
while (NONE != spi_datacfg) {
|
||||
if (spi_datacfg->spi_chip_select) {
|
||||
GPIO_ResetPins(cs_gpio_port, cs_gpio_pin);
|
||||
}
|
||||
|
||||
if (spi_datacfg->length) {
|
||||
uint8 *tx_buff = x_malloc(spi_datacfg->length);
|
||||
if ((spi_datacfg->tx_buff) && (tx_buff)) {
|
||||
memset(tx_buff, 0, spi_datacfg->length);
|
||||
|
||||
for (i = 0; i < spi_datacfg->length; i++) {
|
||||
tx_buff[i] = ((uint8 *)spi_datacfg->tx_buff)[i];
|
||||
}
|
||||
|
||||
HwSpiEnable(spi);
|
||||
spi_write_status = SPI_Trans(spi, tx_buff, spi_datacfg->length, 1000);
|
||||
|
||||
while (RESET != SPI_GetStatus(spi, SPI_FLAG_IDLE));
|
||||
|
||||
if (LL_OK == spi_write_status) {
|
||||
ret = ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
if (tx_buff) {
|
||||
x_free(tx_buff);
|
||||
}
|
||||
|
||||
SPI_ClearStatus(spi, SPI_FLAG_CLR_ALL | SPI_FLAG_RX_BUF_FULL);
|
||||
}
|
||||
|
||||
if (spi_datacfg->spi_cs_release) {
|
||||
GPIO_SetPins(cs_gpio_port, cs_gpio_pin);
|
||||
}
|
||||
|
||||
spi_datacfg = spi_datacfg->next;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint32 SpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
|
||||
{
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
|
||||
|
||||
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
|
||||
uint8 cs_gpio_port = dev_param->spi_slave_param->spi_cs_gpio_port;
|
||||
CM_SPI_TypeDef *spi = spi_dev->haldev.owner_bus->private_data;
|
||||
|
||||
int i = 0;
|
||||
int32 spi_read_status = 0;
|
||||
uint32 spi_read_length = 0;
|
||||
|
||||
while (NONE != spi_datacfg) {
|
||||
if (spi_datacfg->spi_chip_select) {
|
||||
GPIO_ResetPins(cs_gpio_port, cs_gpio_pin);
|
||||
}
|
||||
|
||||
if (spi_datacfg->length) {
|
||||
uint8_t *rx_buff = x_malloc(spi_datacfg->length);
|
||||
if ((spi_datacfg->rx_buff) && (rx_buff)) {
|
||||
memset(rx_buff, 0xFF, spi_datacfg->length);
|
||||
|
||||
HwSpiEnable(spi);
|
||||
spi_read_status = SPI_Receive(spi, rx_buff, spi_datacfg->length, 1000);
|
||||
|
||||
while (RESET != SPI_GetStatus(spi, SPI_FLAG_IDLE));
|
||||
if (LL_OK == spi_read_status) {
|
||||
for (i = 0; i < spi_datacfg->length; i++) {
|
||||
((uint8_t *)spi_datacfg->rx_buff)[i] = rx_buff[i];
|
||||
}
|
||||
}
|
||||
}
|
||||
if (rx_buff) {
|
||||
x_free(rx_buff);
|
||||
}
|
||||
|
||||
SPI_ClearStatus(spi, SPI_FLAG_CLR_ALL | SPI_FLAG_RX_BUF_FULL);
|
||||
}
|
||||
|
||||
if (spi_datacfg->spi_cs_release) {
|
||||
GPIO_SetPins(cs_gpio_port, cs_gpio_pin);
|
||||
}
|
||||
|
||||
spi_read_length += spi_datacfg->length;
|
||||
spi_datacfg = spi_datacfg->next;
|
||||
}
|
||||
|
||||
return spi_read_length;
|
||||
}
|
||||
|
||||
/*manage the spi device operations*/
|
||||
static const struct SpiDevDone spi_dev_done =
|
||||
{
|
||||
.dev_open = NONE,
|
||||
.dev_close = NONE,
|
||||
.dev_write = SpiWriteData,
|
||||
.dev_read = SpiReadData,
|
||||
};
|
||||
|
||||
static int BoardSpiBusInit(struct SpiBus *spi_bus, struct SpiDriver *spi_driver, const char *bus_name, const char *drv_name)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the spi bus */
|
||||
ret = SpiBusInit(spi_bus, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_init SpiBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Init the spi driver*/
|
||||
ret = SpiDriverInit(spi_driver, drv_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_init SpiDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Attach the spi driver to the spi bus*/
|
||||
ret = SpiDriverAttachToBus(drv_name, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_init SpiDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Attach the spi device to the spi bus*/
|
||||
static int BoardSpiDevBend(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
#ifdef SPI_1_DEVICE_NAME_0
|
||||
static struct SpiHardwareDevice spi1_device0;
|
||||
memset(&spi1_device0, 0, sizeof(struct SpiHardwareDevice));
|
||||
|
||||
static struct SpiSlaveParam spi1_slaveparam0;
|
||||
memset(&spi1_slaveparam0, 0, sizeof(struct SpiSlaveParam));
|
||||
|
||||
spi1_slaveparam0.spi_slave_id = SPI1_DEVICE_SLAVE_ID_0;
|
||||
spi1_slaveparam0.spi_cs_gpio_pin = SPI1_SS_PIN;
|
||||
spi1_slaveparam0.spi_cs_gpio_port = SPI1_SS_PORT;
|
||||
|
||||
spi1_device0.spi_param.spi_slave_param = &spi1_slaveparam0;
|
||||
|
||||
spi1_device0.spi_dev_done = &(spi_dev_done);
|
||||
|
||||
ret = SpiDeviceRegister(&spi1_device0, (void *)(&spi1_device0.spi_param), SPI_1_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("BoardSpiDevBend SpiDeviceRegister device %s error %d\n", SPI_1_DEVICE_NAME_0, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SpiDeviceAttachToBus(SPI_1_DEVICE_NAME_0, SPI_BUS_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("BoardSpiDevBend SpiDeviceAttachToBus device %s error %d\n", SPI_1_DEVICE_NAME_0, ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef SPI_6_DEVICE_NAME_0
|
||||
static struct SpiHardwareDevice spi6_device0;
|
||||
memset(&spi6_device0, 0, sizeof(struct SpiHardwareDevice));
|
||||
|
||||
static struct SpiSlaveParam spi6_slaveparam0;
|
||||
memset(&spi6_slaveparam0, 0, sizeof(struct SpiSlaveParam));
|
||||
|
||||
spi6_slaveparam0.spi_slave_id = SPI1_DEVICE_SLAVE_ID_0;
|
||||
spi6_slaveparam0.spi_cs_gpio_pin = SPI6_SS_PIN;
|
||||
spi6_slaveparam0.spi_cs_gpio_port = SPI6_SS_PORT;
|
||||
|
||||
spi6_device0.spi_param.spi_slave_param = &spi6_slaveparam0;
|
||||
|
||||
spi6_device0.spi_dev_done = &(spi_dev_done);
|
||||
|
||||
ret = SpiDeviceRegister(&spi6_device0, (void *)(&spi6_device0.spi_param), SPI_6_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("BoardSpiDevBend SpiDeviceRegister device %s error %d\n", SPI_6_DEVICE_NAME_0, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SpiDeviceAttachToBus(SPI_6_DEVICE_NAME_0, SPI_BUS_NAME_6);
|
||||
if (EOK != ret) {
|
||||
KPrintf("BoardSpiDevBend SpiDeviceAttachToBus device %s error %d\n", SPI_6_DEVICE_NAME_0, ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int HwSpiInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
#ifdef BSP_USING_SPI1
|
||||
static struct SpiBus spi1_bus;
|
||||
memset(&spi1_bus, 0, sizeof(struct SpiBus));
|
||||
|
||||
static struct SpiDriver spi1_driver;
|
||||
memset(&spi1_driver, 0, sizeof(struct SpiDriver));
|
||||
|
||||
spi1_bus.private_data = SPI1_UNIT;
|
||||
spi1_driver.configure = SpiDrvConfigure;
|
||||
|
||||
ret = BoardSpiBusInit(&spi1_bus, &spi1_driver, SPI_BUS_NAME_1, SPI_1_DRV_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("BoardSpiBusInit error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSpiDevBend();
|
||||
if (EOK != ret) {
|
||||
KPrintf("BoardSpiDevBend error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI6
|
||||
static struct SpiBus spi6_bus;
|
||||
memset(&spi6_bus, 0, sizeof(struct SpiBus));
|
||||
|
||||
static struct SpiDriver spi6_driver;
|
||||
memset(&spi6_driver, 0, sizeof(struct SpiDriver));
|
||||
|
||||
spi6_bus.private_data = SPI6_UNIT;
|
||||
spi6_driver.configure = SpiDrvConfigure;
|
||||
|
||||
ret = BoardSpiBusInit(&spi6_bus, &spi6_driver, SPI_BUS_NAME_6, SPI_6_DRV_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("BoardSpiBusInit error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSpiDevBend();
|
||||
if (EOK != ret) {
|
||||
KPrintf("BoardSpiDevBend error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Just for lora test*/
|
||||
static struct Bus *bus;
|
||||
static struct HardwareDev *dev;
|
||||
static struct Driver *drv;
|
||||
|
||||
static uint32 TestSpiLoraOpen(void)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
|
||||
KPrintf("SpiLoraOpen start\n");
|
||||
|
||||
x_err_t ret = EOK;
|
||||
|
||||
struct BusConfigureInfo configure_info;
|
||||
struct SpiMasterParam spi_master_param;
|
||||
spi_master_param.spi_data_bit_width = 8;
|
||||
spi_master_param.spi_work_mode = SPI_MODE_0 | SPI_MSB;
|
||||
|
||||
configure_info.configure_cmd = OPE_CFG;
|
||||
configure_info.private_data = (void *)&spi_master_param;
|
||||
ret = BusDrvConfigure(drv, &configure_info);
|
||||
if (ret) {
|
||||
KPrintf("spi drv OPE_CFG error drv %8p cfg %8p\n", drv, &spi_master_param);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
configure_info.configure_cmd = OPE_INT;
|
||||
ret = BusDrvConfigure(drv, &configure_info);
|
||||
if (ret) {
|
||||
KPrintf("spi drv OPE_INT error drv %8p\n", drv);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void TestSpiRead(void)
|
||||
{
|
||||
struct BusBlockWriteParam write_param;
|
||||
struct BusBlockReadParam read_param;
|
||||
|
||||
uint8 write_addr = 0x06 & 0x7F;
|
||||
uint8 read_data = 0;
|
||||
|
||||
BusDevOpen(dev);
|
||||
|
||||
write_param.buffer = (void *)&write_addr;
|
||||
write_param.size = 1;
|
||||
BusDevWriteData(dev, &write_param);
|
||||
|
||||
read_param.buffer = (void *)&read_data;
|
||||
read_param.size = 1;
|
||||
BusDevReadData(dev, &read_param);
|
||||
|
||||
BusDevClose(dev);
|
||||
|
||||
KPrintf("read data from lora 0x06 register, receive data 0x%x\n", read_data);
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
|
||||
TestSpiRead, TestSpiRead, read data from lora register);
|
||||
|
||||
void TestLoraOpen(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
bus = BusFind(SPI_BUS_NAME_1);
|
||||
dev = BusFindDevice(bus, SPI_1_DEVICE_NAME_0);
|
||||
drv = BusFindDriver(bus, SPI_1_DRV_NAME);
|
||||
|
||||
bus->match(drv, dev);
|
||||
|
||||
ret = TestSpiLoraOpen();
|
||||
if (EOK != ret) {
|
||||
KPrintf("LoRa init failed\n");
|
||||
return;
|
||||
}
|
||||
|
||||
KPrintf("LoRa init succeed\n");
|
||||
|
||||
return;
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
|
||||
TestLoraOpen, TestLoraOpen, open lora device and read parameters);
|
||||
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
ifeq ($(CONFIG_RESOURCES_SPI_LORA),y)
|
||||
SRC_DIR := sx12xx
|
||||
endif
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,3 @@
|
|||
SRC_DIR := src
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file spi_lora_sx12xx.h
|
||||
* @brief define spi lora driver function
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-10-31
|
||||
*/
|
||||
|
||||
#ifndef SPI_LORA_SX12XX_H
|
||||
#define SPI_LORA_SX12XX_H
|
||||
|
||||
#include <connect_spi_lora.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
uint8_t SX1276ReadDio0(void);
|
||||
uint8_t SX1276ReadDio1(void);
|
||||
uint8_t SX1276ReadDio2(void);
|
||||
uint8_t SX1276ReadDio3(void);
|
||||
uint8_t SX1276ReadDio4(void);
|
||||
uint8_t SX1276ReadDio5(void);
|
||||
|
||||
void SX1276Write(uint8_t addr, uint8_t data);
|
||||
void SX1276Read(uint8_t addr, uint8_t *data);
|
||||
void SX1276WriteBuffer(uint8_t addr, uint8_t *buffer, uint8_t size);
|
||||
void SX1276ReadBuffer(uint8_t addr, uint8_t *buffer, uint8_t size);
|
||||
void SX1276WriteFifo(uint8_t *buffer, uint8_t size);
|
||||
void SX1276ReadFifo(uint8_t *buffer, uint8_t size);
|
||||
void SX1276SetReset(uint8_t state);
|
||||
uint8_t Sx1276SpiCheck(void);
|
||||
void SX1276WriteRxTx(uint8_t txEnable);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,3 @@
|
|||
SRC_DIR := radio
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,3 @@
|
|||
SRC_FILES := radio.c sx1276-Fsk.c sx1276-FskMisc.c sx1276-LoRa.c sx1276-LoRaMisc.c sx1276.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,96 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file platform.h
|
||||
* \brief
|
||||
*
|
||||
* \version 1.0
|
||||
* \date Nov 21 2012
|
||||
* \author Miguel Luis
|
||||
*/
|
||||
/*************************************************
|
||||
File name: platform.h
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
#ifndef __PLATFORM_H__
|
||||
#define __PLATFORM_H__
|
||||
|
||||
#ifndef __GNUC__
|
||||
#define inline
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* Platform definition
|
||||
*/
|
||||
#define Bleeper 3
|
||||
#define SX1243ska 2
|
||||
#define SX12xxEiger 1
|
||||
#define SX12000DVK 0
|
||||
|
||||
/*!
|
||||
* Platform choice. Please uncoment the PLATFORM define and choose your platform
|
||||
* or add/change the PLATFORM definition on the compiler Defines option
|
||||
*/
|
||||
#define PLATFORM SX12xxEiger
|
||||
|
||||
#if( PLATFORM == SX12xxEiger )
|
||||
/*!
|
||||
* Radio choice. Please uncomment the wanted radio and comment the others
|
||||
* or add/change wanted radio definition on the compiler Defines option
|
||||
*/
|
||||
//#define USE_SX1232_RADIO
|
||||
//#define USE_SX1272_RADIO
|
||||
#define USE_SX1276_RADIO
|
||||
//#define USE_SX1243_RADIO
|
||||
|
||||
/*!
|
||||
* Module choice. There are three existing module with the SX1276.
|
||||
* Please set the connected module to the value 1 and set the others to 0
|
||||
*/
|
||||
#ifdef USE_SX1276_RADIO
|
||||
#define MODULE_SX1276RF1IAS 0
|
||||
#define MODULE_SX1276RF1JAS 0
|
||||
#define MODULE_SX1276RF1KAS 1
|
||||
#endif
|
||||
|
||||
#include <spi_lora_sx12xx.h>
|
||||
#define USE_UART 0
|
||||
|
||||
#elif( PLATFORM == SX12000DVK )
|
||||
/*!
|
||||
* Radio choice. Please uncomment the wanted radio and comment the others
|
||||
* or add/change wanted radio definition on the compiler Defines option
|
||||
*/
|
||||
//#define USE_SX1232_RADIO
|
||||
#define USE_SX1272_RADIO
|
||||
//#define USE_SX1276_RADIO
|
||||
//#define USE_SX1243_RADIO
|
||||
|
||||
#include "sx1200dvk/sx1200dvk.h"
|
||||
|
||||
#elif( PLATFORM == SX1243ska )
|
||||
|
||||
#elif( PLATFORM == Bleeper )
|
||||
#define USE_SX1272_RADIO
|
||||
|
||||
#include "bleeper/bleeper.h"
|
||||
#define USE_UART 0
|
||||
|
||||
#else
|
||||
#error "Missing define: Platform (ie. SX12xxEiger)"
|
||||
#endif
|
||||
|
||||
#endif // __PLATFORM_H__
|
|
@ -0,0 +1,75 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file radio.c
|
||||
* \brief Generic radio driver ( radio abstraction )
|
||||
*
|
||||
* \version 2.0.0
|
||||
* \date Nov 21 2012
|
||||
* \author Miguel Luis
|
||||
*
|
||||
* Last modified by Gregory Cristian on Apr 25 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: radio.c
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
#include <stdint.h>
|
||||
#include "platform.h"
|
||||
#include "radio.h"
|
||||
|
||||
#if defined( USE_SX1232_RADIO )
|
||||
#include "sx1232.h"
|
||||
#elif defined( USE_SX1272_RADIO )
|
||||
#include "sx1272.h"
|
||||
#elif defined( USE_SX1276_RADIO )
|
||||
#include "sx1276.h"
|
||||
#else
|
||||
#error "Missing define: USE_XXXXXX_RADIO (ie. USE_SX1272_RADIO)"
|
||||
#endif
|
||||
|
||||
tRadioDriver RadioDriver;
|
||||
|
||||
tRadioDriver* RadioDriverInit( void )
|
||||
{
|
||||
#if defined( USE_SX1232_RADIO )
|
||||
RadioDriver.Init = SX1232Init;
|
||||
RadioDriver.Reset = SX1232Reset;
|
||||
RadioDriver.StartRx = SX1232StartRx;
|
||||
RadioDriver.GetRxPacket = SX1232GetRxPacket;
|
||||
RadioDriver.SetTxPacket = SX1232SetTxPacket;
|
||||
RadioDriver.Process = SX1232Process;
|
||||
#elif defined( USE_SX1272_RADIO )
|
||||
RadioDriver.Init = SX1272Init;
|
||||
RadioDriver.Reset = SX1272Reset;
|
||||
RadioDriver.StartRx = SX1272StartRx;
|
||||
RadioDriver.GetRxPacket = SX1272GetRxPacket;
|
||||
RadioDriver.SetTxPacket = SX1272SetTxPacket;
|
||||
RadioDriver.Process = SX1272Process;
|
||||
#elif defined( USE_SX1276_RADIO )
|
||||
RadioDriver.Init = SX1276Init;
|
||||
RadioDriver.Reset = SX1276Reset;
|
||||
RadioDriver.StartRx = SX1276StartRx;
|
||||
RadioDriver.GetRxPacket = SX1276GetRxPacket;
|
||||
RadioDriver.SetTxPacket = SX1276SetTxPacket;
|
||||
RadioDriver.Process = SX1276Process;
|
||||
RadioDriver.ChannelEmpty = SX1276ChannelEmpty;
|
||||
#else
|
||||
#error "Missing define: USE_XXXXXX_RADIO (ie. USE_SX1272_RADIO)"
|
||||
#endif
|
||||
|
||||
return &RadioDriver;
|
||||
}
|
|
@ -0,0 +1,77 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file radio.h
|
||||
* \brief Generic radio driver ( radio abstraction )
|
||||
*
|
||||
* \version 2.0.B2
|
||||
* \date Nov 21 2012
|
||||
* \author Miguel Luis
|
||||
*
|
||||
* Last modified by Gregory Cristian on Apr 25 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: radio.h
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
|
||||
#ifndef __RADIO_H__
|
||||
#define __RADIO_H__
|
||||
|
||||
/*!
|
||||
* SX1272 and SX1276 General parameters definition
|
||||
*/
|
||||
#define LORA 1 // [0: OFF, 1: ON]
|
||||
|
||||
/*!
|
||||
* RF process function return codes
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
RF_IDLE,
|
||||
RF_BUSY,
|
||||
RF_RX_DONE,
|
||||
RF_RX_TIMEOUT,
|
||||
RF_TX_DONE,
|
||||
RF_TX_TIMEOUT,
|
||||
RF_LEN_ERROR,
|
||||
RF_CHANNEL_EMPTY,
|
||||
RF_CHANNEL_ACTIVITY_DETECTED,
|
||||
}tRFProcessReturnCodes;
|
||||
|
||||
/*!
|
||||
* Radio driver structure defining the different function pointers
|
||||
*/
|
||||
typedef struct sRadioDriver
|
||||
{
|
||||
void ( *Init )( void );
|
||||
void ( *Reset )( void );
|
||||
void ( *StartRx )( void );
|
||||
void ( *GetRxPacket )( void *buffer, uint16_t *size );
|
||||
void ( *SetTxPacket )( const void *buffer, uint16_t size );
|
||||
uint32_t ( *Process )( void );
|
||||
uint32_t ( *ChannelEmpty )(void );
|
||||
}tRadioDriver;
|
||||
|
||||
/*!
|
||||
* \brief Initializes the RadioDriver structure with specific radio
|
||||
* functions.
|
||||
*
|
||||
* \retval radioDriver Pointer to the radio driver variable
|
||||
*/
|
||||
tRadioDriver* RadioDriverInit( void );
|
||||
|
||||
#endif // __RADIO_H__
|
|
@ -0,0 +1,616 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file sx1276.c
|
||||
* \brief SX1276 RF chip driver
|
||||
*
|
||||
* \version 2.0.0
|
||||
* \date May 6 2013
|
||||
* \author Gregory Cristian
|
||||
*
|
||||
* Last modified by Miguel Luis on Jun 19 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: sx1276-Fsk.c
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
|
||||
#include <string.h>
|
||||
#include <math.h>
|
||||
|
||||
#include "platform.h"
|
||||
|
||||
#if defined( USE_SX1276_RADIO )
|
||||
|
||||
#include "radio.h"
|
||||
|
||||
#include "sx1276-Hal.h"
|
||||
#include "sx1276.h"
|
||||
|
||||
#include "sx1276-FskMisc.h"
|
||||
#include "sx1276-Fsk.h"
|
||||
|
||||
// Default settings
|
||||
tFskSettings FskSettings =
|
||||
{
|
||||
870000000, // RFFrequency
|
||||
9600, // Bitrate
|
||||
50000, // Fdev
|
||||
20, // Power
|
||||
100000, // RxBw
|
||||
150000, // RxBwAfc
|
||||
true, // CrcOn
|
||||
true, // AfcOn
|
||||
255 // PayloadLength (set payload size to the maximum for variable mode, else set the exact payload length)
|
||||
};
|
||||
|
||||
/*!
|
||||
* SX1276 FSK registers variable
|
||||
*/
|
||||
tSX1276* SX1276;
|
||||
|
||||
/*!
|
||||
* Local RF buffer for communication support
|
||||
*/
|
||||
static uint8_t RFBuffer[RF_BUFFER_SIZE];
|
||||
|
||||
/*!
|
||||
* Chunk size of data write in buffer
|
||||
*/
|
||||
static uint8_t DataChunkSize = 32;
|
||||
|
||||
|
||||
/*!
|
||||
* RF state machine variable
|
||||
*/
|
||||
static uint8_t RFState = RF_STATE_IDLE;
|
||||
|
||||
/*!
|
||||
* Rx management support variables
|
||||
*/
|
||||
|
||||
/*!
|
||||
* PacketTimeout holds the RF packet timeout
|
||||
* SyncSize = [0..8]
|
||||
* VariableSize = [0;1]
|
||||
* AddressSize = [0;1]
|
||||
* PayloadSize = [0..RF_BUFFER_SIZE]
|
||||
* CrcSize = [0;2]
|
||||
* PacketTimeout = ( ( 8 * ( VariableSize + AddressSize + PayloadSize + CrcSize ) / BR ) * 1000.0 ) + 1
|
||||
* Computed timeout is in miliseconds
|
||||
*/
|
||||
static uint32_t PacketTimeout;
|
||||
|
||||
/*!
|
||||
* Preamble2SyncTimeout
|
||||
* Preamble2SyncTimeout = ( ( 8 * ( PremableSize + SyncSize ) / RFBitrate ) * 1000.0 ) + 1
|
||||
* Computed timeout is in miliseconds
|
||||
*/
|
||||
static uint32_t Preamble2SyncTimeout;
|
||||
|
||||
static bool PreambleDetected = false;
|
||||
static bool SyncWordDetected = false;
|
||||
static bool PacketDetected = false;
|
||||
static uint16_t RxPacketSize = 0;
|
||||
static uint8_t RxBytesRead = 0;
|
||||
static uint8_t TxBytesSent = 0;
|
||||
static double RxPacketRssiValue;
|
||||
static uint32_t RxPacketAfcValue;
|
||||
static uint8_t RxGain = 1;
|
||||
static uint32_t RxTimeoutTimer = 0;
|
||||
static uint32_t Preamble2SyncTimer = 0;
|
||||
|
||||
/*!
|
||||
* Tx management support variables
|
||||
*/
|
||||
static uint16_t TxPacketSize = 0;
|
||||
static uint32_t TxTimeoutTimer = 0;
|
||||
|
||||
void SX1276FskInit( void )
|
||||
{
|
||||
RFState = RF_STATE_IDLE;
|
||||
|
||||
SX1276FskSetDefaults( );
|
||||
|
||||
SX1276ReadBuffer( REG_OPMODE, SX1276Regs + 1, 0x70 - 1 );
|
||||
|
||||
// Set the device in FSK mode and Sleep Mode
|
||||
SX1276->RegOpMode = RF_OPMODE_MODULATIONTYPE_FSK | RF_OPMODE_SLEEP;
|
||||
SX1276Write( REG_OPMODE, SX1276->RegOpMode );
|
||||
|
||||
SX1276->RegPaRamp = RF_PARAMP_MODULATIONSHAPING_01;
|
||||
SX1276Write( REG_PARAMP, SX1276->RegPaRamp );
|
||||
|
||||
SX1276->RegLna = RF_LNA_GAIN_G1;
|
||||
SX1276Write( REG_LNA, SX1276->RegLna );
|
||||
|
||||
if( FskSettings.AfcOn == true )
|
||||
{
|
||||
SX1276->RegRxConfig = RF_RXCONFIG_RESTARTRXONCOLLISION_OFF | RF_RXCONFIG_AFCAUTO_ON |
|
||||
RF_RXCONFIG_AGCAUTO_ON | RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT;
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276->RegRxConfig = RF_RXCONFIG_RESTARTRXONCOLLISION_OFF | RF_RXCONFIG_AFCAUTO_OFF |
|
||||
RF_RXCONFIG_AGCAUTO_ON | RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT;
|
||||
}
|
||||
|
||||
SX1276->RegPreambleLsb = 8;
|
||||
|
||||
SX1276->RegPreambleDetect = RF_PREAMBLEDETECT_DETECTOR_ON | RF_PREAMBLEDETECT_DETECTORSIZE_2 |
|
||||
RF_PREAMBLEDETECT_DETECTORTOL_10;
|
||||
|
||||
SX1276->RegRssiThresh = 0xFF;
|
||||
|
||||
SX1276->RegSyncConfig = RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_ON | RF_SYNCCONFIG_PREAMBLEPOLARITY_AA |
|
||||
RF_SYNCCONFIG_SYNC_ON |
|
||||
RF_SYNCCONFIG_SYNCSIZE_4;
|
||||
|
||||
SX1276->RegSyncValue1 = 0x69;
|
||||
SX1276->RegSyncValue2 = 0x81;
|
||||
SX1276->RegSyncValue3 = 0x7E;
|
||||
SX1276->RegSyncValue4 = 0x96;
|
||||
|
||||
SX1276->RegPacketConfig1 = RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE | RF_PACKETCONFIG1_DCFREE_OFF |
|
||||
( FskSettings.CrcOn << 4 ) | RF_PACKETCONFIG1_CRCAUTOCLEAR_ON |
|
||||
RF_PACKETCONFIG1_ADDRSFILTERING_OFF | RF_PACKETCONFIG1_CRCWHITENINGTYPE_CCITT;
|
||||
SX1276FskGetPacketCrcOn( ); // Update CrcOn on FskSettings
|
||||
|
||||
SX1276->RegPayloadLength = FskSettings.PayloadLength;
|
||||
|
||||
// we can now update the registers with our configuration
|
||||
SX1276WriteBuffer( REG_OPMODE, SX1276Regs + 1, 0x70 - 1 );
|
||||
|
||||
// then we need to set the RF settings
|
||||
SX1276FskSetRFFrequency( FskSettings.RFFrequency );
|
||||
SX1276FskSetBitrate( FskSettings.Bitrate );
|
||||
SX1276FskSetFdev( FskSettings.Fdev );
|
||||
|
||||
SX1276FskSetDccBw( &SX1276->RegRxBw, 0, FskSettings.RxBw );
|
||||
SX1276FskSetDccBw( &SX1276->RegAfcBw, 0, FskSettings.RxBwAfc );
|
||||
SX1276FskSetRssiOffset( 0 );
|
||||
|
||||
#if( ( MODULE_SX1276RF1IAS == 1 ) || ( MODULE_SX1276RF1KAS == 1 ) )
|
||||
if( FskSettings.RFFrequency > 860000000 )
|
||||
{
|
||||
SX1276FskSetPAOutput( RF_PACONFIG_PASELECT_RFO );
|
||||
SX1276FskSetPa20dBm( false );
|
||||
FskSettings.Power = 14;
|
||||
SX1276FskSetRFPower( FskSettings.Power );
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276FskSetPAOutput( RF_PACONFIG_PASELECT_PABOOST );
|
||||
SX1276FskSetPa20dBm( true );
|
||||
FskSettings.Power = 20;
|
||||
SX1276FskSetRFPower( FskSettings.Power );
|
||||
}
|
||||
#elif( MODULE_SX1276RF1JAS == 1 )
|
||||
if( FskSettings.RFFrequency > 860000000 )
|
||||
{
|
||||
SX1276FskSetPAOutput( RF_PACONFIG_PASELECT_PABOOST );
|
||||
SX1276FskSetPa20dBm( true );
|
||||
FskSettings.Power = 20;
|
||||
SX1276FskSetRFPower( FskSettings.Power );
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276FskSetPAOutput( RF_PACONFIG_PASELECT_RFO );
|
||||
SX1276FskSetPa20dBm( false );
|
||||
FskSettings.Power = 14;
|
||||
SX1276FskSetRFPower( FskSettings.Power );
|
||||
}
|
||||
#endif
|
||||
|
||||
SX1276FskSetOpMode( RF_OPMODE_STANDBY );
|
||||
|
||||
// Calibrate the HF
|
||||
SX1276FskRxCalibrate( );
|
||||
}
|
||||
|
||||
void SX1276FskSetDefaults( void )
|
||||
{
|
||||
// REMARK: See SX1276 datasheet for modified default values.
|
||||
|
||||
SX1276Read( REG_VERSION, &SX1276->RegVersion );
|
||||
}
|
||||
|
||||
void SX1276FskSetOpMode( uint8_t opMode )
|
||||
{
|
||||
static uint8_t opModePrev = RF_OPMODE_STANDBY;
|
||||
static bool antennaSwitchTxOnPrev = true;
|
||||
bool antennaSwitchTxOn = false;
|
||||
|
||||
opModePrev = SX1276->RegOpMode & ~RF_OPMODE_MASK;
|
||||
|
||||
if( opMode != opModePrev )
|
||||
{
|
||||
if( opMode == RF_OPMODE_TRANSMITTER )
|
||||
{
|
||||
antennaSwitchTxOn = true;
|
||||
}
|
||||
else
|
||||
{
|
||||
antennaSwitchTxOn = false;
|
||||
}
|
||||
if( antennaSwitchTxOn != antennaSwitchTxOnPrev )
|
||||
{
|
||||
antennaSwitchTxOnPrev = antennaSwitchTxOn;
|
||||
RXTX( antennaSwitchTxOn ); // Antenna switch control
|
||||
}
|
||||
SX1276->RegOpMode = ( SX1276->RegOpMode & RF_OPMODE_MASK ) | opMode;
|
||||
|
||||
SX1276Write( REG_OPMODE, SX1276->RegOpMode );
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t SX1276FskGetOpMode( void )
|
||||
{
|
||||
SX1276Read( REG_OPMODE, &SX1276->RegOpMode );
|
||||
|
||||
return SX1276->RegOpMode & ~RF_OPMODE_MASK;
|
||||
}
|
||||
|
||||
int32_t SX1276FskReadFei( void )
|
||||
{
|
||||
SX1276ReadBuffer( REG_FEIMSB, &SX1276->RegFeiMsb, 2 ); // Reads the FEI value
|
||||
|
||||
return ( int32_t )( double )( ( ( uint16_t )SX1276->RegFeiMsb << 8 ) | ( uint16_t )SX1276->RegFeiLsb ) * ( double )FREQ_STEP;
|
||||
}
|
||||
|
||||
int32_t SX1276FskReadAfc( void )
|
||||
{
|
||||
SX1276ReadBuffer( REG_AFCMSB, &SX1276->RegAfcMsb, 2 ); // Reads the AFC value
|
||||
return ( int32_t )( double )( ( ( uint16_t )SX1276->RegAfcMsb << 8 ) | ( uint16_t )SX1276->RegAfcLsb ) * ( double )FREQ_STEP;
|
||||
}
|
||||
|
||||
uint8_t SX1276FskReadRxGain( void )
|
||||
{
|
||||
SX1276Read( REG_LNA, &SX1276->RegLna );
|
||||
return( SX1276->RegLna >> 5 ) & 0x07;
|
||||
}
|
||||
|
||||
double SX1276FskReadRssi( void )
|
||||
{
|
||||
SX1276Read( REG_RSSIVALUE, &SX1276->RegRssiValue ); // Reads the RSSI value
|
||||
|
||||
return -( double )( ( double )SX1276->RegRssiValue / 2.0 );
|
||||
}
|
||||
|
||||
uint8_t SX1276FskGetPacketRxGain( void )
|
||||
{
|
||||
return RxGain;
|
||||
}
|
||||
|
||||
double SX1276FskGetPacketRssi( void )
|
||||
{
|
||||
return RxPacketRssiValue;
|
||||
}
|
||||
|
||||
uint32_t SX1276FskGetPacketAfc( void )
|
||||
{
|
||||
return RxPacketAfcValue;
|
||||
}
|
||||
|
||||
void SX1276FskStartRx( void )
|
||||
{
|
||||
SX1276FskSetRFState( RF_STATE_RX_INIT );
|
||||
}
|
||||
|
||||
void SX1276FskGetRxPacket( void *buffer, uint16_t *size )
|
||||
{
|
||||
*size = RxPacketSize;
|
||||
RxPacketSize = 0;
|
||||
memcpy( ( void * )buffer, ( void * )RFBuffer, ( size_t )*size );
|
||||
}
|
||||
|
||||
void SX1276FskSetTxPacket( const void *buffer, uint16_t size )
|
||||
{
|
||||
TxPacketSize = size;
|
||||
memcpy( ( void * )RFBuffer, buffer, ( size_t )TxPacketSize );
|
||||
|
||||
RFState = RF_STATE_TX_INIT;
|
||||
}
|
||||
|
||||
// Remark: SX1276 must be fully initialized before calling this function
|
||||
uint16_t SX1276FskGetPacketPayloadSize( void )
|
||||
{
|
||||
uint16_t syncSize;
|
||||
uint16_t variableSize;
|
||||
uint16_t addressSize;
|
||||
uint16_t payloadSize;
|
||||
uint16_t crcSize;
|
||||
|
||||
syncSize = ( SX1276->RegSyncConfig & 0x07 ) + 1;
|
||||
variableSize = ( ( SX1276->RegPacketConfig1 & 0x80 ) == 0x80 ) ? 1 : 0;
|
||||
addressSize = ( ( SX1276->RegPacketConfig1 & 0x06 ) != 0x00 ) ? 1 : 0;
|
||||
payloadSize = SX1276->RegPayloadLength;
|
||||
crcSize = ( ( SX1276->RegPacketConfig1 & 0x10 ) == 0x10 ) ? 2 : 0;
|
||||
|
||||
return syncSize + variableSize + addressSize + payloadSize + crcSize;
|
||||
}
|
||||
|
||||
// Remark: SX1276 must be fully initialized before calling this function
|
||||
uint16_t SX1276FskGetPacketHeaderSize( void )
|
||||
{
|
||||
uint16_t preambleSize;
|
||||
uint16_t syncSize;
|
||||
|
||||
preambleSize = ( ( uint16_t )SX1276->RegPreambleMsb << 8 ) | ( uint16_t )SX1276->RegPreambleLsb;
|
||||
syncSize = ( SX1276->RegSyncConfig & 0x07 ) + 1;
|
||||
|
||||
return preambleSize + syncSize;
|
||||
}
|
||||
|
||||
uint8_t SX1276FskGetRFState( void )
|
||||
{
|
||||
return RFState;
|
||||
}
|
||||
|
||||
void SX1276FskSetRFState( uint8_t state )
|
||||
{
|
||||
RFState = state;
|
||||
}
|
||||
|
||||
uint32_t SX1276FskProcess( void )
|
||||
{
|
||||
uint32_t result = RF_BUSY;
|
||||
|
||||
switch( RFState )
|
||||
{
|
||||
case RF_STATE_IDLE:
|
||||
break;
|
||||
// Rx management
|
||||
case RF_STATE_RX_INIT:
|
||||
// DIO mapping setup
|
||||
if( ( SX1276->RegPacketConfig1 & RF_PACKETCONFIG1_CRC_ON ) == RF_PACKETCONFIG1_CRC_ON )
|
||||
{
|
||||
// CrcOk, FifoLevel, SyncAddr, FifoEmpty
|
||||
SX1276->RegDioMapping1 = RF_DIOMAPPING1_DIO0_01 | RF_DIOMAPPING1_DIO1_00 | RF_DIOMAPPING1_DIO2_11 | RF_DIOMAPPING1_DIO3_00;
|
||||
}
|
||||
else
|
||||
{
|
||||
// PayloadReady, FifoLevel, SyncAddr, FifoEmpty
|
||||
SX1276->RegDioMapping1 = RF_DIOMAPPING1_DIO0_00 | RF_DIOMAPPING1_DIO1_00 | RF_DIOMAPPING1_DIO2_11 | RF_DIOMAPPING1_DIO3_00;
|
||||
}
|
||||
// Preamble, Data
|
||||
SX1276->RegDioMapping2 = RF_DIOMAPPING2_DIO4_11 | RF_DIOMAPPING2_DIO5_10 | RF_DIOMAPPING2_MAP_PREAMBLEDETECT;
|
||||
SX1276WriteBuffer( REG_DIOMAPPING1, &SX1276->RegDioMapping1, 2 );
|
||||
|
||||
SX1276FskSetOpMode( RF_OPMODE_RECEIVER );
|
||||
|
||||
memset( RFBuffer, 0, ( size_t )RF_BUFFER_SIZE );
|
||||
|
||||
PacketTimeout = ( uint16_t )( round( ( 8.0 * ( ( double )SX1276FskGetPacketPayloadSize( ) ) / ( double )FskSettings.Bitrate ) * 1000.0 ) + 1.0 );
|
||||
PacketTimeout = PacketTimeout + ( PacketTimeout >> 1 ); // Set the Packet timeout as 1.5 times the full payload transmission time
|
||||
|
||||
Preamble2SyncTimeout = PacketTimeout;
|
||||
|
||||
Preamble2SyncTimer = RxTimeoutTimer = GET_TICK_COUNT( );
|
||||
|
||||
SX1276->RegFifoThresh = RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY | 0x20; // 32 bytes of data
|
||||
SX1276Write( REG_FIFOTHRESH, SX1276->RegFifoThresh );
|
||||
|
||||
PreambleDetected = false;
|
||||
SyncWordDetected = false;
|
||||
PacketDetected = false;
|
||||
RxBytesRead = 0;
|
||||
RxPacketSize = 0;
|
||||
RFState = RF_STATE_RX_SYNC;
|
||||
break;
|
||||
case RF_STATE_RX_SYNC:
|
||||
if( ( DIO4 == 1 ) && ( PreambleDetected == false ) )// Preamble
|
||||
{
|
||||
PreambleDetected = true;
|
||||
Preamble2SyncTimer = GET_TICK_COUNT( );
|
||||
}
|
||||
if( ( DIO2 == 1 ) && ( PreambleDetected == true ) && ( SyncWordDetected == false ) ) // SyncAddr
|
||||
{
|
||||
SyncWordDetected = true;
|
||||
|
||||
RxPacketRssiValue = SX1276FskReadRssi( );
|
||||
|
||||
RxPacketAfcValue = SX1276FskReadAfc( );
|
||||
RxGain = SX1276FskReadRxGain( );
|
||||
|
||||
Preamble2SyncTimer = RxTimeoutTimer = GET_TICK_COUNT( );
|
||||
|
||||
RFState = RF_STATE_RX_RUNNING;
|
||||
}
|
||||
|
||||
// Preamble 2 SyncAddr timeout
|
||||
if( ( SyncWordDetected == false ) && ( PreambleDetected == true ) && ( ( GET_TICK_COUNT( ) - Preamble2SyncTimer ) > Preamble2SyncTimeout ) )
|
||||
{
|
||||
RFState = RF_STATE_RX_INIT;
|
||||
SX1276Write( REG_RXCONFIG, SX1276->RegRxConfig | RF_RXCONFIG_RESTARTRXWITHPLLLOCK );
|
||||
}
|
||||
if( ( SyncWordDetected == false ) &&
|
||||
( PreambleDetected == false ) &&
|
||||
( PacketDetected == false ) &&
|
||||
( ( GET_TICK_COUNT( ) - RxTimeoutTimer ) > PacketTimeout ) )
|
||||
{
|
||||
RFState = RF_STATE_RX_TIMEOUT;
|
||||
}
|
||||
break;
|
||||
case RF_STATE_RX_RUNNING:
|
||||
if( RxPacketSize > RF_BUFFER_SIZE_MAX )
|
||||
{
|
||||
RFState = RF_STATE_RX_LEN_ERROR;
|
||||
break;
|
||||
}
|
||||
#if 1
|
||||
if( DIO1 == 1 ) // FifoLevel
|
||||
{
|
||||
if( ( RxPacketSize == 0 ) && ( RxBytesRead == 0 ) ) // Read received packet size
|
||||
{
|
||||
if( ( SX1276->RegPacketConfig1 & RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) == RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE )
|
||||
{
|
||||
SX1276ReadFifo( ( uint8_t* )&RxPacketSize, 1 );
|
||||
}
|
||||
else
|
||||
{
|
||||
RxPacketSize = SX1276->RegPayloadLength;
|
||||
}
|
||||
}
|
||||
|
||||
if( ( RxPacketSize - RxBytesRead ) > ( SX1276->RegFifoThresh & 0x3F ) )
|
||||
{
|
||||
SX1276ReadFifo( ( RFBuffer + RxBytesRead ), ( SX1276->RegFifoThresh & 0x3F ) );
|
||||
RxBytesRead += ( SX1276->RegFifoThresh & 0x3F );
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276ReadFifo( ( RFBuffer + RxBytesRead ), RxPacketSize - RxBytesRead );
|
||||
RxBytesRead += ( RxPacketSize - RxBytesRead );
|
||||
}
|
||||
}
|
||||
#endif
|
||||
if( DIO0 == 1 ) // PayloadReady/CrcOk
|
||||
{
|
||||
RxTimeoutTimer = GET_TICK_COUNT( );
|
||||
if( ( RxPacketSize == 0 ) && ( RxBytesRead == 0 ) ) // Read received packet size
|
||||
{
|
||||
if( ( SX1276->RegPacketConfig1 & RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) == RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE )
|
||||
{
|
||||
SX1276ReadFifo( ( uint8_t* )&RxPacketSize, 1 );
|
||||
}
|
||||
else
|
||||
{
|
||||
RxPacketSize = SX1276->RegPayloadLength;
|
||||
}
|
||||
SX1276ReadFifo( RFBuffer + RxBytesRead, RxPacketSize - RxBytesRead );
|
||||
RxBytesRead += ( RxPacketSize - RxBytesRead );
|
||||
PacketDetected = true;
|
||||
RFState = RF_STATE_RX_DONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276ReadFifo( RFBuffer + RxBytesRead, RxPacketSize - RxBytesRead );
|
||||
RxBytesRead += ( RxPacketSize - RxBytesRead );
|
||||
PacketDetected = true;
|
||||
RFState = RF_STATE_RX_DONE;
|
||||
}
|
||||
}
|
||||
|
||||
// Packet timeout
|
||||
if( ( PacketDetected == false ) && ( ( GET_TICK_COUNT( ) - RxTimeoutTimer ) > PacketTimeout ) )
|
||||
{
|
||||
RFState = RF_STATE_RX_TIMEOUT;
|
||||
}
|
||||
break;
|
||||
case RF_STATE_RX_DONE:
|
||||
RxBytesRead = 0;
|
||||
RFState = RF_STATE_RX_INIT;
|
||||
result = RF_RX_DONE;
|
||||
break;
|
||||
case RF_STATE_RX_TIMEOUT:
|
||||
RxBytesRead = 0;
|
||||
RxPacketSize = 0;
|
||||
SX1276Write( REG_RXCONFIG, SX1276->RegRxConfig | RF_RXCONFIG_RESTARTRXWITHPLLLOCK );
|
||||
RFState = RF_STATE_RX_INIT;
|
||||
result = RF_RX_TIMEOUT;
|
||||
break;
|
||||
case RF_STATE_RX_LEN_ERROR:
|
||||
RxBytesRead = 0;
|
||||
RxPacketSize = 0;
|
||||
SX1276Write( REG_RXCONFIG, SX1276->RegRxConfig | RF_RXCONFIG_RESTARTRXWITHPLLLOCK );
|
||||
RFState = RF_STATE_RX_INIT;
|
||||
result = RF_LEN_ERROR;
|
||||
break;
|
||||
// Tx management
|
||||
case RF_STATE_TX_INIT:
|
||||
// Packet DIO mapping setup
|
||||
// PacketSent, FifoLevel, FifoFull, TxReady
|
||||
SX1276->RegDioMapping1 = RF_DIOMAPPING1_DIO0_00 | RF_DIOMAPPING1_DIO1_00 | RF_DIOMAPPING1_DIO2_00 | RF_DIOMAPPING1_DIO3_01;
|
||||
// LowBat, Data
|
||||
SX1276->RegDioMapping2 = RF_DIOMAPPING2_DIO4_00 | RF_DIOMAPPING2_DIO5_10;
|
||||
SX1276WriteBuffer( REG_DIOMAPPING1, &SX1276->RegDioMapping1, 2 );
|
||||
|
||||
SX1276->RegFifoThresh = RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY | 0x18; // 24 bytes of data
|
||||
SX1276Write( REG_FIFOTHRESH, SX1276->RegFifoThresh );
|
||||
|
||||
SX1276FskSetOpMode( RF_OPMODE_TRANSMITTER );
|
||||
RFState = RF_STATE_TX_READY_WAIT;
|
||||
TxBytesSent = 0;
|
||||
break;
|
||||
case RF_STATE_TX_READY_WAIT:
|
||||
if( DIO3 == 1 ) // TxReady
|
||||
{
|
||||
if( ( SX1276->RegPacketConfig1 & RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) == RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE )
|
||||
{
|
||||
SX1276WriteFifo( ( uint8_t* )&TxPacketSize, 1 );
|
||||
}
|
||||
|
||||
if( ( TxPacketSize > 0 ) && ( TxPacketSize <= 64 ) )
|
||||
{
|
||||
DataChunkSize = TxPacketSize;
|
||||
}
|
||||
else
|
||||
{
|
||||
DataChunkSize = 32;
|
||||
}
|
||||
|
||||
SX1276WriteFifo( RFBuffer, DataChunkSize );
|
||||
TxBytesSent += DataChunkSize;
|
||||
TxTimeoutTimer = GET_TICK_COUNT( );
|
||||
RFState = RF_STATE_TX_RUNNING;
|
||||
}
|
||||
break;
|
||||
|
||||
case RF_STATE_TX_RUNNING:
|
||||
if( DIO1 == 0 ) // FifoLevel below thresold
|
||||
{
|
||||
if( ( TxPacketSize - TxBytesSent ) > DataChunkSize )
|
||||
{
|
||||
SX1276WriteFifo( ( RFBuffer + TxBytesSent ), DataChunkSize );
|
||||
TxBytesSent += DataChunkSize;
|
||||
}
|
||||
else
|
||||
{
|
||||
// we write the last chunk of data
|
||||
SX1276WriteFifo( RFBuffer + TxBytesSent, TxPacketSize - TxBytesSent );
|
||||
TxBytesSent += TxPacketSize - TxBytesSent;
|
||||
}
|
||||
}
|
||||
|
||||
if( DIO0 == 1 ) // PacketSent
|
||||
{
|
||||
TxTimeoutTimer = GET_TICK_COUNT( );
|
||||
RFState = RF_STATE_TX_DONE;
|
||||
SX1276FskSetOpMode( RF_OPMODE_STANDBY );
|
||||
}
|
||||
|
||||
// Packet timeout
|
||||
if( ( GET_TICK_COUNT( ) - TxTimeoutTimer ) > TICK_RATE_MS( 1000 ) )
|
||||
{
|
||||
RFState = RF_STATE_TX_TIMEOUT;
|
||||
}
|
||||
break;
|
||||
case RF_STATE_TX_DONE:
|
||||
RFState = RF_STATE_IDLE;
|
||||
result = RF_TX_DONE;
|
||||
break;
|
||||
case RF_STATE_TX_TIMEOUT:
|
||||
RFState = RF_STATE_IDLE;
|
||||
result = RF_TX_TIMEOUT;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
#endif // USE_SX1276_RADIO
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,532 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file sx1276-FskMisc.c
|
||||
* \brief SX1276 RF chip high level functions driver
|
||||
*
|
||||
* \remark Optional support functions.
|
||||
* These functions are defined only to easy the change of the
|
||||
* parameters.
|
||||
* For a final firmware the radio parameters will be known so
|
||||
* there is no need to support all possible parameters.
|
||||
* Removing these functions will greatly reduce the final firmware
|
||||
* size.
|
||||
*
|
||||
* \version 2.0.0
|
||||
* \date May 6 2013
|
||||
* \author Gregory Cristian
|
||||
*
|
||||
* Last modified by Miguel Luis on Jun 19 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: sx1276-FskMisc.c
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
|
||||
#include <math.h>
|
||||
|
||||
#include "platform.h"
|
||||
|
||||
#if defined( USE_SX1276_RADIO )
|
||||
|
||||
#include "sx1276-Hal.h"
|
||||
#include "sx1276.h"
|
||||
|
||||
#include "sx1276-Fsk.h"
|
||||
#include "sx1276-FskMisc.h"
|
||||
|
||||
extern tFskSettings FskSettings;
|
||||
|
||||
void SX1276FskSetRFFrequency( uint32_t freq )
|
||||
{
|
||||
FskSettings.RFFrequency = freq;
|
||||
|
||||
freq = ( uint32_t )( ( double )freq / ( double )FREQ_STEP );
|
||||
SX1276->RegFrfMsb = ( uint8_t )( ( freq >> 16 ) & 0xFF );
|
||||
SX1276->RegFrfMid = ( uint8_t )( ( freq >> 8 ) & 0xFF );
|
||||
SX1276->RegFrfLsb = ( uint8_t )( freq & 0xFF );
|
||||
SX1276WriteBuffer( REG_FRFMSB, &SX1276->RegFrfMsb, 3 );
|
||||
}
|
||||
|
||||
uint32_t SX1276FskGetRFFrequency( void )
|
||||
{
|
||||
SX1276ReadBuffer( REG_FRFMSB, &SX1276->RegFrfMsb, 3 );
|
||||
FskSettings.RFFrequency = ( ( uint32_t )SX1276->RegFrfMsb << 16 ) | ( ( uint32_t )SX1276->RegFrfMid << 8 ) | ( ( uint32_t )SX1276->RegFrfLsb );
|
||||
FskSettings.RFFrequency = ( uint32_t )( ( double )FskSettings.RFFrequency * ( double )FREQ_STEP );
|
||||
|
||||
return FskSettings.RFFrequency;
|
||||
}
|
||||
|
||||
void SX1276FskRxCalibrate( void )
|
||||
{
|
||||
// the function RadioRxCalibrate is called just after the reset so all register are at their default values
|
||||
uint8_t regPaConfigInitVal;
|
||||
uint32_t initialFreq;
|
||||
|
||||
// save register values;
|
||||
SX1276Read( REG_PACONFIG, ®PaConfigInitVal );
|
||||
initialFreq = SX1276FskGetRFFrequency( );
|
||||
|
||||
// Cut the PA just in case
|
||||
SX1276->RegPaConfig = 0x00; // RFO output, power = -1 dBm
|
||||
SX1276Write( REG_PACONFIG, SX1276->RegPaConfig );
|
||||
|
||||
// Set Frequency in HF band
|
||||
SX1276FskSetRFFrequency( 860000000 );
|
||||
|
||||
// Rx chain re-calibration workaround
|
||||
SX1276Read( REG_IMAGECAL, &SX1276->RegImageCal );
|
||||
SX1276->RegImageCal = ( SX1276->RegImageCal & RF_IMAGECAL_IMAGECAL_MASK ) | RF_IMAGECAL_IMAGECAL_START;
|
||||
SX1276Write( REG_IMAGECAL, SX1276->RegImageCal );
|
||||
|
||||
SX1276Read( REG_IMAGECAL, &SX1276->RegImageCal );
|
||||
// rx_cal_run goes low when calibration in finished
|
||||
while( ( SX1276->RegImageCal & RF_IMAGECAL_IMAGECAL_RUNNING ) == RF_IMAGECAL_IMAGECAL_RUNNING )
|
||||
{
|
||||
SX1276Read( REG_IMAGECAL, &SX1276->RegImageCal );
|
||||
}
|
||||
|
||||
// reload saved values into the registers
|
||||
SX1276->RegPaConfig = regPaConfigInitVal;
|
||||
SX1276Write( REG_PACONFIG, SX1276->RegPaConfig );
|
||||
|
||||
SX1276FskSetRFFrequency( initialFreq );
|
||||
|
||||
}
|
||||
|
||||
void SX1276FskSetBitrate( uint32_t bitrate )
|
||||
{
|
||||
FskSettings.Bitrate = bitrate;
|
||||
|
||||
bitrate = ( uint16_t )( ( double )XTAL_FREQ / ( double )bitrate );
|
||||
SX1276->RegBitrateMsb = ( uint8_t )( bitrate >> 8 );
|
||||
SX1276->RegBitrateLsb = ( uint8_t )( bitrate & 0xFF );
|
||||
SX1276WriteBuffer( REG_BITRATEMSB, &SX1276->RegBitrateMsb, 2 );
|
||||
}
|
||||
|
||||
uint32_t SX1276FskGetBitrate( void )
|
||||
{
|
||||
SX1276ReadBuffer( REG_BITRATEMSB, &SX1276->RegBitrateMsb, 2 );
|
||||
FskSettings.Bitrate = ( ( ( uint32_t )SX1276->RegBitrateMsb << 8 ) | ( ( uint32_t )SX1276->RegBitrateLsb ) );
|
||||
FskSettings.Bitrate = ( uint16_t )( ( double )XTAL_FREQ / ( double )FskSettings.Bitrate );
|
||||
|
||||
return FskSettings.Bitrate;
|
||||
}
|
||||
|
||||
void SX1276FskSetFdev( uint32_t fdev )
|
||||
{
|
||||
FskSettings.Fdev = fdev;
|
||||
|
||||
SX1276Read( REG_FDEVMSB, &SX1276->RegFdevMsb );
|
||||
|
||||
fdev = ( uint16_t )( ( double )fdev / ( double )FREQ_STEP );
|
||||
SX1276->RegFdevMsb = ( ( SX1276->RegFdevMsb & RF_FDEVMSB_FDEV_MASK ) | ( ( ( uint8_t )( fdev >> 8 ) ) & ~RF_FDEVMSB_FDEV_MASK ) );
|
||||
SX1276->RegFdevLsb = ( uint8_t )( fdev & 0xFF );
|
||||
SX1276WriteBuffer( REG_FDEVMSB, &SX1276->RegFdevMsb, 2 );
|
||||
}
|
||||
|
||||
uint32_t SX1276FskGetFdev( void )
|
||||
{
|
||||
SX1276ReadBuffer( REG_FDEVMSB, &SX1276->RegFdevMsb, 2 );
|
||||
FskSettings.Fdev = ( ( ( uint32_t )( ( SX1276->RegFdevMsb << 8 ) & ~RF_FDEVMSB_FDEV_MASK ) ) | ( ( uint32_t )SX1276->RegFdevLsb ) );
|
||||
FskSettings.Fdev = ( uint16_t )( ( double )FskSettings.Fdev * ( double )FREQ_STEP );
|
||||
|
||||
return FskSettings.Fdev;
|
||||
}
|
||||
|
||||
void SX1276FskSetRFPower( int8_t power )
|
||||
{
|
||||
SX1276Read( REG_PACONFIG, &SX1276->RegPaConfig );
|
||||
SX1276Read( REG_PADAC, &SX1276->RegPaDac );
|
||||
|
||||
if( ( SX1276->RegPaConfig & RF_PACONFIG_PASELECT_PABOOST ) == RF_PACONFIG_PASELECT_PABOOST )
|
||||
{
|
||||
if( ( SX1276->RegPaDac & 0x87 ) == 0x87 )
|
||||
{
|
||||
if( power < 5 )
|
||||
{
|
||||
power = 5;
|
||||
}
|
||||
if( power > 20 )
|
||||
{
|
||||
power = 20;
|
||||
}
|
||||
SX1276->RegPaConfig = ( SX1276->RegPaConfig & RF_PACONFIG_MAX_POWER_MASK ) | 0x70;
|
||||
SX1276->RegPaConfig = ( SX1276->RegPaConfig & RF_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power - 5 ) & 0x0F );
|
||||
}
|
||||
else
|
||||
{
|
||||
if( power < 2 )
|
||||
{
|
||||
power = 2;
|
||||
}
|
||||
if( power > 17 )
|
||||
{
|
||||
power = 17;
|
||||
}
|
||||
SX1276->RegPaConfig = ( SX1276->RegPaConfig & RF_PACONFIG_MAX_POWER_MASK ) | 0x70;
|
||||
SX1276->RegPaConfig = ( SX1276->RegPaConfig & RF_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power - 2 ) & 0x0F );
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if( power < -1 )
|
||||
{
|
||||
power = -1;
|
||||
}
|
||||
if( power > 14 )
|
||||
{
|
||||
power = 14;
|
||||
}
|
||||
SX1276->RegPaConfig = ( SX1276->RegPaConfig & RF_PACONFIG_MAX_POWER_MASK ) | 0x70;
|
||||
SX1276->RegPaConfig = ( SX1276->RegPaConfig & RF_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power + 1 ) & 0x0F );
|
||||
}
|
||||
SX1276Write( REG_PACONFIG, SX1276->RegPaConfig );
|
||||
FskSettings.Power = power;
|
||||
}
|
||||
|
||||
int8_t SX1276FskGetRFPower( void )
|
||||
{
|
||||
SX1276Read( REG_PACONFIG, &SX1276->RegPaConfig );
|
||||
SX1276Read( REG_PADAC, &SX1276->RegPaDac );
|
||||
|
||||
if( ( SX1276->RegPaConfig & RF_PACONFIG_PASELECT_PABOOST ) == RF_PACONFIG_PASELECT_PABOOST )
|
||||
{
|
||||
if( ( SX1276->RegPaDac & 0x07 ) == 0x07 )
|
||||
{
|
||||
FskSettings.Power = 5 + ( SX1276->RegPaConfig & ~RF_PACONFIG_OUTPUTPOWER_MASK );
|
||||
}
|
||||
else
|
||||
{
|
||||
FskSettings.Power = 2 + ( SX1276->RegPaConfig & ~RF_PACONFIG_OUTPUTPOWER_MASK );
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
FskSettings.Power = -1 + ( SX1276->RegPaConfig & ~RF_PACONFIG_OUTPUTPOWER_MASK );
|
||||
}
|
||||
return FskSettings.Power;
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief Computes the Rx bandwidth with the mantisse and exponent
|
||||
*
|
||||
* \param [IN] mantisse Mantisse of the bandwidth value
|
||||
* \param [IN] exponent Exponent of the bandwidth value
|
||||
* \retval bandwidth Computed bandwidth
|
||||
*/
|
||||
static uint32_t SX1276FskComputeRxBw( uint8_t mantisse, uint8_t exponent )
|
||||
{
|
||||
// rxBw
|
||||
if( ( SX1276->RegOpMode & RF_OPMODE_MODULATIONTYPE_FSK ) == RF_OPMODE_MODULATIONTYPE_FSK )
|
||||
{
|
||||
return ( uint32_t )( ( double )XTAL_FREQ / ( mantisse * ( double )pow( 2, exponent + 2 ) ) );
|
||||
}
|
||||
else
|
||||
{
|
||||
return ( uint32_t )( ( double )XTAL_FREQ / ( mantisse * ( double )pow( 2, exponent + 3 ) ) );
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief Computes the mantisse and exponent from the bandwitdh value
|
||||
*
|
||||
* \param [IN] rxBwValue Bandwidth value
|
||||
* \param [OUT] mantisse Mantisse of the bandwidth value
|
||||
* \param [OUT] exponent Exponent of the bandwidth value
|
||||
*/
|
||||
static void SX1276FskComputeRxBwMantExp( uint32_t rxBwValue, uint8_t* mantisse, uint8_t* exponent )
|
||||
{
|
||||
uint8_t tmpExp = 0;
|
||||
uint8_t tmpMant = 0;
|
||||
|
||||
double tmpRxBw = 0;
|
||||
double rxBwMin = 10e6;
|
||||
|
||||
for( tmpExp = 0; tmpExp < 8; tmpExp++ )
|
||||
{
|
||||
for( tmpMant = 16; tmpMant <= 24; tmpMant += 4 )
|
||||
{
|
||||
if( ( SX1276->RegOpMode & RF_OPMODE_MODULATIONTYPE_FSK ) == RF_OPMODE_MODULATIONTYPE_FSK )
|
||||
{
|
||||
tmpRxBw = ( double )XTAL_FREQ / ( tmpMant * ( double )pow( 2, tmpExp + 2 ) );
|
||||
}
|
||||
else
|
||||
{
|
||||
tmpRxBw = ( double )XTAL_FREQ / ( tmpMant * ( double )pow( 2, tmpExp + 3 ) );
|
||||
}
|
||||
if( fabs( tmpRxBw - rxBwValue ) < rxBwMin )
|
||||
{
|
||||
rxBwMin = fabs( tmpRxBw - rxBwValue );
|
||||
*mantisse = tmpMant;
|
||||
*exponent = tmpExp;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void SX1276FskSetDccBw( uint8_t* reg, uint32_t dccValue, uint32_t rxBwValue )
|
||||
{
|
||||
uint8_t mantisse = 0;
|
||||
uint8_t exponent = 0;
|
||||
|
||||
if( reg == &SX1276->RegRxBw )
|
||||
{
|
||||
*reg = ( uint8_t )dccValue & 0x60;
|
||||
}
|
||||
else
|
||||
{
|
||||
*reg = 0;
|
||||
}
|
||||
|
||||
SX1276FskComputeRxBwMantExp( rxBwValue, &mantisse, &exponent );
|
||||
|
||||
switch( mantisse )
|
||||
{
|
||||
case 16:
|
||||
*reg |= ( uint8_t )( 0x00 | ( exponent & 0x07 ) );
|
||||
break;
|
||||
case 20:
|
||||
*reg |= ( uint8_t )( 0x08 | ( exponent & 0x07 ) );
|
||||
break;
|
||||
case 24:
|
||||
*reg |= ( uint8_t )( 0x10 | ( exponent & 0x07 ) );
|
||||
break;
|
||||
default:
|
||||
// Something went terribely wrong
|
||||
break;
|
||||
}
|
||||
|
||||
if( reg == &SX1276->RegRxBw )
|
||||
{
|
||||
SX1276Write( REG_RXBW, *reg );
|
||||
FskSettings.RxBw = rxBwValue;
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276Write( REG_AFCBW, *reg );
|
||||
FskSettings.RxBwAfc = rxBwValue;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t SX1276FskGetBw( uint8_t* reg )
|
||||
{
|
||||
uint32_t rxBwValue = 0;
|
||||
uint8_t mantisse = 0;
|
||||
switch( ( *reg & 0x18 ) >> 3 )
|
||||
{
|
||||
case 0:
|
||||
mantisse = 16;
|
||||
break;
|
||||
case 1:
|
||||
mantisse = 20;
|
||||
break;
|
||||
case 2:
|
||||
mantisse = 24;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
rxBwValue = SX1276FskComputeRxBw( mantisse, ( uint8_t )*reg & 0x07 );
|
||||
if( reg == &SX1276->RegRxBw )
|
||||
{
|
||||
return FskSettings.RxBw = rxBwValue;
|
||||
}
|
||||
else
|
||||
{
|
||||
return FskSettings.RxBwAfc = rxBwValue;
|
||||
}
|
||||
}
|
||||
|
||||
void SX1276FskSetPacketCrcOn( bool enable )
|
||||
{
|
||||
SX1276Read( REG_PACKETCONFIG1, &SX1276->RegPacketConfig1 );
|
||||
SX1276->RegPacketConfig1 = ( SX1276->RegPacketConfig1 & RF_PACKETCONFIG1_CRC_MASK ) | ( enable << 4 );
|
||||
SX1276Write( REG_PACKETCONFIG1, SX1276->RegPacketConfig1 );
|
||||
FskSettings.CrcOn = enable;
|
||||
}
|
||||
|
||||
bool SX1276FskGetPacketCrcOn( void )
|
||||
{
|
||||
SX1276Read( REG_PACKETCONFIG1, &SX1276->RegPacketConfig1 );
|
||||
FskSettings.CrcOn = ( SX1276->RegPacketConfig1 & RF_PACKETCONFIG1_CRC_ON ) >> 4;
|
||||
return FskSettings.CrcOn;
|
||||
}
|
||||
|
||||
void SX1276FskSetAfcOn( bool enable )
|
||||
{
|
||||
SX1276Read( REG_RXCONFIG, &SX1276->RegRxConfig );
|
||||
SX1276->RegRxConfig = ( SX1276->RegRxConfig & RF_RXCONFIG_AFCAUTO_MASK ) | ( enable << 4 );
|
||||
SX1276Write( REG_RXCONFIG, SX1276->RegRxConfig );
|
||||
FskSettings.AfcOn = enable;
|
||||
}
|
||||
|
||||
bool SX1276FskGetAfcOn( void )
|
||||
{
|
||||
SX1276Read( REG_RXCONFIG, &SX1276->RegRxConfig );
|
||||
FskSettings.AfcOn = ( SX1276->RegRxConfig & RF_RXCONFIG_AFCAUTO_ON ) >> 4;
|
||||
return FskSettings.AfcOn;
|
||||
}
|
||||
|
||||
void SX1276FskSetPayloadLength( uint8_t value )
|
||||
{
|
||||
SX1276->RegPayloadLength = value;
|
||||
SX1276Write( REG_PAYLOADLENGTH, SX1276->RegPayloadLength );
|
||||
FskSettings.PayloadLength = value;
|
||||
}
|
||||
|
||||
uint8_t SX1276FskGetPayloadLength( void )
|
||||
{
|
||||
SX1276Read( REG_PAYLOADLENGTH, &SX1276->RegPayloadLength );
|
||||
FskSettings.PayloadLength = SX1276->RegPayloadLength;
|
||||
return FskSettings.PayloadLength;
|
||||
}
|
||||
|
||||
void SX1276FskSetPa20dBm( bool enale )
|
||||
{
|
||||
SX1276Read( REG_PADAC, &SX1276->RegPaDac );
|
||||
SX1276Read( REG_PACONFIG, &SX1276->RegPaConfig );
|
||||
|
||||
if( ( SX1276->RegPaConfig & RF_PACONFIG_PASELECT_PABOOST ) == RF_PACONFIG_PASELECT_PABOOST )
|
||||
{
|
||||
if( enale == true )
|
||||
{
|
||||
SX1276->RegPaDac = 0x87;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276->RegPaDac = 0x84;
|
||||
}
|
||||
SX1276Write( REG_PADAC, SX1276->RegPaDac );
|
||||
}
|
||||
|
||||
bool SX1276FskGetPa20dBm( void )
|
||||
{
|
||||
SX1276Read( REG_PADAC, &SX1276->RegPaDac );
|
||||
|
||||
return ( ( SX1276->RegPaDac & 0x07 ) == 0x07 ) ? true : false;
|
||||
}
|
||||
|
||||
void SX1276FskSetPAOutput( uint8_t outputPin )
|
||||
{
|
||||
SX1276Read( REG_PACONFIG, &SX1276->RegPaConfig );
|
||||
SX1276->RegPaConfig = (SX1276->RegPaConfig & RF_PACONFIG_PASELECT_MASK ) | outputPin;
|
||||
SX1276Write( REG_PACONFIG, SX1276->RegPaConfig );
|
||||
}
|
||||
|
||||
uint8_t SX1276FskGetPAOutput( void )
|
||||
{
|
||||
SX1276Read( REG_PACONFIG, &SX1276->RegPaConfig );
|
||||
return SX1276->RegPaConfig & ~RF_PACONFIG_PASELECT_MASK;
|
||||
}
|
||||
|
||||
|
||||
void SX1276FskSetPaRamp( uint8_t value )
|
||||
{
|
||||
SX1276Read( REG_PARAMP, &SX1276->RegPaRamp );
|
||||
SX1276->RegPaRamp = ( SX1276->RegPaRamp & RF_PARAMP_MASK ) | ( value & ~RF_PARAMP_MASK );
|
||||
SX1276Write( REG_PARAMP, SX1276->RegPaRamp );
|
||||
}
|
||||
|
||||
uint8_t SX1276FskGetPaRamp( void )
|
||||
{
|
||||
SX1276Read( REG_PARAMP, &SX1276->RegPaRamp );
|
||||
return SX1276->RegPaRamp & ~RF_PARAMP_MASK;
|
||||
}
|
||||
|
||||
void SX1276FskSetRssiOffset( int8_t offset )
|
||||
{
|
||||
SX1276Read( REG_RSSICONFIG, &SX1276->RegRssiConfig );
|
||||
if( offset < 0 )
|
||||
{
|
||||
offset = ( ~offset & 0x1F );
|
||||
offset += 1;
|
||||
offset = -offset;
|
||||
}
|
||||
SX1276->RegRssiConfig |= ( uint8_t )( ( offset & 0x1F ) << 3 );
|
||||
SX1276Write( REG_RSSICONFIG, SX1276->RegRssiConfig );
|
||||
}
|
||||
|
||||
int8_t SX1276FskGetRssiOffset( void )
|
||||
{
|
||||
int8_t offset;
|
||||
SX1276Read( REG_RSSICONFIG, &SX1276->RegRssiConfig );
|
||||
offset = SX1276->RegRssiConfig >> 3;
|
||||
if( ( offset & 0x10 ) == 0x10 )
|
||||
{
|
||||
offset = ( ~offset & 0x1F );
|
||||
offset += 1;
|
||||
offset = -offset;
|
||||
}
|
||||
return offset;
|
||||
}
|
||||
|
||||
int8_t SX1276FskGetRawTemp( void )
|
||||
{
|
||||
int8_t temp = 0;
|
||||
uint8_t previousOpMode;
|
||||
uint32_t startTick;
|
||||
|
||||
// Enable Temperature reading
|
||||
SX1276Read( REG_IMAGECAL, &SX1276->RegImageCal );
|
||||
SX1276->RegImageCal = ( SX1276->RegImageCal & RF_IMAGECAL_TEMPMONITOR_MASK ) | RF_IMAGECAL_TEMPMONITOR_ON;
|
||||
SX1276Write( REG_IMAGECAL, SX1276->RegImageCal );
|
||||
|
||||
// save current Op Mode
|
||||
SX1276Read( REG_OPMODE, &SX1276->RegOpMode );
|
||||
previousOpMode = SX1276->RegOpMode;
|
||||
|
||||
// put device in FSK RxSynth
|
||||
SX1276->RegOpMode = RF_OPMODE_SYNTHESIZER_RX;
|
||||
SX1276Write( REG_OPMODE, SX1276->RegOpMode );
|
||||
|
||||
// Wait 1ms
|
||||
startTick = GET_TICK_COUNT( );
|
||||
while( ( GET_TICK_COUNT( ) - startTick ) < TICK_RATE_MS( 1 ) );
|
||||
|
||||
// Disable Temperature reading
|
||||
SX1276Read( REG_IMAGECAL, &SX1276->RegImageCal );
|
||||
SX1276->RegImageCal = ( SX1276->RegImageCal & RF_IMAGECAL_TEMPMONITOR_MASK ) | RF_IMAGECAL_TEMPMONITOR_OFF;
|
||||
SX1276Write( REG_IMAGECAL, SX1276->RegImageCal );
|
||||
|
||||
// Read temperature
|
||||
SX1276Read( REG_TEMP, &SX1276->RegTemp );
|
||||
|
||||
temp = SX1276->RegTemp & 0x7F;
|
||||
|
||||
if( ( SX1276->RegTemp & 0x80 ) == 0x80 )
|
||||
{
|
||||
temp *= -1;
|
||||
}
|
||||
|
||||
// Reload previous Op Mode
|
||||
SX1276Write( REG_OPMODE, previousOpMode );
|
||||
|
||||
return temp;
|
||||
}
|
||||
|
||||
int8_t SX1276FskCalibreateTemp( int8_t actualTemp )
|
||||
{
|
||||
return actualTemp - SX1276FskGetRawTemp( );
|
||||
}
|
||||
|
||||
int8_t SX1276FskGetTemp( int8_t compensationFactor )
|
||||
{
|
||||
return SX1276FskGetRawTemp( ) + compensationFactor;
|
||||
}
|
||||
|
||||
#endif // USE_SX1276_RADIO
|
|
@ -0,0 +1,251 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file sx1276-FskMisc.h
|
||||
* \brief SX1276 RF chip high level functions driver
|
||||
*
|
||||
* \remark Optional support functions.
|
||||
* These functions are defined only to easy the change of the
|
||||
* parameters.
|
||||
* For a final firmware the radio parameters will be known so
|
||||
* there is no need to support all possible parameters.
|
||||
* Removing these functions will greatly reduce the final firmware
|
||||
* size.
|
||||
*
|
||||
* \version 2.0.B2
|
||||
* \date May 6 2013
|
||||
* \author Gregory Cristian
|
||||
*
|
||||
* Last modified by Miguel Luis on Jun 19 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: sx1276-FskMisc.h
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
|
||||
#ifndef __SX1276_FSK_MISC_H__
|
||||
#define __SX1276_FSK_MISC_H__
|
||||
|
||||
/*!
|
||||
* \brief Writes the new RF frequency value
|
||||
*
|
||||
* \param [IN] freq New RF frequency value in [Hz]
|
||||
*/
|
||||
void SX1276FskSetRFFrequency( uint32_t freq );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current RF frequency value
|
||||
*
|
||||
* \retval freq Current RF frequency value in [Hz]
|
||||
*/
|
||||
uint32_t SX1276FskGetRFFrequency( void );
|
||||
|
||||
/*!
|
||||
* \brief Calibrate RSSI and I/Q mismatch for HF
|
||||
*
|
||||
* \retval none
|
||||
*/
|
||||
void SX1276FskRxCalibrate( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new bitrate value
|
||||
*
|
||||
* \param [IN] bitrate New bitrate value in [bps]
|
||||
*/
|
||||
void SX1276FskSetBitrate( uint32_t bitrate );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current bitrate value
|
||||
*
|
||||
* \retval bitrate Current bitrate value in [bps]
|
||||
*/
|
||||
uint32_t SX1276FskGetBitrate( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new frequency deviation value
|
||||
*
|
||||
* \param [IN] fdev New frequency deviation value in [Hz]
|
||||
*/
|
||||
void SX1276FskSetFdev( uint32_t fdev );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current frequency deviation value
|
||||
*
|
||||
* \retval fdev Current frequency deviation value in [Hz]
|
||||
*/
|
||||
uint32_t SX1276FskGetFdev( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new RF output power value
|
||||
*
|
||||
* \param [IN] power New output power value in [dBm]
|
||||
*/
|
||||
void SX1276FskSetRFPower( int8_t power );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current RF output power value
|
||||
*
|
||||
* \retval power Current output power value in [dBm]
|
||||
*/
|
||||
int8_t SX1276FskGetRFPower( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the DC offset canceller and Rx bandwidth values
|
||||
*
|
||||
* \remark For SX1276 there is no DCC setting. dccValue should be 0
|
||||
* ie: SX1276SetDccBw( &SX1276.RegRxBw, 0, 62500 );
|
||||
*
|
||||
* \param [IN] reg Register pointer to either SX1231.RegRxBw or SX1231.RegAfcBw
|
||||
* \param [IN] dccValue New DC offset canceller value in [Hz] ( SX1231 only )
|
||||
* \param [IN] rxBwValue New Rx bandwidth value in [Hz]
|
||||
*/
|
||||
void SX1276FskSetDccBw( uint8_t* reg, uint32_t dccValue, uint32_t rxBwValue );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current bandwidth setting
|
||||
*
|
||||
* \param [IN] reg Register pointer to either SX1231.RegRxBw or SX1231.RegAfcBw
|
||||
*
|
||||
* \retval bandwidth Bandwidth value
|
||||
*/
|
||||
uint32_t SX1276FskGetBw( uint8_t* reg );
|
||||
|
||||
/*!
|
||||
* \brief Enables/Disables CRC
|
||||
*
|
||||
* \param [IN] enable CRC enable/disable
|
||||
*/
|
||||
void SX1276FskSetPacketCrcOn( bool enable );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current CRC Enable/Disbale value
|
||||
*
|
||||
* \retval enable Current CRC Enable/Disbale value
|
||||
*/
|
||||
bool SX1276FskGetPacketCrcOn( void );
|
||||
|
||||
/*!
|
||||
* \brief Enables/Disables AFC
|
||||
*
|
||||
* \param [IN] enable AFC enable/disable
|
||||
*/
|
||||
void SX1276FskSetAfcOn( bool enable );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current AFC Enable/Disbale value
|
||||
*
|
||||
* \retval enable Current AFC Enable/Disbale value
|
||||
*/
|
||||
bool SX1276FskGetAfcOn( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new payload length value
|
||||
*
|
||||
* \param [IN] value New payload length value
|
||||
*/
|
||||
void SX1276FskSetPayloadLength( uint8_t value );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current payload length value
|
||||
*
|
||||
* \retval value Current payload length value
|
||||
*/
|
||||
uint8_t SX1276FskGetPayloadLength( void );
|
||||
|
||||
/*!
|
||||
* \brief Enables/Disables the 20 dBm PA
|
||||
*
|
||||
* \param [IN] enable [true, false]
|
||||
*/
|
||||
void SX1276FskSetPa20dBm( bool enale );
|
||||
|
||||
/*!
|
||||
* \brief Gets the current 20 dBm PA status
|
||||
*
|
||||
* \retval enable [true, false]
|
||||
*/
|
||||
bool SX1276FskGetPa20dBm( void );
|
||||
|
||||
/*!
|
||||
* \brief Set the RF Output pin
|
||||
*
|
||||
* \param [IN] RF_PACONFIG_PASELECT_PABOOST or RF_PACONFIG_PASELECT_RFO
|
||||
*/
|
||||
void SX1276FskSetPAOutput( uint8_t outputPin );
|
||||
|
||||
/*!
|
||||
* \brief Gets the used RF Ouptu pin
|
||||
*
|
||||
* \retval RF_PACONFIG_PASELECT_PABOOST or RF_PACONFIG_PASELECT_RFO
|
||||
*/
|
||||
uint8_t SX1276FskGetPAOutput( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new PA rise/fall time of ramp up/down value
|
||||
*
|
||||
* \param [IN] value New PaRamp value
|
||||
*/
|
||||
void SX1276FskSetPaRamp( uint8_t value );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current PA rise/fall time of ramp up/down value
|
||||
*
|
||||
* \retval value Current PaRamp value
|
||||
*/
|
||||
uint8_t SX1276FskGetPaRamp( void );
|
||||
|
||||
/*!
|
||||
* \brief Applies an offset to the RSSI. Compensates board components
|
||||
*
|
||||
* \param [IN] offset Offset to be applied (+/-)
|
||||
*/
|
||||
void SX1276FskSetRssiOffset( int8_t offset );
|
||||
|
||||
/*!
|
||||
* \brief Gets the current RSSI offset.
|
||||
*
|
||||
* \retval offset Current offset (+/-)
|
||||
*/
|
||||
int8_t SX1276FskGetRssiOffset( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new value for the preamble size
|
||||
*
|
||||
* \param [IN] size New value of pramble size
|
||||
*/
|
||||
void SX1276FskSetPreambleSize( uint16_t size );
|
||||
|
||||
/*!
|
||||
* Reads the raw temperature
|
||||
* \retval temperature New raw temperature reading in 2's complement format
|
||||
*/
|
||||
int8_t SX1276FskGetRawTemp( void );
|
||||
|
||||
/*!
|
||||
* Computes the temperature compensation factor
|
||||
* \param [IN] actualTemp Actual temperature measured by an external device
|
||||
* \retval compensationFactor Computed compensation factor
|
||||
*/
|
||||
int8_t SX1276FskCalibreateTemp( int8_t actualTemp );
|
||||
|
||||
/*!
|
||||
* Gets the actual compensated temperature
|
||||
* \param [IN] compensationFactor Return value of the calibration function
|
||||
* \retval New compensated temperature value
|
||||
*/
|
||||
int8_t SX1276FskGetTemp( int8_t compensationFactor );
|
||||
|
||||
#endif //__SX1276_FSK_MISC_H__
|
|
@ -0,0 +1,170 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file sx1276-Hal.h
|
||||
* \brief SX1276 Hardware Abstraction Layer
|
||||
*
|
||||
* \version 2.0.B2
|
||||
* \date Nov 21 2012
|
||||
* \author Miguel Luis
|
||||
*
|
||||
* Last modified by Miguel Luis on Jun 19 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: sx1276-Hal.h
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
|
||||
#ifndef __SX1276_HAL_H__
|
||||
#define __SX1276_HAL_H__
|
||||
#include "platform.h"
|
||||
|
||||
/*!
|
||||
* DIO state read functions mapping
|
||||
*/
|
||||
#define DIO0 SX1276ReadDio0( )
|
||||
#define DIO1 SX1276ReadDio1( )
|
||||
#define DIO2 SX1276ReadDio2( )
|
||||
#define DIO3 SX1276ReadDio3( )
|
||||
#define DIO4 SX1276ReadDio4( )
|
||||
#define DIO5 SX1276ReadDio5( )
|
||||
|
||||
// RXTX pin control see errata note
|
||||
#define RXTX( txEnable ) SX1276WriteRxTx( txEnable );
|
||||
|
||||
#define GET_TICK_COUNT( ) CurrentTicksGain()
|
||||
#define TICK_RATE_MS( ms ) ( ms )
|
||||
|
||||
typedef enum
|
||||
{
|
||||
RADIO_RESET_OFF,
|
||||
RADIO_RESET_ON,
|
||||
}tRadioResetState;
|
||||
|
||||
/*!
|
||||
* \brief Initializes the radio interface I/Os
|
||||
*/
|
||||
void SX1276InitIo( void );
|
||||
|
||||
/*!
|
||||
* \brief Set the radio reset pin state
|
||||
*
|
||||
* \param state New reset pin state
|
||||
*/
|
||||
void SX1276SetReset( uint8_t state );
|
||||
|
||||
/*!
|
||||
* \brief Writes the radio register at the specified address
|
||||
*
|
||||
* \param [IN]: addr Register address
|
||||
* \param [IN]: data New register value
|
||||
*/
|
||||
void SX1276Write( uint8_t addr, uint8_t data );
|
||||
|
||||
/*!
|
||||
* \brief Reads the radio register at the specified address
|
||||
*
|
||||
* \param [IN]: addr Register address
|
||||
* \param [OUT]: data Register value
|
||||
*/
|
||||
void SX1276Read( uint8_t addr, uint8_t *data );
|
||||
|
||||
/*!
|
||||
* \brief Writes multiple radio registers starting at address
|
||||
*
|
||||
* \param [IN] addr First Radio register address
|
||||
* \param [IN] buffer Buffer containing the new register's values
|
||||
* \param [IN] size Number of registers to be written
|
||||
*/
|
||||
void SX1276WriteBuffer( uint8_t addr, uint8_t *buffer, uint8_t size );
|
||||
|
||||
/*!
|
||||
* \brief Reads multiple radio registers starting at address
|
||||
*
|
||||
* \param [IN] addr First Radio register address
|
||||
* \param [OUT] buffer Buffer where to copy the registers data
|
||||
* \param [IN] size Number of registers to be read
|
||||
*/
|
||||
void SX1276ReadBuffer( uint8_t addr, uint8_t *buffer, uint8_t size );
|
||||
|
||||
/*!
|
||||
* \brief Writes the buffer contents to the radio FIFO
|
||||
*
|
||||
* \param [IN] buffer Buffer containing data to be put on the FIFO.
|
||||
* \param [IN] size Number of bytes to be written to the FIFO
|
||||
*/
|
||||
void SX1276WriteFifo( uint8_t *buffer, uint8_t size );
|
||||
|
||||
/*!
|
||||
* \brief Reads the contents of the radio FIFO
|
||||
*
|
||||
* \param [OUT] buffer Buffer where to copy the FIFO read data.
|
||||
* \param [IN] size Number of bytes to be read from the FIFO
|
||||
*/
|
||||
void SX1276ReadFifo( uint8_t *buffer, uint8_t size );
|
||||
|
||||
/*!
|
||||
* \brief Gets the SX1276 DIO0 hardware pin status
|
||||
*
|
||||
* \retval status Current hardware pin status [1, 0]
|
||||
*/
|
||||
inline uint8_t SX1276ReadDio0( void );
|
||||
|
||||
/*!
|
||||
* \brief Ge// USE_SX1276_RADIOts the SX1276 DIO1 hardware pin status
|
||||
*
|
||||
* \retval status Current hardware pin status [1, 0]
|
||||
*/
|
||||
inline uint8_t SX1276ReadDio1( void );
|
||||
|
||||
/*!
|
||||
* \brief Gets the SX1276 DIO2 hardware pin status
|
||||
*
|
||||
* \retval status Current hardware pin status [1, 0]
|
||||
*/
|
||||
inline uint8_t SX1276ReadDio2( void );
|
||||
|
||||
/*!
|
||||
* \brief Gets the SX1276 DIO3 hardware pin status
|
||||
*
|
||||
* \retval status Current hardware pin status [1, 0]
|
||||
*/
|
||||
inline uint8_t SX1276ReadDio3( void );
|
||||
|
||||
/*!
|
||||
* \brief Gets the SX1276 DIO4 hardware pin status
|
||||
*
|
||||
* \retval status Current hardware pin status [1, 0]
|
||||
*/
|
||||
inline uint8_t SX1276ReadDio4( void );
|
||||
|
||||
/*!
|
||||
* \brief Gets the SX1276 DIO5 hardware pin status
|
||||
*
|
||||
* \retval status Current hardware pin status [1, 0]
|
||||
*/
|
||||
inline uint8_t SX1276ReadDio5( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the external RxTx pin value
|
||||
*
|
||||
* \remark see errata note
|
||||
*
|
||||
* \param [IN] txEnable [1: Tx, 0: Rx]
|
||||
*/
|
||||
inline void SX1276WriteRxTx( uint8_t txEnable );
|
||||
|
||||
#endif //__SX1276_HAL_H__
|
|
@ -0,0 +1,723 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Original Copyright (C) SEMTECH S.A.
|
||||
* Modified Copyright (C) 2020 AIIT XUOS Lab
|
||||
*/
|
||||
/*!
|
||||
* \file sx1276-LoRa.c
|
||||
* \brief SX1276 RF chip driver mode LoRa
|
||||
*
|
||||
* \version 2.0.0
|
||||
* \date Nov 21 2012
|
||||
* \author Miguel Luis
|
||||
*
|
||||
* Last modified by Miguel Luis on Jun 19 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: sx1276-LoRa.c
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#include "platform.h"
|
||||
|
||||
#if defined( USE_SX1276_RADIO )
|
||||
#include "radio.h"
|
||||
#include "sx1276-Hal.h"
|
||||
#include "sx1276.h"
|
||||
#include "sx1276-LoRaMisc.h"
|
||||
#include "sx1276-LoRa.h"
|
||||
|
||||
#define LoRa_FREQENCY 433000000
|
||||
|
||||
#define RSSI_OFFSET_LF -155.0
|
||||
#define RSSI_OFFSET_HF -150.0
|
||||
|
||||
#define NOISE_ABSOLUTE_ZERO -174.0
|
||||
#define NOISE_FIGURE_LF 4.0
|
||||
#define NOISE_FIGURE_HF 6.0
|
||||
|
||||
volatile uint32 TickCounter = 0;
|
||||
|
||||
uint32 Tx_Time_Start,Tx_Time_End;
|
||||
uint32 Rx_Time_Start,Rx_Time_End;
|
||||
//Signal bandwidth, used to calculate RSSI
|
||||
const double SignalBwLog[] =
|
||||
{
|
||||
3.8927900303521316335038277369285, // 7.8 kHz
|
||||
4.0177301567005500940384239336392, // 10.4 kHz
|
||||
4.193820026016112828717566631653, // 15.6 kHz
|
||||
4.31875866931372901183597627752391, // 20.8 kHz
|
||||
4.4948500216800940239313055263775, // 31.2 kHz
|
||||
4.6197891057238405255051280399961, // 41.6 kHz
|
||||
4.795880017344075219145044421102, // 62.5 kHz
|
||||
5.0969100130080564143587833158265, // 125 kHz
|
||||
5.397940008672037609572522210551, // 250 kHz
|
||||
5.6989700043360188047862611052755 // 500 kHz
|
||||
};
|
||||
|
||||
//These values need testing
|
||||
const double RssiOffsetLF[] =
|
||||
{
|
||||
-155.0,
|
||||
-155.0,
|
||||
-155.0,
|
||||
-155.0,
|
||||
-155.0,
|
||||
-155.0,
|
||||
-155.0,
|
||||
-155.0,
|
||||
-155.0,
|
||||
-155.0,
|
||||
};
|
||||
|
||||
//These values need testing
|
||||
const double RssiOffsetHF[] =
|
||||
{
|
||||
-150.0,
|
||||
-150.0,
|
||||
-150.0,
|
||||
-150.0,
|
||||
-150.0,
|
||||
-150.0,
|
||||
-150.0,
|
||||
-150.0,
|
||||
-150.0,
|
||||
-150.0,
|
||||
};
|
||||
|
||||
/*!
|
||||
* Frequency hopping frequencies table
|
||||
*/
|
||||
const int32_t HoppingFrequencies[] =
|
||||
{
|
||||
916500000,
|
||||
923500000,
|
||||
906500000,
|
||||
917500000,
|
||||
917500000,
|
||||
909000000,
|
||||
903000000,
|
||||
916000000,
|
||||
912500000,
|
||||
926000000,
|
||||
925000000,
|
||||
909500000,
|
||||
913000000,
|
||||
918500000,
|
||||
918500000,
|
||||
902500000,
|
||||
911500000,
|
||||
926500000,
|
||||
902500000,
|
||||
922000000,
|
||||
924000000,
|
||||
903500000,
|
||||
913000000,
|
||||
922000000,
|
||||
926000000,
|
||||
910000000,
|
||||
920000000,
|
||||
922500000,
|
||||
911000000,
|
||||
922000000,
|
||||
909500000,
|
||||
926000000,
|
||||
922000000,
|
||||
918000000,
|
||||
925500000,
|
||||
908000000,
|
||||
917500000,
|
||||
926500000,
|
||||
908500000,
|
||||
916000000,
|
||||
905500000,
|
||||
916000000,
|
||||
903000000,
|
||||
905000000,
|
||||
915000000,
|
||||
913000000,
|
||||
907000000,
|
||||
910000000,
|
||||
926500000,
|
||||
925500000,
|
||||
911000000,
|
||||
};
|
||||
|
||||
// Default settings
|
||||
tLoRaSettings LoRaSettings =
|
||||
{
|
||||
LoRa_FREQENCY , // RFFrequency
|
||||
20, // Power
|
||||
9, // SignalBw [0: 125 kHz, 1: 250 kHz, 2: 500 kHz, 3: Reserved]
|
||||
12, // SpreadingFactor [6: 64, 7: 128, 8: 256, 9: 512, 10: 1024, 11: 2048, 12: 4096 chips]
|
||||
2, // ErrorCoding [1: 4/5, 2: 4/6, 3: 4/7, 4: 4/8]
|
||||
true, // CrcOn [0: OFF, 1: ON]
|
||||
false, // ImplicitHeaderOn [0: OFF, 1: ON]
|
||||
0, // RxSingleOn [0: Continuous, 1 Single]
|
||||
0, // FreqHopOn [0: OFF, 1: ON]
|
||||
4, // HopPeriod Hops every frequency hopping period symbols
|
||||
1000, // TxPacketTimeout
|
||||
1000, // RxPacketTimeout
|
||||
128, // PayloadLength (used for implicit header mode)
|
||||
};
|
||||
|
||||
/*!
|
||||
* SX1276 LoRa registers variable
|
||||
*/
|
||||
tSX1276LR* SX1276LR;
|
||||
|
||||
/*!
|
||||
* Local RF buffer for communication support
|
||||
*/
|
||||
static uint8_t RFBuffer[RF_BUFFER_SIZE];
|
||||
static uint8_t TFBuffer[RF_BUFFER_SIZE];
|
||||
|
||||
/*!
|
||||
* RF state machine variable
|
||||
*/
|
||||
static uint8_t RFLRState = RFLR_STATE_IDLE;
|
||||
|
||||
/*!
|
||||
* Rx management support variables
|
||||
*/
|
||||
static uint16_t RxPacketSize = 0;
|
||||
static int8_t RxPacketSnrEstimate;
|
||||
static double RxPacketRssiValue;
|
||||
static uint8_t RxGain = 1;
|
||||
static uint32_t RxTimeoutTimer = 0;
|
||||
|
||||
/*!
|
||||
* PacketTimeout Stores the Rx window time value for packet reception
|
||||
*/
|
||||
static uint32_t PacketTimeout;
|
||||
|
||||
/*!
|
||||
* Tx management support variables
|
||||
*/
|
||||
static uint16_t TxPacketSize = 0;
|
||||
|
||||
|
||||
void SX1276LoRaInit( void )
|
||||
{
|
||||
RFLRState = RFLR_STATE_IDLE;
|
||||
|
||||
SX1276LoRaSetDefaults();
|
||||
|
||||
SX1276ReadBuffer( REG_LR_OPMODE, SX1276Regs + 1, 0x70 - 1 );
|
||||
|
||||
//SX1276LoRaSetOpMode( RFLR_OPMODE_SLEEP );
|
||||
|
||||
SX1276LR->RegLna = RFLR_LNA_GAIN_G1;
|
||||
SX1276WriteBuffer( REG_LR_OPMODE, SX1276Regs + 1, 0x70 - 1 );
|
||||
|
||||
// set the RF settings
|
||||
SX1276LoRaSetRFFrequency( LoRaSettings.RFFrequency );
|
||||
SX1276LoRaSetSpreadingFactor( LoRaSettings.SpreadingFactor );
|
||||
SX1276LoRaSetErrorCoding( LoRaSettings.ErrorCoding );
|
||||
SX1276LoRaSetPacketCrcOn( LoRaSettings.CrcOn );
|
||||
SX1276LoRaSetSignalBandwidth( LoRaSettings.SignalBw );
|
||||
SX1276LoRaSetImplicitHeaderOn( LoRaSettings.ImplicitHeaderOn );
|
||||
|
||||
SX1276LoRaSetSymbTimeout(0x3FF);
|
||||
SX1276LoRaSetPayloadLength( LoRaSettings.PayloadLength );
|
||||
SX1276LoRaSetLowDatarateOptimize( true );
|
||||
|
||||
#if( ( MODULE_SX1276RF1IAS == 1 ) || ( MODULE_SX1276RF1KAS == 1 ) )
|
||||
if( LoRaSettings.RFFrequency > 860000000 )
|
||||
{
|
||||
SX1276LoRaSetPAOutput( RFLR_PACONFIG_PASELECT_RFO );
|
||||
SX1276LoRaSetPa20dBm( false );
|
||||
LoRaSettings.Power = 14;
|
||||
SX1276LoRaSetRFPower( LoRaSettings.Power );
|
||||
}
|
||||
else
|
||||
{
|
||||
//SX1276Write( REG_LR_OCP, 0x3f );
|
||||
SX1276LoRaSetPAOutput( RFLR_PACONFIG_PASELECT_PABOOST );
|
||||
SX1276LoRaSetPa20dBm( true );
|
||||
LoRaSettings.Power = 20;
|
||||
SX1276LoRaSetRFPower( LoRaSettings.Power );
|
||||
}
|
||||
#elif( MODULE_SX1276RF1JAS == 1 )
|
||||
if( LoRaSettings.RFFrequency > 380000000 )
|
||||
{
|
||||
SX1276LoRaSetPAOutput( RFLR_PACONFIG_PASELECT_PABOOST );
|
||||
SX1276LoRaSetPa20dBm( true );
|
||||
LoRaSettings.Power = 20;
|
||||
SX1276LoRaSetRFPower( LoRaSettings.Power );
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276LoRaSetPAOutput( RFLR_PACONFIG_PASELECT_RFO );
|
||||
SX1276LoRaSetPa20dBm( false );
|
||||
LoRaSettings.Power = 14;
|
||||
SX1276LoRaSetRFPower( LoRaSettings.Power );
|
||||
}
|
||||
#endif
|
||||
SX1276LoRaSetOpMode( RFLR_OPMODE_STANDBY );
|
||||
|
||||
SX1276ReadBuffer( REG_LR_OPMODE, SX1276Regs + 1, 0x70 - 1 );
|
||||
}
|
||||
|
||||
void SX1276LoRaSetDefaults( void )
|
||||
{
|
||||
// REMARK: See SX1276 datasheet for modified default values.
|
||||
|
||||
// Sets IF frequency selection manual
|
||||
SX1276Read( REG_LR_VERSION, &SX1276LR->RegVersion );
|
||||
}
|
||||
|
||||
void SX1276LoRaReset( void )
|
||||
{
|
||||
uint32_t startTick;
|
||||
|
||||
SX1276SetReset( RADIO_RESET_ON );
|
||||
|
||||
// Wait 1ms
|
||||
startTick = GET_TICK_COUNT( );
|
||||
while( ( GET_TICK_COUNT( ) - startTick ) < TICK_RATE_MS( 1 ) );
|
||||
|
||||
SX1276SetReset( RADIO_RESET_OFF );
|
||||
|
||||
// Wait 6ms
|
||||
startTick = GET_TICK_COUNT( );
|
||||
while( ( GET_TICK_COUNT( ) - startTick ) < TICK_RATE_MS( 6 ) );
|
||||
}
|
||||
|
||||
void SX1276LoRaSetOpMode( uint8_t opMode )
|
||||
{
|
||||
static uint8_t opModePrev = RFLR_OPMODE_STANDBY;
|
||||
static bool antennaSwitchTxOnPrev = true;
|
||||
bool antennaSwitchTxOn = false;
|
||||
opModePrev = SX1276LR->RegOpMode & ~RFLR_OPMODE_MASK;
|
||||
if( opMode != opModePrev )
|
||||
{
|
||||
if( opMode == RFLR_OPMODE_TRANSMITTER )
|
||||
{
|
||||
antennaSwitchTxOn = true;
|
||||
}
|
||||
else
|
||||
{
|
||||
antennaSwitchTxOn = false;
|
||||
}
|
||||
if( antennaSwitchTxOn != antennaSwitchTxOnPrev )
|
||||
{
|
||||
antennaSwitchTxOnPrev = antennaSwitchTxOn; // Antenna switch control
|
||||
RXTX( antennaSwitchTxOn );
|
||||
}
|
||||
SX1276LR->RegOpMode = ( SX1276LR->RegOpMode & RFLR_OPMODE_MASK ) | opMode | RFLR_OPMODE_FREQMODE_ACCESS_LF;
|
||||
|
||||
SX1276Write( REG_LR_OPMODE, SX1276LR->RegOpMode );
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetOpMode( void )
|
||||
{
|
||||
SX1276Read( REG_LR_OPMODE, &SX1276LR->RegOpMode );
|
||||
|
||||
return SX1276LR->RegOpMode & ~RFLR_OPMODE_MASK;
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaReadRxGain( void )
|
||||
{
|
||||
|
||||
SX1276Read( REG_LR_LNA, &SX1276LR->RegLna );
|
||||
return( SX1276LR->RegLna >> 5 ) & 0x07;
|
||||
}
|
||||
|
||||
double SX1276LoRaReadRssi( void )
|
||||
{
|
||||
// Reads the RSSI value
|
||||
SX1276Read( REG_LR_RSSIVALUE, &SX1276LR->RegRssiValue );
|
||||
|
||||
if( LoRaSettings.RFFrequency < 860000000 )
|
||||
{
|
||||
return RssiOffsetLF[LoRaSettings.SignalBw] + ( double )SX1276LR->RegRssiValue;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RssiOffsetHF[LoRaSettings.SignalBw] + ( double )SX1276LR->RegRssiValue;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetPacketRxGain( void )
|
||||
{
|
||||
return RxGain;
|
||||
}
|
||||
|
||||
int8_t SX1276LoRaGetPacketSnr( void )
|
||||
{
|
||||
return RxPacketSnrEstimate;
|
||||
}
|
||||
|
||||
double SX1276LoRaGetPacketRssi( void )
|
||||
{
|
||||
return RxPacketRssiValue;
|
||||
}
|
||||
|
||||
void SX1276LoRaStartRx( void )
|
||||
{
|
||||
SX1276LoRaSetRFState( RFLR_STATE_RX_INIT );
|
||||
}
|
||||
|
||||
void SX1276LoRaGetRxPacket( void *buffer, uint16_t *size )
|
||||
{
|
||||
*size = RxPacketSize;
|
||||
RxPacketSize = 0;
|
||||
memcpy( (void*)buffer, (void*)RFBuffer, (size_t)*size );
|
||||
}
|
||||
|
||||
void SX1276LoRaSetTxPacket( const void *buffer, uint16_t size )
|
||||
{
|
||||
if( LoRaSettings.FreqHopOn == false )
|
||||
{
|
||||
TxPacketSize = size;
|
||||
}
|
||||
else
|
||||
{
|
||||
TxPacketSize = 255;
|
||||
}
|
||||
memcpy( ( void * )TFBuffer, buffer, ( size_t )TxPacketSize );
|
||||
|
||||
RFLRState = RFLR_STATE_TX_INIT;
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetRFState( void )
|
||||
{
|
||||
return RFLRState;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetRFState( uint8_t state )
|
||||
{
|
||||
RFLRState = state;
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief Process the LoRa modem Rx and Tx state machines depending on the
|
||||
* SX1276 operating mode.
|
||||
*
|
||||
* \retval rfState Current RF state [RF_IDLE, RF_BUSY,
|
||||
* RF_RX_DONE, RF_RX_TIMEOUT,
|
||||
* RF_TX_DONE, RF_TX_TIMEOUT]
|
||||
*/
|
||||
uint32_t SX1276LoRaProcess( void )
|
||||
{
|
||||
uint32_t result = RF_BUSY;
|
||||
uint8_t regValue = 0;
|
||||
|
||||
switch( RFLRState )
|
||||
{
|
||||
case RFLR_STATE_IDLE:
|
||||
break;
|
||||
case RFLR_STATE_RX_INIT:
|
||||
SX1276LoRaSetOpMode(RFLR_OPMODE_STANDBY);
|
||||
SX1276LR->RegIrqFlagsMask = RFLR_IRQFLAGS_RXTIMEOUT |
|
||||
//RFLR_IRQFLAGS_RXDONE |
|
||||
RFLR_IRQFLAGS_PAYLOADCRCERROR |
|
||||
RFLR_IRQFLAGS_VALIDHEADER |
|
||||
RFLR_IRQFLAGS_TXDONE |
|
||||
RFLR_IRQFLAGS_CADDONE |
|
||||
RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
|
||||
RFLR_IRQFLAGS_CADDETECTED;
|
||||
SX1276Write( REG_LR_IRQFLAGSMASK, SX1276LR->RegIrqFlagsMask );
|
||||
|
||||
if(LoRaSettings.FreqHopOn == true )
|
||||
{
|
||||
SX1276LR->RegHopPeriod = LoRaSettings.HopPeriod;
|
||||
|
||||
SX1276Read( REG_LR_HOPCHANNEL, &SX1276LR->RegHopChannel );
|
||||
SX1276LoRaSetRFFrequency( HoppingFrequencies[SX1276LR->RegHopChannel & RFLR_HOPCHANNEL_CHANNEL_MASK] );
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276LR->RegHopPeriod = 255;
|
||||
}
|
||||
|
||||
SX1276Write( REG_LR_HOPPERIOD, SX1276LR->RegHopPeriod );
|
||||
|
||||
if( LoRaSettings.RxSingleOn == true ) // Rx single mode
|
||||
{
|
||||
SX1276LoRaSetOpMode( RFLR_OPMODE_RECEIVER_SINGLE );
|
||||
}
|
||||
else // Rx continuous mode
|
||||
{
|
||||
SX1276LR->RegFifoAddrPtr = SX1276LR->RegFifoRxBaseAddr;
|
||||
|
||||
SX1276Write( REG_LR_FIFOADDRPTR, SX1276LR->RegFifoAddrPtr );
|
||||
SX1276LoRaSetOpMode( RFLR_OPMODE_RECEIVER );
|
||||
}
|
||||
memset( RFBuffer, 0, ( size_t )RF_BUFFER_SIZE );
|
||||
Rx_Time_Start=TickCounter;
|
||||
PacketTimeout = LoRaSettings.RxPacketTimeout;
|
||||
RxTimeoutTimer = GET_TICK_COUNT( );
|
||||
RFLRState = RFLR_STATE_RX_RUNNING;
|
||||
break;
|
||||
case RFLR_STATE_RX_RUNNING:
|
||||
SX1276Read(0x12, ®Value);
|
||||
// RxDone
|
||||
if(regValue & (1<<6))
|
||||
{
|
||||
RxTimeoutTimer = GET_TICK_COUNT( );
|
||||
if( LoRaSettings.FreqHopOn == true )
|
||||
{
|
||||
SX1276Read( REG_LR_HOPCHANNEL, &SX1276LR->RegHopChannel );
|
||||
SX1276LoRaSetRFFrequency( HoppingFrequencies[SX1276LR->RegHopChannel & RFLR_HOPCHANNEL_CHANNEL_MASK] );
|
||||
}
|
||||
// Clear Irq
|
||||
SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_RXDONE );
|
||||
RFLRState = RFLR_STATE_RX_DONE;
|
||||
}
|
||||
// FHSS Changed Channel
|
||||
if(regValue & (1<<1))
|
||||
{
|
||||
RxTimeoutTimer = GET_TICK_COUNT( );
|
||||
if( LoRaSettings.FreqHopOn == true )
|
||||
{
|
||||
SX1276Read( REG_LR_HOPCHANNEL, &SX1276LR->RegHopChannel );
|
||||
SX1276LoRaSetRFFrequency( HoppingFrequencies[SX1276LR->RegHopChannel & RFLR_HOPCHANNEL_CHANNEL_MASK] );
|
||||
}
|
||||
// Clear Irq
|
||||
SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
|
||||
//RxGain = SX1276LoRaReadRxGain( );
|
||||
}
|
||||
if( LoRaSettings.RxSingleOn == true ) // Rx single mode
|
||||
{
|
||||
if( ( GET_TICK_COUNT( ) - RxTimeoutTimer ) > PacketTimeout )
|
||||
{
|
||||
RFLRState = RFLR_STATE_RX_TIMEOUT;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case RFLR_STATE_RX_DONE:
|
||||
SX1276Read( REG_LR_IRQFLAGS, &SX1276LR->RegIrqFlags );
|
||||
if( ( SX1276LR->RegIrqFlags & RFLR_IRQFLAGS_PAYLOADCRCERROR ) == RFLR_IRQFLAGS_PAYLOADCRCERROR )
|
||||
{
|
||||
// Clear Irq
|
||||
SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_PAYLOADCRCERROR );
|
||||
if( LoRaSettings.RxSingleOn == true ) // Rx single mode
|
||||
{
|
||||
RFLRState = RFLR_STATE_RX_INIT;
|
||||
}
|
||||
else
|
||||
{
|
||||
RFLRState = RFLR_STATE_RX_RUNNING;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if( LoRaSettings.RxSingleOn == true ) // Rx single mode
|
||||
{
|
||||
SX1276LR->RegFifoAddrPtr = SX1276LR->RegFifoRxBaseAddr;
|
||||
SX1276Write( REG_LR_FIFOADDRPTR, SX1276LR->RegFifoAddrPtr );
|
||||
if( LoRaSettings.ImplicitHeaderOn == true )
|
||||
{
|
||||
RxPacketSize = SX1276LR->RegPayloadLength;
|
||||
SX1276ReadFifo( RFBuffer, SX1276LR->RegPayloadLength );
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276Read( REG_LR_NBRXBYTES, &SX1276LR->RegNbRxBytes );
|
||||
RxPacketSize = SX1276LR->RegNbRxBytes;
|
||||
SX1276ReadFifo( RFBuffer, SX1276LR->RegNbRxBytes );
|
||||
}
|
||||
}
|
||||
else // Rx continuous mode
|
||||
{
|
||||
SX1276Read( REG_LR_FIFORXCURRENTADDR, &SX1276LR->RegFifoRxCurrentAddr );
|
||||
if( LoRaSettings.ImplicitHeaderOn == true )
|
||||
{
|
||||
RxPacketSize = SX1276LR->RegPayloadLength;
|
||||
SX1276LR->RegFifoAddrPtr = SX1276LR->RegFifoRxCurrentAddr;
|
||||
SX1276Write( REG_LR_FIFOADDRPTR, SX1276LR->RegFifoAddrPtr );
|
||||
SX1276ReadFifo( RFBuffer, SX1276LR->RegPayloadLength );
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276Read( REG_LR_NBRXBYTES, &SX1276LR->RegNbRxBytes );
|
||||
RxPacketSize = SX1276LR->RegNbRxBytes;
|
||||
SX1276LR->RegFifoAddrPtr = SX1276LR->RegFifoRxCurrentAddr;
|
||||
SX1276Write( REG_LR_FIFOADDRPTR, SX1276LR->RegFifoAddrPtr );
|
||||
SX1276ReadFifo( RFBuffer, SX1276LR->RegNbRxBytes );
|
||||
}
|
||||
}
|
||||
if( LoRaSettings.RxSingleOn == true ) // Rx single mode
|
||||
{
|
||||
RFLRState = RFLR_STATE_RX_INIT;
|
||||
}
|
||||
else // Rx continuous mode
|
||||
{
|
||||
RFLRState = RFLR_STATE_RX_RUNNING;
|
||||
}
|
||||
Rx_Time_End=TickCounter;
|
||||
result = RF_RX_DONE;
|
||||
break;
|
||||
case RFLR_STATE_RX_TIMEOUT:
|
||||
RFLRState = RFLR_STATE_RX_INIT;
|
||||
result = RF_RX_TIMEOUT;
|
||||
break;
|
||||
case RFLR_STATE_TX_INIT:
|
||||
Tx_Time_Start = TickCounter;
|
||||
|
||||
// Initializes the payload size
|
||||
SX1276LR->RegPayloadLength = TxPacketSize;
|
||||
SX1276Write( REG_LR_PAYLOADLENGTH, SX1276LR->RegPayloadLength );
|
||||
|
||||
SX1276LR->RegFifoTxBaseAddr = 0x00; // Full buffer used for Tx
|
||||
SX1276Write( REG_LR_FIFOTXBASEADDR, SX1276LR->RegFifoTxBaseAddr );
|
||||
|
||||
SX1276LR->RegFifoAddrPtr = SX1276LR->RegFifoTxBaseAddr;
|
||||
SX1276Write( REG_LR_FIFOADDRPTR, SX1276LR->RegFifoAddrPtr );
|
||||
|
||||
SX1276LoRaSetOpMode( RFLR_OPMODE_STANDBY );
|
||||
|
||||
// Write payload buffer to LORA modem
|
||||
SX1276WriteFifo( TFBuffer, SX1276LR->RegPayloadLength );
|
||||
|
||||
if( LoRaSettings.FreqHopOn == true )
|
||||
{
|
||||
SX1276LR->RegIrqFlagsMask = RFLR_IRQFLAGS_RXTIMEOUT |
|
||||
RFLR_IRQFLAGS_RXDONE |
|
||||
RFLR_IRQFLAGS_PAYLOADCRCERROR |
|
||||
RFLR_IRQFLAGS_VALIDHEADER |
|
||||
//RFLR_IRQFLAGS_TXDONE |
|
||||
RFLR_IRQFLAGS_CADDONE |
|
||||
RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
|
||||
RFLR_IRQFLAGS_CADDETECTED;
|
||||
SX1276LR->RegHopPeriod = LoRaSettings.HopPeriod;
|
||||
SX1276Read( REG_LR_HOPCHANNEL, &SX1276LR->RegHopChannel );
|
||||
SX1276LoRaSetRFFrequency( HoppingFrequencies[SX1276LR->RegHopChannel & RFLR_HOPCHANNEL_CHANNEL_MASK] );
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276LR->RegIrqFlagsMask = RFLR_IRQFLAGS_RXTIMEOUT |
|
||||
RFLR_IRQFLAGS_RXDONE |
|
||||
RFLR_IRQFLAGS_PAYLOADCRCERROR |
|
||||
RFLR_IRQFLAGS_VALIDHEADER |
|
||||
//RFLR_IRQFLAGS_TXDONE |
|
||||
RFLR_IRQFLAGS_CADDONE |
|
||||
RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
|
||||
RFLR_IRQFLAGS_CADDETECTED;
|
||||
SX1276LR->RegHopPeriod = 0;
|
||||
}
|
||||
SX1276Write( REG_LR_HOPPERIOD, SX1276LR->RegHopPeriod );
|
||||
SX1276Write( REG_LR_IRQFLAGSMASK, SX1276LR->RegIrqFlagsMask );
|
||||
|
||||
SX1276Write( REG_LR_DIOMAPPING1, ( regValue & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_01 );//DIO0设置为TXdone中断
|
||||
|
||||
SX1276LoRaSetOpMode( RFLR_OPMODE_TRANSMITTER );
|
||||
|
||||
RFLRState = RFLR_STATE_TX_RUNNING;
|
||||
break;
|
||||
case RFLR_STATE_TX_RUNNING:
|
||||
SX1276Read(0x12, ®Value);
|
||||
if(regValue & (1<<3))
|
||||
{
|
||||
// Clear Irq
|
||||
SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_TXDONE );
|
||||
RFLRState = RFLR_STATE_TX_DONE;
|
||||
}
|
||||
// FHSS Changed Channel
|
||||
if(regValue & (1<<3))
|
||||
{
|
||||
if( LoRaSettings.FreqHopOn == true )
|
||||
{
|
||||
SX1276Read( REG_LR_HOPCHANNEL, &SX1276LR->RegHopChannel );
|
||||
SX1276LoRaSetRFFrequency( HoppingFrequencies[SX1276LR->RegHopChannel & RFLR_HOPCHANNEL_CHANNEL_MASK] );
|
||||
}
|
||||
// Clear Irq
|
||||
SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
|
||||
}
|
||||
break;
|
||||
case RFLR_STATE_TX_DONE:
|
||||
Tx_Time_End=TickCounter;
|
||||
SX1276LoRaSetOpMode( RFLR_OPMODE_STANDBY );
|
||||
RFLRState = RFLR_STATE_IDLE;
|
||||
result = RF_TX_DONE;
|
||||
break;
|
||||
case RFLR_STATE_CAD_INIT:
|
||||
// optimize the power consumption by switching off the transmitter as soon as the packet has been sent
|
||||
SX1276LoRaSetOpMode( RFLR_OPMODE_STANDBY );
|
||||
SX1276LR->RegIrqFlagsMask = RFLR_IRQFLAGS_RXTIMEOUT |
|
||||
RFLR_IRQFLAGS_RXDONE |
|
||||
RFLR_IRQFLAGS_PAYLOADCRCERROR |
|
||||
RFLR_IRQFLAGS_VALIDHEADER |
|
||||
RFLR_IRQFLAGS_TXDONE |
|
||||
//RFLR_IRQFLAGS_CADDONE |
|
||||
RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL;
|
||||
//RFLR_IRQFLAGS_CADDETECTED;
|
||||
SX1276Write( REG_LR_IRQFLAGSMASK, SX1276LR->RegIrqFlagsMask );
|
||||
|
||||
SX1276LoRaSetOpMode( RFLR_OPMODE_CAD );
|
||||
RFLRState = RFLR_STATE_CAD_RUNNING;
|
||||
|
||||
break;
|
||||
case RFLR_STATE_CAD_RUNNING:
|
||||
SX1276Read(0x12,®Value);
|
||||
int cad_done = regValue & (1<<2);
|
||||
int cad_detected = regValue & (1<<0);
|
||||
|
||||
if( cad_done ) //CAD Done interrupt
|
||||
{
|
||||
SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDONE );
|
||||
if( cad_detected ) // CAD Detected interrupt
|
||||
{
|
||||
SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDETECTED );
|
||||
//CAD detected, we have a LoRa preamble
|
||||
RFLRState = RFLR_STATE_RX_INIT;
|
||||
result = RF_CHANNEL_ACTIVITY_DETECTED;
|
||||
}
|
||||
else
|
||||
{
|
||||
// The device goes in Standby Mode automatically
|
||||
RFLRState = RFLR_STATE_IDLE;
|
||||
result = RF_CHANNEL_EMPTY;
|
||||
}
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
uint32_t SX1276LoraChannelEmpty( void )
|
||||
{
|
||||
uint32_t result = 0;
|
||||
RFLRState = RFLR_STATE_CAD_INIT;
|
||||
SX1276LoRaProcess();
|
||||
while(RFLRState == RFLR_STATE_CAD_RUNNING)
|
||||
{
|
||||
//KPrintf("\nLora--SX1276LoRaProcess()");
|
||||
result = SX1276LoRaProcess();
|
||||
}
|
||||
|
||||
if(result == RF_CHANNEL_EMPTY)
|
||||
{
|
||||
KPrintf("\nLora--RF_CHANNEL_EMPTY\n");
|
||||
return 0;
|
||||
}
|
||||
else if(result == RF_CHANNEL_ACTIVITY_DETECTED)
|
||||
{
|
||||
KPrintf("\nLora--RF_CHANNEL_ACTIVITY_DETECTED\n");
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
return 2;
|
||||
}
|
||||
}
|
||||
|
||||
#endif // USE_SX1276_RADIO
|
|
@ -0,0 +1,820 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Original Copyright (C) SEMTECH S.A.
|
||||
* Modified Copyright (C) 2020 AIIT XUOS Lab
|
||||
*/
|
||||
/*!
|
||||
* \file sx1276-LoRa.h
|
||||
* \brief SX1276 RF chip driver mode LoRa
|
||||
*
|
||||
* \version 2.0.0
|
||||
* \date Nov 21 2012
|
||||
* \author Miguel Luis
|
||||
*
|
||||
* Last modified by Miguel Luis on Jun 19 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: sx1276-LoRa.h
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
|
||||
#ifndef __SX1276_LORA_H__
|
||||
#define __SX1276_LORA_H__
|
||||
|
||||
#include "stdint.h"
|
||||
#include "stdbool.h"
|
||||
|
||||
|
||||
//SX1276一些配置参数设置
|
||||
typedef struct sLoRaSettings
|
||||
{
|
||||
uint32_t RFFrequency; //无线通信频率
|
||||
int8_t Power; //功率
|
||||
uint8_t SignalBw; //LORA 带宽[0: 7.8 kHz, 1: 10.4 kHz, 2: 15.6 kHz, 3: 20.8 kHz, 4: 31.2 kHz,
|
||||
//5: 41.6 kHz, 6: 62.5 kHz, 7: 125 kHz, 8: 250 kHz, 9: 500 kHz, other: Reserved]
|
||||
uint8_t SpreadingFactor; //扩频因子 LORA [6: 64, 7: 128, 8: 256, 9: 512, 10: 1024, 11: 2048, 12: 4096 chips]
|
||||
uint8_t ErrorCoding; //LORA 纠错码 [1: 4/5, 2: 4/6, 3: 4/7, 4: 4/8]
|
||||
bool CrcOn; //CRC效验开关 [0: OFF, 1: ON]
|
||||
bool ImplicitHeaderOn; //隐藏头部信息开关 [0: OFF, 1: ON]
|
||||
bool RxSingleOn; //接收单次模式\连续模式配置[0: Continuous, 1 Single]
|
||||
bool FreqHopOn; //跳频模式开关 [0: OFF, 1: ON]
|
||||
uint8_t HopPeriod; //跳频之间的周期长度 Hops every frequency hopping period symbols
|
||||
uint32_t TxPacketTimeout; //最大发送时间
|
||||
uint32_t RxPacketTimeout; //最大接收时间
|
||||
uint8_t PayloadLength; //数据长度
|
||||
}tLoRaSettings;
|
||||
|
||||
//RF数据包大小(模块配备了256Byte的RAM缓存,该缓存仅能通过LoRa模式访问)
|
||||
#define RF_BUFFER_SIZE_MAX 256
|
||||
#define RF_BUFFER_SIZE 256
|
||||
|
||||
|
||||
//LoRa的返回值
|
||||
typedef enum
|
||||
{
|
||||
RFLR_STATE_IDLE,
|
||||
RFLR_STATE_RX_INIT,
|
||||
RFLR_STATE_RX_RUNNING,
|
||||
RFLR_STATE_RX_DONE,
|
||||
RFLR_STATE_RX_TIMEOUT,
|
||||
RFLR_STATE_TX_INIT,
|
||||
RFLR_STATE_TX_RUNNING,
|
||||
RFLR_STATE_TX_DONE,
|
||||
RFLR_STATE_TX_TIMEOUT,
|
||||
RFLR_STATE_CAD_INIT,
|
||||
RFLR_STATE_CAD_RUNNING,
|
||||
}tRFLRStates;
|
||||
|
||||
|
||||
//SX1276 definitions
|
||||
#define XTAL_FREQ 32000000
|
||||
#define FREQ_STEP 61.03515625
|
||||
|
||||
/*LoRa模式寄存器映射*/
|
||||
//SX1276内部寄存器地址
|
||||
#define REG_LR_FIFO 0x00 //FIFO 数据输入/输出。当器件处于睡眠模式时,FIFO被清零,无法访问。
|
||||
|
||||
//通用寄存器
|
||||
#define REG_LR_OPMODE 0x01 //关于模式选择相关的寄存器
|
||||
#define REG_LR_BANDSETTING 0x04
|
||||
#define REG_LR_FRFMSB 0x06 //RF 载波频率最高有效位
|
||||
#define REG_LR_FRFMID 0x07 //RF 载波频率中间有效位
|
||||
#define REG_LR_FRFLSB 0x08 //RF 载波频率最低有效位
|
||||
|
||||
//RF模块寄存器
|
||||
#define REG_LR_PACONFIG 0x09
|
||||
#define REG_LR_PARAMP 0x0A
|
||||
#define REG_LR_OCP 0x0B
|
||||
#define REG_LR_LNA 0x0C
|
||||
|
||||
//LoRa页面寄存器
|
||||
#define REG_LR_FIFOADDRPTR 0x0D
|
||||
#define REG_LR_FIFOTXBASEADDR 0x0E
|
||||
#define REG_LR_FIFORXBASEADDR 0x0F
|
||||
#define REG_LR_FIFORXCURRENTADDR 0x10
|
||||
#define REG_LR_IRQFLAGSMASK 0x11 //IAQ标志屏蔽
|
||||
#define REG_LR_IRQFLAGS 0x12
|
||||
#define REG_LR_NBRXBYTES 0x13
|
||||
#define REG_LR_RXHEADERCNTVALUEMSB 0x14
|
||||
#define REG_LR_RXHEADERCNTVALUELSB 0x15
|
||||
#define REG_LR_RXPACKETCNTVALUEMSB 0x16
|
||||
#define REG_LR_RXPACKETCNTVALUELSB 0x17
|
||||
#define REG_LR_MODEMSTAT 0x18
|
||||
#define REG_LR_PKTSNRVALUE 0x19
|
||||
#define REG_LR_PKTRSSIVALUE 0x1A
|
||||
#define REG_LR_RSSIVALUE 0x1B
|
||||
#define REG_LR_HOPCHANNEL 0x1C
|
||||
#define REG_LR_MODEMCONFIG1 0x1D
|
||||
#define REG_LR_MODEMCONFIG2 0x1E
|
||||
#define REG_LR_SYMBTIMEOUTLSB 0x1F
|
||||
#define REG_LR_PREAMBLEMSB 0x20
|
||||
#define REG_LR_PREAMBLELSB 0x21
|
||||
#define REG_LR_PAYLOADLENGTH 0x22
|
||||
#define REG_LR_PAYLOADMAXLENGTH 0x23
|
||||
#define REG_LR_HOPPERIOD 0x24
|
||||
#define REG_LR_FIFORXBYTEADDR 0x25
|
||||
#define REG_LR_MODEMCONFIG3 0x26
|
||||
/*以上是LoRa模式寄存器映射*/
|
||||
|
||||
//IO控制寄存器(关于DI00-DI05的映射设置)
|
||||
#define REG_LR_DIOMAPPING1 0x40
|
||||
#define REG_LR_DIOMAPPING2 0x41
|
||||
|
||||
//版本寄存器
|
||||
#define REG_LR_VERSION 0x42
|
||||
|
||||
//附加寄存器
|
||||
#define REG_LR_PLLHOP 0x44
|
||||
#define REG_LR_TCXO 0x4B
|
||||
#define REG_LR_PADAC 0x4D
|
||||
#define REG_LR_FORMERTEMP 0x5B
|
||||
#define REG_LR_BITRATEFRAC 0x5D
|
||||
#define REG_LR_AGCREF 0x61
|
||||
#define REG_LR_AGCTHRESH1 0x62
|
||||
#define REG_LR_AGCTHRESH2 0x63
|
||||
#define REG_LR_AGCTHRESH3 0x64
|
||||
|
||||
//与模式选择相关的宏定义 RegOpMode(寄存器地址0X01)
|
||||
#define RFLR_OPMODE_LONGRANGEMODE_MASK 0x7F
|
||||
#define RFLR_OPMODE_LONGRANGEMODE_OFF 0x00 // Default
|
||||
#define RFLR_OPMODE_LONGRANGEMODE_ON 0x80
|
||||
|
||||
#define RFLR_OPMODE_ACCESSSHAREDREG_MASK 0xBF
|
||||
#define RFLR_OPMODE_ACCESSSHAREDREG_ENABLE 0x40
|
||||
#define RFLR_OPMODE_ACCESSSHAREDREG_DISABLE 0x00 // Default
|
||||
|
||||
#define RFLR_OPMODE_FREQMODE_ACCESS_MASK 0xF7
|
||||
#define RFLR_OPMODE_FREQMODE_ACCESS_LF 0x08 // Default
|
||||
#define RFLR_OPMODE_FREQMODE_ACCESS_HF 0x00
|
||||
|
||||
#define RFLR_OPMODE_MASK 0xF8
|
||||
#define RFLR_OPMODE_SLEEP 0x00 //睡眠模式
|
||||
#define RFLR_OPMODE_STANDBY 0x01 //待机模式
|
||||
#define RFLR_OPMODE_SYNTHESIZER_TX 0x02 //频率合成器转换至Tx频率
|
||||
#define RFLR_OPMODE_TRANSMITTER 0x03 //发送模式
|
||||
#define RFLR_OPMODE_SYNTHESIZER_RX 0x04 //频率合成器转换至Rx频率
|
||||
#define RFLR_OPMODE_RECEIVER 0x05 //接收模式
|
||||
|
||||
#define RFLR_OPMODE_RECEIVER_SINGLE 0x06 //单次接收模式
|
||||
#define RFLR_OPMODE_CAD 0x07 //CAD模式
|
||||
|
||||
//与位带操作相关的宏定义
|
||||
#define RFLR_BANDSETTING_MASK 0x3F
|
||||
#define RFLR_BANDSETTING_AUTO 0x00 // Default
|
||||
#define RFLR_BANDSETTING_DIV_BY_1 0x40
|
||||
#define RFLR_BANDSETTING_DIV_BY_2 0x80
|
||||
#define RFLR_BANDSETTING_DIV_BY_6 0xC0
|
||||
|
||||
//射频载波频率设置相关宏定义 RegFrf (MHz)(寄存器地址0x06,0x07,0x08)
|
||||
#define RFLR_FRFMSB_434_MHZ 0x6C // Default
|
||||
#define RFLR_FRFMID_434_MHZ 0x80 // Default
|
||||
#define RFLR_FRFLSB_434_MHZ 0x00 // Default
|
||||
|
||||
#define RFLR_FRFMSB_470_MHZ 0x73 // Default
|
||||
#define RFLR_FRFMID_470_MHZ 0xBB // Default
|
||||
#define RFLR_FRFLSB_470_MHZ 0xBB // Default
|
||||
|
||||
#define RFLR_FRFMSB_863_MHZ 0xD7
|
||||
#define RFLR_FRFMID_863_MHZ 0xC0
|
||||
#define RFLR_FRFLSB_863_MHZ 0x00
|
||||
#define RFLR_FRFMSB_864_MHZ 0xD8
|
||||
#define RFLR_FRFMID_864_MHZ 0x00
|
||||
#define RFLR_FRFLSB_864_MHZ 0x00
|
||||
#define RFLR_FRFMSB_865_MHZ 0xD8
|
||||
#define RFLR_FRFMID_865_MHZ 0x40
|
||||
#define RFLR_FRFLSB_865_MHZ 0x00
|
||||
#define RFLR_FRFMSB_866_MHZ 0xD8
|
||||
#define RFLR_FRFMID_866_MHZ 0x80
|
||||
#define RFLR_FRFLSB_866_MHZ 0x00
|
||||
#define RFLR_FRFMSB_867_MHZ 0xD8
|
||||
#define RFLR_FRFMID_867_MHZ 0xC0
|
||||
#define RFLR_FRFLSB_867_MHZ 0x00
|
||||
#define RFLR_FRFMSB_868_MHZ 0xD9
|
||||
#define RFLR_FRFMID_868_MHZ 0x00
|
||||
#define RFLR_FRFLSB_868_MHZ 0x00
|
||||
#define RFLR_FRFMSB_869_MHZ 0xD9
|
||||
#define RFLR_FRFMID_869_MHZ 0x40
|
||||
#define RFLR_FRFLSB_869_MHZ 0x00
|
||||
#define RFLR_FRFMSB_870_MHZ 0xD9
|
||||
#define RFLR_FRFMID_870_MHZ 0x80
|
||||
#define RFLR_FRFLSB_870_MHZ 0x00
|
||||
|
||||
#define RFLR_FRFMSB_902_MHZ 0xE1
|
||||
#define RFLR_FRFMID_902_MHZ 0x80
|
||||
#define RFLR_FRFLSB_902_MHZ 0x00
|
||||
#define RFLR_FRFMSB_903_MHZ 0xE1
|
||||
#define RFLR_FRFMID_903_MHZ 0xC0
|
||||
#define RFLR_FRFLSB_903_MHZ 0x00
|
||||
#define RFLR_FRFMSB_904_MHZ 0xE2
|
||||
#define RFLR_FRFMID_904_MHZ 0x00
|
||||
#define RFLR_FRFLSB_904_MHZ 0x00
|
||||
#define RFLR_FRFMSB_905_MHZ 0xE2
|
||||
#define RFLR_FRFMID_905_MHZ 0x40
|
||||
#define RFLR_FRFLSB_905_MHZ 0x00
|
||||
#define RFLR_FRFMSB_906_MHZ 0xE2
|
||||
#define RFLR_FRFMID_906_MHZ 0x80
|
||||
#define RFLR_FRFLSB_906_MHZ 0x00
|
||||
#define RFLR_FRFMSB_907_MHZ 0xE2
|
||||
#define RFLR_FRFMID_907_MHZ 0xC0
|
||||
#define RFLR_FRFLSB_907_MHZ 0x00
|
||||
#define RFLR_FRFMSB_908_MHZ 0xE3
|
||||
#define RFLR_FRFMID_908_MHZ 0x00
|
||||
#define RFLR_FRFLSB_908_MHZ 0x00
|
||||
#define RFLR_FRFMSB_909_MHZ 0xE3
|
||||
#define RFLR_FRFMID_909_MHZ 0x40
|
||||
#define RFLR_FRFLSB_909_MHZ 0x00
|
||||
#define RFLR_FRFMSB_910_MHZ 0xE3
|
||||
#define RFLR_FRFMID_910_MHZ 0x80
|
||||
#define RFLR_FRFLSB_910_MHZ 0x00
|
||||
#define RFLR_FRFMSB_911_MHZ 0xE3
|
||||
#define RFLR_FRFMID_911_MHZ 0xC0
|
||||
#define RFLR_FRFLSB_911_MHZ 0x00
|
||||
#define RFLR_FRFMSB_912_MHZ 0xE4
|
||||
#define RFLR_FRFMID_912_MHZ 0x00
|
||||
#define RFLR_FRFLSB_912_MHZ 0x00
|
||||
#define RFLR_FRFMSB_913_MHZ 0xE4
|
||||
#define RFLR_FRFMID_913_MHZ 0x40
|
||||
#define RFLR_FRFLSB_913_MHZ 0x00
|
||||
#define RFLR_FRFMSB_914_MHZ 0xE4
|
||||
#define RFLR_FRFMID_914_MHZ 0x80
|
||||
#define RFLR_FRFLSB_914_MHZ 0x00
|
||||
#define RFLR_FRFMSB_915_MHZ 0xE4 // Default
|
||||
#define RFLR_FRFMID_915_MHZ 0xC0 // Default
|
||||
#define RFLR_FRFLSB_915_MHZ 0x00 // Default
|
||||
#define RFLR_FRFMSB_916_MHZ 0xE5
|
||||
#define RFLR_FRFMID_916_MHZ 0x00
|
||||
#define RFLR_FRFLSB_916_MHZ 0x00
|
||||
#define RFLR_FRFMSB_917_MHZ 0xE5
|
||||
#define RFLR_FRFMID_917_MHZ 0x40
|
||||
#define RFLR_FRFLSB_917_MHZ 0x00
|
||||
#define RFLR_FRFMSB_918_MHZ 0xE5
|
||||
#define RFLR_FRFMID_918_MHZ 0x80
|
||||
#define RFLR_FRFLSB_918_MHZ 0x00
|
||||
#define RFLR_FRFMSB_919_MHZ 0xE5
|
||||
#define RFLR_FRFMID_919_MHZ 0xC0
|
||||
#define RFLR_FRFLSB_919_MHZ 0x00
|
||||
#define RFLR_FRFMSB_920_MHZ 0xE6
|
||||
#define RFLR_FRFMID_920_MHZ 0x00
|
||||
#define RFLR_FRFLSB_920_MHZ 0x00
|
||||
#define RFLR_FRFMSB_921_MHZ 0xE6
|
||||
#define RFLR_FRFMID_921_MHZ 0x40
|
||||
#define RFLR_FRFLSB_921_MHZ 0x00
|
||||
#define RFLR_FRFMSB_922_MHZ 0xE6
|
||||
#define RFLR_FRFMID_922_MHZ 0x80
|
||||
#define RFLR_FRFLSB_922_MHZ 0x00
|
||||
#define RFLR_FRFMSB_923_MHZ 0xE6
|
||||
#define RFLR_FRFMID_923_MHZ 0xC0
|
||||
#define RFLR_FRFLSB_923_MHZ 0x00
|
||||
#define RFLR_FRFMSB_924_MHZ 0xE7
|
||||
#define RFLR_FRFMID_924_MHZ 0x00
|
||||
#define RFLR_FRFLSB_924_MHZ 0x00
|
||||
#define RFLR_FRFMSB_925_MHZ 0xE7
|
||||
#define RFLR_FRFMID_925_MHZ 0x40
|
||||
#define RFLR_FRFLSB_925_MHZ 0x00
|
||||
#define RFLR_FRFMSB_926_MHZ 0xE7
|
||||
#define RFLR_FRFMID_926_MHZ 0x80
|
||||
#define RFLR_FRFLSB_926_MHZ 0x00
|
||||
#define RFLR_FRFMSB_927_MHZ 0xE7
|
||||
#define RFLR_FRFMID_927_MHZ 0xC0
|
||||
#define RFLR_FRFLSB_927_MHZ 0x00
|
||||
#define RFLR_FRFMSB_928_MHZ 0xE8
|
||||
#define RFLR_FRFMID_928_MHZ 0x00
|
||||
#define RFLR_FRFLSB_928_MHZ 0x00
|
||||
|
||||
//PA(功率放大器) 选择和输出功率控制设置相关宏定义 RegPaConfig(寄存器地址0X09)
|
||||
#define RFLR_PACONFIG_PASELECT_MASK 0x7F
|
||||
#define RFLR_PACONFIG_PASELECT_PABOOST 0x80
|
||||
#define RFLR_PACONFIG_PASELECT_RFO 0x00 // Default
|
||||
|
||||
#define RFLR_PACONFIG_MAX_POWER_MASK 0x8F
|
||||
|
||||
#define RFLR_PACONFIG_OUTPUTPOWER_MASK 0xF0
|
||||
|
||||
//PA(功率放大器) 斜升/斜降时间和低相噪设置相关定义 RegPaRamp(寄存器地址0X0A)
|
||||
#define RFLR_PARAMP_TXBANDFORCE_MASK 0xEF
|
||||
#define RFLR_PARAMP_TXBANDFORCE_BAND_SEL 0x10
|
||||
#define RFLR_PARAMP_TXBANDFORCE_AUTO 0x00 // Default
|
||||
|
||||
#define RFLR_PARAMP_MASK 0xF0
|
||||
#define RFLR_PARAMP_3400_US 0x00
|
||||
#define RFLR_PARAMP_2000_US 0x01
|
||||
#define RFLR_PARAMP_1000_US 0x02
|
||||
#define RFLR_PARAMP_0500_US 0x03
|
||||
#define RFLR_PARAMP_0250_US 0x04
|
||||
#define RFLR_PARAMP_0125_US 0x05
|
||||
#define RFLR_PARAMP_0100_US 0x06
|
||||
#define RFLR_PARAMP_0062_US 0x07
|
||||
#define RFLR_PARAMP_0050_US 0x08
|
||||
#define RFLR_PARAMP_0040_US 0x09 // Default
|
||||
#define RFLR_PARAMP_0031_US 0x0A
|
||||
#define RFLR_PARAMP_0025_US 0x0B
|
||||
#define RFLR_PARAMP_0020_US 0x0C
|
||||
#define RFLR_PARAMP_0015_US 0x0D
|
||||
#define RFLR_PARAMP_0012_US 0x0E
|
||||
#define RFLR_PARAMP_0010_US 0x0F
|
||||
|
||||
//过流保护控制设置相关宏定义 RegOcp(寄存器地址0X0B)
|
||||
#define RFLR_OCP_MASK 0xDF
|
||||
#define RFLR_OCP_ON 0x20 // Default
|
||||
#define RFLR_OCP_OFF 0x00
|
||||
|
||||
#define RFLR_OCP_TRIM_MASK 0xE0
|
||||
#define RFLR_OCP_TRIM_045_MA 0x00
|
||||
#define RFLR_OCP_TRIM_050_MA 0x01
|
||||
#define RFLR_OCP_TRIM_055_MA 0x02
|
||||
#define RFLR_OCP_TRIM_060_MA 0x03
|
||||
#define RFLR_OCP_TRIM_065_MA 0x04
|
||||
#define RFLR_OCP_TRIM_070_MA 0x05
|
||||
#define RFLR_OCP_TRIM_075_MA 0x06
|
||||
#define RFLR_OCP_TRIM_080_MA 0x07
|
||||
#define RFLR_OCP_TRIM_085_MA 0x08
|
||||
#define RFLR_OCP_TRIM_090_MA 0x09
|
||||
#define RFLR_OCP_TRIM_095_MA 0x0A
|
||||
#define RFLR_OCP_TRIM_100_MA 0x0B // Default
|
||||
#define RFLR_OCP_TRIM_105_MA 0x0C
|
||||
#define RFLR_OCP_TRIM_110_MA 0x0D
|
||||
#define RFLR_OCP_TRIM_115_MA 0x0E
|
||||
#define RFLR_OCP_TRIM_120_MA 0x0F
|
||||
#define RFLR_OCP_TRIM_130_MA 0x10
|
||||
#define RFLR_OCP_TRIM_140_MA 0x11
|
||||
#define RFLR_OCP_TRIM_150_MA 0x12
|
||||
#define RFLR_OCP_TRIM_160_MA 0x13
|
||||
#define RFLR_OCP_TRIM_170_MA 0x14
|
||||
#define RFLR_OCP_TRIM_180_MA 0x15
|
||||
#define RFLR_OCP_TRIM_190_MA 0x16
|
||||
#define RFLR_OCP_TRIM_200_MA 0x17
|
||||
#define RFLR_OCP_TRIM_210_MA 0x18
|
||||
#define RFLR_OCP_TRIM_220_MA 0x19
|
||||
#define RFLR_OCP_TRIM_230_MA 0x1A
|
||||
#define RFLR_OCP_TRIM_240_MA 0x1B
|
||||
|
||||
//LNA(低噪声放大器 )设置相关宏定义 RegLna(寄存器地址0X0C)
|
||||
#define RFLR_LNA_GAIN_MASK 0x1F
|
||||
#define RFLR_LNA_GAIN_G1 0x20 // Default
|
||||
#define RFLR_LNA_GAIN_G2 0x40
|
||||
#define RFLR_LNA_GAIN_G3 0x60
|
||||
#define RFLR_LNA_GAIN_G4 0x80
|
||||
#define RFLR_LNA_GAIN_G5 0xA0
|
||||
#define RFLR_LNA_GAIN_G6 0xC0
|
||||
|
||||
#define RFLR_LNA_BOOST_LF_MASK 0xE7
|
||||
#define RFLR_LNA_BOOST_LF_DEFAULT 0x00 // Default
|
||||
#define RFLR_LNA_BOOST_LF_GAIN 0x08
|
||||
#define RFLR_LNA_BOOST_LF_IP3 0x10
|
||||
#define RFLR_LNA_BOOST_LF_BOOST 0x18
|
||||
|
||||
#define RFLR_LNA_RXBANDFORCE_MASK 0xFB
|
||||
#define RFLR_LNA_RXBANDFORCE_BAND_SEL 0x04
|
||||
#define RFLR_LNA_RXBANDFORCE_AUTO 0x00 // Default
|
||||
|
||||
#define RFLR_LNA_BOOST_HF_MASK 0xFC
|
||||
#define RFLR_LNA_BOOST_HF_OFF 0x00 // Default
|
||||
#define RFLR_LNA_BOOST_HF_ON 0x03
|
||||
|
||||
|
||||
//FIFO 数据缓冲区中 SPI 接口地址指针(寄存器地址0X0D)
|
||||
#define RFLR_FIFOADDRPTR 0x00 // Default
|
||||
|
||||
//发送信息的起始位置
|
||||
#define RFLR_FIFOTXBASEADDR 0x80 // Default
|
||||
|
||||
//接收信息的起始位置
|
||||
#define RFLR_FIFORXBASEADDR 0x00 // Default
|
||||
|
||||
/*!
|
||||
* RegFifoRxCurrentAddr (Read Only)
|
||||
*/
|
||||
|
||||
//关于中断屏蔽相关的宏定义
|
||||
#define RFLR_IRQFLAGS_RXTIMEOUT_MASK 0x80
|
||||
#define RFLR_IRQFLAGS_RXDONE_MASK 0x40
|
||||
#define RFLR_IRQFLAGS_PAYLOADCRCERROR_MASK 0x20
|
||||
#define RFLR_IRQFLAGS_VALIDHEADER_MASK 0x10
|
||||
#define RFLR_IRQFLAGS_TXDONE_MASK 0x08
|
||||
#define RFLR_IRQFLAGS_CADDONE_MASK 0x04
|
||||
#define RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL_MASK 0x02
|
||||
#define RFLR_IRQFLAGS_CADDETECTED_MASK 0x01
|
||||
|
||||
//关于中断打开相关的宏定义
|
||||
#define RFLR_IRQFLAGS_RXTIMEOUT 0x80
|
||||
#define RFLR_IRQFLAGS_RXDONE 0x40
|
||||
#define RFLR_IRQFLAGS_PAYLOADCRCERROR 0x20
|
||||
#define RFLR_IRQFLAGS_VALIDHEADER 0x10
|
||||
#define RFLR_IRQFLAGS_TXDONE 0x08
|
||||
#define RFLR_IRQFLAGS_CADDONE 0x04
|
||||
#define RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL 0x02
|
||||
#define RFLR_IRQFLAGS_CADDETECTED 0x01
|
||||
|
||||
|
||||
|
||||
/*!
|
||||
* RegFifoRxNbBytes (Read Only) //
|
||||
*/
|
||||
|
||||
|
||||
/*!
|
||||
* RegRxHeaderCntValueMsb (Read Only) //
|
||||
*/
|
||||
|
||||
|
||||
/*!
|
||||
* RegRxHeaderCntValueLsb (Read Only) //
|
||||
*/
|
||||
|
||||
|
||||
/*!
|
||||
* RegRxPacketCntValueMsb (Read Only) //
|
||||
*/
|
||||
|
||||
|
||||
/*!
|
||||
* RegRxPacketCntValueLsb (Read Only) //
|
||||
*/
|
||||
|
||||
|
||||
/*!
|
||||
* RegModemStat (Read Only) //
|
||||
*/
|
||||
#define RFLR_MODEMSTAT_RX_CR_MASK 0x1F
|
||||
#define RFLR_MODEMSTAT_MODEM_STATUS_MASK 0xE0
|
||||
|
||||
/*!
|
||||
* RegPktSnrValue (Read Only) //
|
||||
*/
|
||||
|
||||
|
||||
/*!
|
||||
* RegPktRssiValue (Read Only) //
|
||||
*/
|
||||
|
||||
|
||||
/*!
|
||||
* RegRssiValue (Read Only) //
|
||||
*/
|
||||
|
||||
|
||||
//与信号宽度,纠错编码率,是否显示报头有关宏定义(寄存器位置0X1D)
|
||||
#define RFLR_MODEMCONFIG1_BW_MASK 0x0F
|
||||
|
||||
#define RFLR_MODEMCONFIG1_BW_7_81_KHZ 0x00
|
||||
#define RFLR_MODEMCONFIG1_BW_10_41_KHZ 0x10
|
||||
#define RFLR_MODEMCONFIG1_BW_15_62_KHZ 0x20
|
||||
#define RFLR_MODEMCONFIG1_BW_20_83_KHZ 0x30
|
||||
#define RFLR_MODEMCONFIG1_BW_31_25_KHZ 0x40
|
||||
#define RFLR_MODEMCONFIG1_BW_41_66_KHZ 0x50
|
||||
#define RFLR_MODEMCONFIG1_BW_62_50_KHZ 0x60
|
||||
#define RFLR_MODEMCONFIG1_BW_125_KHZ 0x70 // Default
|
||||
#define RFLR_MODEMCONFIG1_BW_250_KHZ 0x80
|
||||
#define RFLR_MODEMCONFIG1_BW_500_KHZ 0x90
|
||||
|
||||
#define RFLR_MODEMCONFIG1_CODINGRATE_MASK 0xF1
|
||||
#define RFLR_MODEMCONFIG1_CODINGRATE_4_5 0x02
|
||||
#define RFLR_MODEMCONFIG1_CODINGRATE_4_6 0x04 // Default
|
||||
#define RFLR_MODEMCONFIG1_CODINGRATE_4_7 0x06
|
||||
#define RFLR_MODEMCONFIG1_CODINGRATE_4_8 0x08
|
||||
|
||||
#define RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK 0xFE
|
||||
#define RFLR_MODEMCONFIG1_IMPLICITHEADER_ON 0x01
|
||||
#define RFLR_MODEMCONFIG1_IMPLICITHEADER_OFF 0x00 // Default
|
||||
|
||||
//与扩频因子,接收模式,发送CRC开启,RX超时相关宏定义
|
||||
#define RFLR_MODEMCONFIG2_SF_MASK 0x0F
|
||||
#define RFLR_MODEMCONFIG2_SF_6 0x60
|
||||
#define RFLR_MODEMCONFIG2_SF_7 0x70 // Default
|
||||
#define RFLR_MODEMCONFIG2_SF_8 0x80
|
||||
#define RFLR_MODEMCONFIG2_SF_9 0x90
|
||||
#define RFLR_MODEMCONFIG2_SF_10 0xA0
|
||||
#define RFLR_MODEMCONFIG2_SF_11 0xB0
|
||||
#define RFLR_MODEMCONFIG2_SF_12 0xC0
|
||||
|
||||
#define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_MASK 0xF7
|
||||
#define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_ON 0x08
|
||||
#define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_OFF 0x00
|
||||
|
||||
#define RFLR_MODEMCONFIG2_RXPAYLOADCRC_MASK 0xFB
|
||||
#define RFLR_MODEMCONFIG2_RXPAYLOADCRC_ON 0x04
|
||||
#define RFLR_MODEMCONFIG2_RXPAYLOADCRC_OFF 0x00 // Default
|
||||
|
||||
#define RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK 0xFC
|
||||
#define RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB 0x00 // Default
|
||||
|
||||
|
||||
/*!
|
||||
* RegHopChannel (Read Only)
|
||||
*/
|
||||
#define RFLR_HOPCHANNEL_PLL_LOCK_TIMEOUT_MASK 0x7F
|
||||
#define RFLR_HOPCHANNEL_PLL_LOCK_FAIL 0x80
|
||||
#define RFLR_HOPCHANNEL_PLL_LOCK_SUCCEED 0x00 // Default
|
||||
|
||||
#define RFLR_HOPCHANNEL_PAYLOAD_CRC16_MASK 0xBF
|
||||
#define RFLR_HOPCHANNEL_PAYLOAD_CRC16_ON 0x40
|
||||
#define RFLR_HOPCHANNEL_PAYLOAD_CRC16_OFF 0x00 // Default
|
||||
|
||||
#define RFLR_HOPCHANNEL_CHANNEL_MASK 0x3F
|
||||
|
||||
|
||||
/*!
|
||||
* RegSymbTimeoutLsb
|
||||
*/
|
||||
#define RFLR_SYMBTIMEOUTLSB_SYMBTIMEOUT 0x64 // Default
|
||||
|
||||
/*!
|
||||
* RegPreambleLengthMsb
|
||||
*/
|
||||
#define RFLR_PREAMBLELENGTHMSB 0x00 // Default
|
||||
|
||||
/*!
|
||||
* RegPreambleLengthLsb
|
||||
*/
|
||||
#define RFLR_PREAMBLELENGTHLSB 0x08 // Default
|
||||
|
||||
/*!
|
||||
* RegPayloadLength
|
||||
*/
|
||||
#define RFLR_PAYLOADLENGTH 0x0E // Default
|
||||
|
||||
/*!
|
||||
* RegPayloadMaxLength
|
||||
*/
|
||||
#define RFLR_PAYLOADMAXLENGTH 0xFF // Default
|
||||
|
||||
/*!
|
||||
* RegHopPeriod
|
||||
*/
|
||||
#define RFLR_HOPPERIOD_FREQFOPPINGPERIOD 0x00 // Default
|
||||
|
||||
|
||||
/*!
|
||||
* RegDioMapping1
|
||||
*/
|
||||
#define RFLR_DIOMAPPING1_DIO0_MASK 0x3F
|
||||
#define RFLR_DIOMAPPING1_DIO0_00 0x00 // Default
|
||||
#define RFLR_DIOMAPPING1_DIO0_01 0x40
|
||||
#define RFLR_DIOMAPPING1_DIO0_10 0x80
|
||||
#define RFLR_DIOMAPPING1_DIO0_11 0xC0
|
||||
|
||||
#define RFLR_DIOMAPPING1_DIO1_MASK 0xCF
|
||||
#define RFLR_DIOMAPPING1_DIO1_00 0x00 // Default
|
||||
#define RFLR_DIOMAPPING1_DIO1_01 0x10
|
||||
#define RFLR_DIOMAPPING1_DIO1_10 0x20
|
||||
#define RFLR_DIOMAPPING1_DIO1_11 0x30
|
||||
|
||||
#define RFLR_DIOMAPPING1_DIO2_MASK 0xF3
|
||||
#define RFLR_DIOMAPPING1_DIO2_00 0x00 // Default
|
||||
#define RFLR_DIOMAPPING1_DIO2_01 0x04
|
||||
#define RFLR_DIOMAPPING1_DIO2_10 0x08
|
||||
#define RFLR_DIOMAPPING1_DIO2_11 0x0C
|
||||
|
||||
#define RFLR_DIOMAPPING1_DIO3_MASK 0xFC
|
||||
#define RFLR_DIOMAPPING1_DIO3_00 0x00 // Default
|
||||
#define RFLR_DIOMAPPING1_DIO3_01 0x01
|
||||
#define RFLR_DIOMAPPING1_DIO3_10 0x02
|
||||
#define RFLR_DIOMAPPING1_DIO3_11 0x03
|
||||
|
||||
/*!
|
||||
* RegDioMapping2
|
||||
*/
|
||||
#define RFLR_DIOMAPPING2_DIO4_MASK 0x3F
|
||||
#define RFLR_DIOMAPPING2_DIO4_00 0x00 // Default
|
||||
#define RFLR_DIOMAPPING2_DIO4_01 0x40
|
||||
#define RFLR_DIOMAPPING2_DIO4_10 0x80
|
||||
#define RFLR_DIOMAPPING2_DIO4_11 0xC0
|
||||
|
||||
#define RFLR_DIOMAPPING2_DIO5_MASK 0xCF
|
||||
#define RFLR_DIOMAPPING2_DIO5_00 0x00 // Default
|
||||
#define RFLR_DIOMAPPING2_DIO5_01 0x10
|
||||
#define RFLR_DIOMAPPING2_DIO5_10 0x20
|
||||
#define RFLR_DIOMAPPING2_DIO5_11 0x30
|
||||
|
||||
#define RFLR_DIOMAPPING2_MAP_MASK 0xFE
|
||||
#define RFLR_DIOMAPPING2_MAP_PREAMBLEDETECT 0x01
|
||||
#define RFLR_DIOMAPPING2_MAP_RSSI 0x00 // Default
|
||||
|
||||
/*!
|
||||
* RegVersion (Read Only)
|
||||
*/
|
||||
|
||||
/*!
|
||||
* RegAgcRef
|
||||
*/
|
||||
|
||||
/*!
|
||||
* RegAgcThresh1
|
||||
*/
|
||||
|
||||
/*!
|
||||
* RegAgcThresh2
|
||||
*/
|
||||
|
||||
/*!
|
||||
* RegAgcThresh3
|
||||
*/
|
||||
|
||||
/*!
|
||||
* RegFifoRxByteAddr (Read Only)
|
||||
*/
|
||||
|
||||
/*!
|
||||
* RegPllHop
|
||||
*/
|
||||
#define RFLR_PLLHOP_FASTHOP_MASK 0x7F
|
||||
#define RFLR_PLLHOP_FASTHOP_ON 0x80
|
||||
#define RFLR_PLLHOP_FASTHOP_OFF 0x00 // Default
|
||||
|
||||
/*!
|
||||
* RegTcxo
|
||||
*/
|
||||
#define RFLR_TCXO_TCXOINPUT_MASK 0xEF
|
||||
#define RFLR_TCXO_TCXOINPUT_ON 0x10
|
||||
#define RFLR_TCXO_TCXOINPUT_OFF 0x00 // Default
|
||||
|
||||
/*!
|
||||
* RegPaDac
|
||||
*/
|
||||
#define RFLR_PADAC_20DBM_MASK 0xF8
|
||||
#define RFLR_PADAC_20DBM_ON 0x07
|
||||
#define RFLR_PADAC_20DBM_OFF 0x04 // Default
|
||||
|
||||
/*!
|
||||
* RegPll
|
||||
*/
|
||||
#define RFLR_PLL_BANDWIDTH_MASK 0x3F
|
||||
#define RFLR_PLL_BANDWIDTH_75 0x00
|
||||
#define RFLR_PLL_BANDWIDTH_150 0x40
|
||||
#define RFLR_PLL_BANDWIDTH_225 0x80
|
||||
#define RFLR_PLL_BANDWIDTH_300 0xC0 // Default
|
||||
|
||||
/*!
|
||||
* RegPllLowPn
|
||||
*/
|
||||
#define RFLR_PLLLOWPN_BANDWIDTH_MASK 0x3F
|
||||
#define RFLR_PLLLOWPN_BANDWIDTH_75 0x00
|
||||
#define RFLR_PLLLOWPN_BANDWIDTH_150 0x40
|
||||
#define RFLR_PLLLOWPN_BANDWIDTH_225 0x80
|
||||
#define RFLR_PLLLOWPN_BANDWIDTH_300 0xC0 // Default
|
||||
|
||||
/*!
|
||||
* RegModemConfig3
|
||||
*/
|
||||
#define RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_MASK 0xF7
|
||||
#define RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_ON 0x08
|
||||
#define RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_OFF 0x00 // Default
|
||||
|
||||
#define RFLR_MODEMCONFIG3_AGCAUTO_MASK 0xFB
|
||||
#define RFLR_MODEMCONFIG3_AGCAUTO_ON 0x04 // Default
|
||||
#define RFLR_MODEMCONFIG3_AGCAUTO_OFF 0x00
|
||||
|
||||
/*!
|
||||
* RegFormerTemp
|
||||
*/
|
||||
|
||||
typedef struct sSX1276LR
|
||||
{
|
||||
uint8_t RegFifo; // 0x00
|
||||
// Common settings
|
||||
uint8_t RegOpMode; // 0x01
|
||||
uint8_t RegRes02; // 0x02
|
||||
uint8_t RegRes03; // 0x03
|
||||
uint8_t RegBandSetting; // 0x04
|
||||
uint8_t RegRes05; // 0x05
|
||||
uint8_t RegFrfMsb; // 0x06
|
||||
uint8_t RegFrfMid; // 0x07
|
||||
uint8_t RegFrfLsb; // 0x08
|
||||
// Tx settings
|
||||
uint8_t RegPaConfig; // 0x09
|
||||
uint8_t RegPaRamp; // 0x0A
|
||||
uint8_t RegOcp; // 0x0B
|
||||
// Rx settings
|
||||
uint8_t RegLna; // 0x0C
|
||||
// LoRa registers
|
||||
uint8_t RegFifoAddrPtr; // 0x0D
|
||||
uint8_t RegFifoTxBaseAddr; // 0x0E
|
||||
uint8_t RegFifoRxBaseAddr; // 0x0F
|
||||
uint8_t RegFifoRxCurrentAddr; // 0x10
|
||||
uint8_t RegIrqFlagsMask; // 0x11
|
||||
uint8_t RegIrqFlags; // 0x12
|
||||
uint8_t RegNbRxBytes; // 0x13
|
||||
uint8_t RegRxHeaderCntValueMsb; // 0x14
|
||||
uint8_t RegRxHeaderCntValueLsb; // 0x15
|
||||
uint8_t RegRxPacketCntValueMsb; // 0x16
|
||||
uint8_t RegRxPacketCntValueLsb; // 0x17
|
||||
uint8_t RegModemStat; // 0x18
|
||||
uint8_t RegPktSnrValue; // 0x19
|
||||
uint8_t RegPktRssiValue; // 0x1A
|
||||
uint8_t RegRssiValue; // 0x1B
|
||||
uint8_t RegHopChannel; // 0x1C
|
||||
uint8_t RegModemConfig1; // 0x1D
|
||||
uint8_t RegModemConfig2; // 0x1E
|
||||
uint8_t RegSymbTimeoutLsb; // 0x1F
|
||||
uint8_t RegPreambleMsb; // 0x20
|
||||
uint8_t RegPreambleLsb; // 0x21
|
||||
uint8_t RegPayloadLength; // 0x22
|
||||
uint8_t RegMaxPayloadLength; // 0x23
|
||||
uint8_t RegHopPeriod; // 0x24 跳频周期
|
||||
uint8_t RegFifoRxByteAddr; // 0x25
|
||||
uint8_t RegModemConfig3; // 0x26
|
||||
uint8_t RegTestReserved27[0x30 - 0x27]; // 0x27-0x30
|
||||
uint8_t RegTestReserved31; // 0x31
|
||||
uint8_t RegTestReserved32[0x40 - 0x32]; // 0x32-0x40
|
||||
// I/O settings
|
||||
uint8_t RegDioMapping1; // 0x40
|
||||
uint8_t RegDioMapping2; // 0x41
|
||||
// Version
|
||||
uint8_t RegVersion; // 0x42
|
||||
// Additional settings
|
||||
uint8_t RegAgcRef; // 0x43
|
||||
uint8_t RegAgcThresh1; // 0x44
|
||||
uint8_t RegAgcThresh2; // 0x45
|
||||
uint8_t RegAgcThresh3; // 0x46
|
||||
// Test
|
||||
uint8_t RegTestReserved47[0x4B - 0x47]; // 0x47-0x4A
|
||||
// Additional settings
|
||||
uint8_t RegPllHop; // 0x4B
|
||||
uint8_t RegTestReserved4C; // 0x4C
|
||||
uint8_t RegPaDac; // 0x4D
|
||||
// Test
|
||||
uint8_t RegTestReserved4E[0x58-0x4E]; // 0x4E-0x57
|
||||
// Additional settings
|
||||
uint8_t RegTcxo; // 0x58
|
||||
// Test
|
||||
uint8_t RegTestReserved59; // 0x59
|
||||
// Test
|
||||
uint8_t RegTestReserved5B; // 0x5B
|
||||
// Additional settings
|
||||
uint8_t RegPll; // 0x5C
|
||||
// Test
|
||||
uint8_t RegTestReserved5D; // 0x5D
|
||||
// Additional settings
|
||||
uint8_t RegPllLowPn; // 0x5E
|
||||
// Test
|
||||
uint8_t RegTestReserved5F[0x6C - 0x5F]; // 0x5F-0x6B
|
||||
// Additional settings
|
||||
uint8_t RegFormerTemp; // 0x6C
|
||||
// Test
|
||||
uint8_t RegTestReserved6D[0x71 - 0x6D]; // 0x6D-0x70
|
||||
}tSX1276LR;
|
||||
|
||||
extern tSX1276LR* SX1276LR;
|
||||
|
||||
//初始化SX1276LoRa模式
|
||||
void SX1276LoRaInit( void );
|
||||
|
||||
//读SX1276的版本号
|
||||
void SX1276LoRaSetDefaults( void );
|
||||
|
||||
//启用/禁用LoRa模式
|
||||
void SX1276LoRaSetLoRaOn( bool enable );
|
||||
|
||||
//设置SX1276操作模式
|
||||
void SX1276LoRaSetOpMode( uint8_t opMode );
|
||||
|
||||
//获取SX1276操作模式
|
||||
uint8_t SX1276LoRaGetOpMode( void );
|
||||
|
||||
//读取SX1276低噪声放大器(信号放大)的增益,
|
||||
uint8_t SX1276LoRaReadRxGain( void );
|
||||
|
||||
//读取lora模式下无线信号强度
|
||||
double SX1276LoRaReadRssi( void );
|
||||
|
||||
//获取数据时的增益值
|
||||
uint8_t SX1276LoRaGetPacketRxGain( void );
|
||||
|
||||
//获取数据时的信噪比值,信号和噪声的比值,信噪比越高,说明信号干扰越小。
|
||||
int8_t SX1276LoRaGetPacketSnr( void );
|
||||
|
||||
//获取数据时的无线信号强度
|
||||
double SX1276LoRaGetPacketRssi( void );
|
||||
|
||||
//开始接收
|
||||
void SX1276LoRaStartRx( void );
|
||||
|
||||
//接收数据
|
||||
void SX1276LoRaGetRxPacket( void *buffer, uint16_t *size );
|
||||
|
||||
//发送数据
|
||||
void SX1276LoRaSetTxPacket( const void *buffer, uint16_t size );
|
||||
|
||||
//得到RFLRState状态
|
||||
uint8_t SX1276LoRaGetRFState( void );
|
||||
|
||||
//设置RFLRState状态,RFLRState的值决定了下面的函数处理哪一步的代码
|
||||
void SX1276LoRaSetRFState( uint8_t state );
|
||||
|
||||
//SX1276模块接发收数据的处理函数
|
||||
uint32_t SX1276LoRaProcess( void );
|
||||
|
||||
uint32_t SX1276LoraChannelEmpty( void );
|
||||
|
||||
#endif
|
|
@ -0,0 +1,420 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file sx1276-LoRaMisc.c
|
||||
* \brief SX1276 RF chip high level functions driver
|
||||
*
|
||||
* \remark Optional support functions.
|
||||
* These functions are defined only to easy the change of the
|
||||
* parameters.
|
||||
* For a final firmware the radio parameters will be known so
|
||||
* there is no need to support all possible parameters.
|
||||
* Removing these functions will greatly reduce the final firmware
|
||||
* size.
|
||||
*
|
||||
* \version 2.0.0
|
||||
* \date May 6 2013
|
||||
* \author Gregory Cristian
|
||||
*
|
||||
* Last modified by Miguel Luis on Jun 19 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: sx1276-LoRaMisc.c
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
#include "platform.h"
|
||||
|
||||
#if defined( USE_SX1276_RADIO )
|
||||
|
||||
#include "sx1276-Hal.h"
|
||||
#include "sx1276.h"
|
||||
|
||||
#include "sx1276-LoRa.h"
|
||||
#include "sx1276-LoRaMisc.h"
|
||||
|
||||
/*!
|
||||
* SX1276 definitions
|
||||
*/
|
||||
#define XTAL_FREQ 32000000
|
||||
#define FREQ_STEP 61.03515625
|
||||
|
||||
extern tLoRaSettings LoRaSettings;
|
||||
|
||||
void SX1276LoRaSetRFFrequency( uint32_t freq )
|
||||
{
|
||||
LoRaSettings.RFFrequency = freq;
|
||||
|
||||
freq = ( uint32_t )( ( double )freq / ( double )FREQ_STEP );
|
||||
SX1276LR->RegFrfMsb = ( uint8_t )( ( freq >> 16 ) & 0xFF );
|
||||
SX1276LR->RegFrfMid = ( uint8_t )( ( freq >> 8 ) & 0xFF );
|
||||
SX1276LR->RegFrfLsb = ( uint8_t )( freq & 0xFF );
|
||||
SX1276WriteBuffer( REG_LR_FRFMSB, &SX1276LR->RegFrfMsb, 3 );
|
||||
}
|
||||
|
||||
uint32_t SX1276LoRaGetRFFrequency( void )
|
||||
{
|
||||
SX1276ReadBuffer( REG_LR_FRFMSB, &SX1276LR->RegFrfMsb, 3 );
|
||||
LoRaSettings.RFFrequency = ( ( uint32_t )SX1276LR->RegFrfMsb << 16 ) | ( ( uint32_t )SX1276LR->RegFrfMid << 8 ) | ( ( uint32_t )SX1276LR->RegFrfLsb );
|
||||
LoRaSettings.RFFrequency = ( uint32_t )( ( double )LoRaSettings.RFFrequency * ( double )FREQ_STEP );
|
||||
|
||||
return LoRaSettings.RFFrequency;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetRFPower( int8_t power )
|
||||
{
|
||||
SX1276Read( REG_LR_PACONFIG, &SX1276LR->RegPaConfig );
|
||||
SX1276Read( REG_LR_PADAC, &SX1276LR->RegPaDac );
|
||||
|
||||
if( ( SX1276LR->RegPaConfig & RFLR_PACONFIG_PASELECT_PABOOST ) == RFLR_PACONFIG_PASELECT_PABOOST )
|
||||
{
|
||||
if( ( SX1276LR->RegPaDac & 0x87 ) == 0x87 )
|
||||
{
|
||||
if( power < 5 )
|
||||
{
|
||||
power = 5;
|
||||
}
|
||||
if( power > 20 )
|
||||
{
|
||||
power = 20;
|
||||
}
|
||||
SX1276LR->RegPaConfig = ( SX1276LR->RegPaConfig & RFLR_PACONFIG_MAX_POWER_MASK ) | 0x70;
|
||||
SX1276LR->RegPaConfig = ( SX1276LR->RegPaConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power - 5 ) & 0x0F );
|
||||
}
|
||||
else
|
||||
{
|
||||
if( power < 2 )
|
||||
{
|
||||
power = 2;
|
||||
}
|
||||
if( power > 17 )
|
||||
{
|
||||
power = 17;
|
||||
}
|
||||
SX1276LR->RegPaConfig = ( SX1276LR->RegPaConfig & RFLR_PACONFIG_MAX_POWER_MASK ) | 0x70;
|
||||
SX1276LR->RegPaConfig = ( SX1276LR->RegPaConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power - 2 ) & 0x0F );
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if( power < -1 )
|
||||
{
|
||||
power = -1;
|
||||
}
|
||||
if( power > 14 )
|
||||
{
|
||||
power = 14;
|
||||
}
|
||||
SX1276LR->RegPaConfig = ( SX1276LR->RegPaConfig & RFLR_PACONFIG_MAX_POWER_MASK ) | 0x70;
|
||||
SX1276LR->RegPaConfig = ( SX1276LR->RegPaConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power + 1 ) & 0x0F );
|
||||
}
|
||||
SX1276Write( REG_LR_PACONFIG, SX1276LR->RegPaConfig );
|
||||
LoRaSettings.Power = power;
|
||||
}
|
||||
|
||||
int8_t SX1276LoRaGetRFPower( void )
|
||||
{
|
||||
SX1276Read( REG_LR_PACONFIG, &SX1276LR->RegPaConfig );
|
||||
SX1276Read( REG_LR_PADAC, &SX1276LR->RegPaDac );
|
||||
|
||||
if( ( SX1276LR->RegPaConfig & RFLR_PACONFIG_PASELECT_PABOOST ) == RFLR_PACONFIG_PASELECT_PABOOST )
|
||||
{
|
||||
if( ( SX1276LR->RegPaDac & 0x07 ) == 0x07 )
|
||||
{
|
||||
LoRaSettings.Power = 5 + ( SX1276LR->RegPaConfig & ~RFLR_PACONFIG_OUTPUTPOWER_MASK );
|
||||
}
|
||||
else
|
||||
{
|
||||
LoRaSettings.Power = 2 + ( SX1276LR->RegPaConfig & ~RFLR_PACONFIG_OUTPUTPOWER_MASK );
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
LoRaSettings.Power = -1 + ( SX1276LR->RegPaConfig & ~RFLR_PACONFIG_OUTPUTPOWER_MASK );
|
||||
}
|
||||
return LoRaSettings.Power;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetSignalBandwidth( uint8_t bw )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG1, &SX1276LR->RegModemConfig1 );
|
||||
SX1276LR->RegModemConfig1 = ( SX1276LR->RegModemConfig1 & RFLR_MODEMCONFIG1_BW_MASK ) | ( bw << 4 );
|
||||
SX1276Write( REG_LR_MODEMCONFIG1, SX1276LR->RegModemConfig1 );
|
||||
LoRaSettings.SignalBw = bw;
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetSignalBandwidth( void )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG1, &SX1276LR->RegModemConfig1 );
|
||||
LoRaSettings.SignalBw = ( SX1276LR->RegModemConfig1 & ~RFLR_MODEMCONFIG1_BW_MASK ) >> 4;
|
||||
return LoRaSettings.SignalBw;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetSpreadingFactor( uint8_t factor )
|
||||
{
|
||||
|
||||
if( factor > 12 )
|
||||
{
|
||||
factor = 12;
|
||||
}
|
||||
else if( factor < 6 )
|
||||
{
|
||||
factor = 6;
|
||||
}
|
||||
|
||||
if( factor == 6 )
|
||||
{
|
||||
SX1276LoRaSetNbTrigPeaks( 5 );
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276LoRaSetNbTrigPeaks( 3 );
|
||||
}
|
||||
|
||||
SX1276Read( REG_LR_MODEMCONFIG2, &SX1276LR->RegModemConfig2 );
|
||||
SX1276LR->RegModemConfig2 = ( SX1276LR->RegModemConfig2 & RFLR_MODEMCONFIG2_SF_MASK ) | ( factor << 4 );
|
||||
SX1276Write( REG_LR_MODEMCONFIG2, SX1276LR->RegModemConfig2 );
|
||||
LoRaSettings.SpreadingFactor = factor;
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetSpreadingFactor( void )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG2, &SX1276LR->RegModemConfig2 );
|
||||
LoRaSettings.SpreadingFactor = ( SX1276LR->RegModemConfig2 & ~RFLR_MODEMCONFIG2_SF_MASK ) >> 4;
|
||||
return LoRaSettings.SpreadingFactor;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetErrorCoding( uint8_t value )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG1, &SX1276LR->RegModemConfig1 );
|
||||
SX1276LR->RegModemConfig1 = ( SX1276LR->RegModemConfig1 & RFLR_MODEMCONFIG1_CODINGRATE_MASK ) | ( value << 1 );
|
||||
SX1276Write( REG_LR_MODEMCONFIG1, SX1276LR->RegModemConfig1 );
|
||||
LoRaSettings.ErrorCoding = value;
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetErrorCoding( void )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG1, &SX1276LR->RegModemConfig1 );
|
||||
LoRaSettings.ErrorCoding = ( SX1276LR->RegModemConfig1 & ~RFLR_MODEMCONFIG1_CODINGRATE_MASK ) >> 1;
|
||||
return LoRaSettings.ErrorCoding;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetPacketCrcOn( bool enable )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG2, &SX1276LR->RegModemConfig2 );
|
||||
SX1276LR->RegModemConfig2 = ( SX1276LR->RegModemConfig2 & RFLR_MODEMCONFIG2_RXPAYLOADCRC_MASK ) | ( enable << 2 );
|
||||
SX1276Write( REG_LR_MODEMCONFIG2, SX1276LR->RegModemConfig2 );
|
||||
LoRaSettings.CrcOn = enable;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetPreambleLength( uint16_t value )
|
||||
{
|
||||
SX1276ReadBuffer( REG_LR_PREAMBLEMSB, &SX1276LR->RegPreambleMsb, 2 );
|
||||
|
||||
SX1276LR->RegPreambleMsb = ( value >> 8 ) & 0x00FF;
|
||||
SX1276LR->RegPreambleLsb = value & 0xFF;
|
||||
SX1276WriteBuffer( REG_LR_PREAMBLEMSB, &SX1276LR->RegPreambleMsb, 2 );
|
||||
}
|
||||
|
||||
uint16_t SX1276LoRaGetPreambleLength( void )
|
||||
{
|
||||
SX1276ReadBuffer( REG_LR_PREAMBLEMSB, &SX1276LR->RegPreambleMsb, 2 );
|
||||
return ( ( SX1276LR->RegPreambleMsb & 0x00FF ) << 8 ) | SX1276LR->RegPreambleLsb;
|
||||
}
|
||||
|
||||
bool SX1276LoRaGetPacketCrcOn( void )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG2, &SX1276LR->RegModemConfig2 );
|
||||
LoRaSettings.CrcOn = ( SX1276LR->RegModemConfig2 & RFLR_MODEMCONFIG2_RXPAYLOADCRC_ON ) >> 1;
|
||||
return LoRaSettings.CrcOn;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetImplicitHeaderOn( bool enable )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG1, &SX1276LR->RegModemConfig1 );
|
||||
SX1276LR->RegModemConfig1 = ( SX1276LR->RegModemConfig1 & RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK ) | ( enable );
|
||||
SX1276Write( REG_LR_MODEMCONFIG1, SX1276LR->RegModemConfig1 );
|
||||
LoRaSettings.ImplicitHeaderOn = enable;
|
||||
}
|
||||
|
||||
bool SX1276LoRaGetImplicitHeaderOn( void )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG1, &SX1276LR->RegModemConfig1 );
|
||||
LoRaSettings.ImplicitHeaderOn = ( SX1276LR->RegModemConfig1 & RFLR_MODEMCONFIG1_IMPLICITHEADER_ON );
|
||||
return LoRaSettings.ImplicitHeaderOn;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetRxSingleOn( bool enable )
|
||||
{
|
||||
LoRaSettings.RxSingleOn = enable;
|
||||
}
|
||||
|
||||
bool SX1276LoRaGetRxSingleOn( void )
|
||||
{
|
||||
return LoRaSettings.RxSingleOn;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetFreqHopOn( bool enable )
|
||||
{
|
||||
LoRaSettings.FreqHopOn = enable;
|
||||
}
|
||||
|
||||
bool SX1276LoRaGetFreqHopOn( void )
|
||||
{
|
||||
return LoRaSettings.FreqHopOn;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetHopPeriod( uint8_t value )
|
||||
{
|
||||
SX1276LR->RegHopPeriod = value;
|
||||
SX1276Write( REG_LR_HOPPERIOD, SX1276LR->RegHopPeriod );
|
||||
LoRaSettings.HopPeriod = value;
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetHopPeriod( void )
|
||||
{
|
||||
SX1276Read( REG_LR_HOPPERIOD, &SX1276LR->RegHopPeriod );
|
||||
LoRaSettings.HopPeriod = SX1276LR->RegHopPeriod;
|
||||
return LoRaSettings.HopPeriod;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetTxPacketTimeout( uint32_t value )
|
||||
{
|
||||
LoRaSettings.TxPacketTimeout = value;
|
||||
}
|
||||
|
||||
uint32_t SX1276LoRaGetTxPacketTimeout( void )
|
||||
{
|
||||
return LoRaSettings.TxPacketTimeout;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetRxPacketTimeout( uint32_t value )
|
||||
{
|
||||
LoRaSettings.RxPacketTimeout = value;
|
||||
}
|
||||
|
||||
uint32_t SX1276LoRaGetRxPacketTimeout( void )
|
||||
{
|
||||
return LoRaSettings.RxPacketTimeout;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetPayloadLength( uint8_t value )
|
||||
{
|
||||
SX1276LR->RegPayloadLength = value;
|
||||
SX1276Write( REG_LR_PAYLOADLENGTH, SX1276LR->RegPayloadLength );
|
||||
LoRaSettings.PayloadLength = value;
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetPayloadLength( void )
|
||||
{
|
||||
SX1276Read( REG_LR_PAYLOADLENGTH, &SX1276LR->RegPayloadLength );
|
||||
LoRaSettings.PayloadLength = SX1276LR->RegPayloadLength;
|
||||
return LoRaSettings.PayloadLength;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetPa20dBm( bool enale )
|
||||
{
|
||||
SX1276Read( REG_LR_PADAC, &SX1276LR->RegPaDac );
|
||||
SX1276Read( REG_LR_PACONFIG, &SX1276LR->RegPaConfig );
|
||||
|
||||
if( ( SX1276LR->RegPaConfig & RFLR_PACONFIG_PASELECT_PABOOST ) == RFLR_PACONFIG_PASELECT_PABOOST )
|
||||
{
|
||||
if( enale == true )
|
||||
{
|
||||
SX1276LR->RegPaDac = 0x87;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
SX1276LR->RegPaDac = 0x84;
|
||||
}
|
||||
SX1276Write( REG_LR_PADAC, SX1276LR->RegPaDac );
|
||||
}
|
||||
|
||||
bool SX1276LoRaGetPa20dBm( void )
|
||||
{
|
||||
SX1276Read( REG_LR_PADAC, &SX1276LR->RegPaDac );
|
||||
|
||||
return ( ( SX1276LR->RegPaDac & 0x07 ) == 0x07 ) ? true : false;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetPAOutput( uint8_t outputPin )
|
||||
{
|
||||
SX1276Read( REG_LR_PACONFIG, &SX1276LR->RegPaConfig );
|
||||
SX1276LR->RegPaConfig = (SX1276LR->RegPaConfig & RFLR_PACONFIG_PASELECT_MASK ) | outputPin;
|
||||
SX1276Write( REG_LR_PACONFIG, SX1276LR->RegPaConfig );
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetPAOutput( void )
|
||||
{
|
||||
SX1276Read( REG_LR_PACONFIG, &SX1276LR->RegPaConfig );
|
||||
return SX1276LR->RegPaConfig & ~RFLR_PACONFIG_PASELECT_MASK;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetPaRamp( uint8_t value )
|
||||
{
|
||||
SX1276Read( REG_LR_PARAMP, &SX1276LR->RegPaRamp );
|
||||
SX1276LR->RegPaRamp = ( SX1276LR->RegPaRamp & RFLR_PARAMP_MASK ) | ( value & ~RFLR_PARAMP_MASK );
|
||||
SX1276Write( REG_LR_PARAMP, SX1276LR->RegPaRamp );
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetPaRamp( void )
|
||||
{
|
||||
SX1276Read( REG_LR_PARAMP, &SX1276LR->RegPaRamp );
|
||||
return SX1276LR->RegPaRamp & ~RFLR_PARAMP_MASK;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetSymbTimeout( uint16_t value )
|
||||
{
|
||||
SX1276ReadBuffer( REG_LR_MODEMCONFIG2, &SX1276LR->RegModemConfig2, 2 );
|
||||
|
||||
SX1276LR->RegModemConfig2 = ( SX1276LR->RegModemConfig2 & RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) | ( ( value >> 8 ) & ~RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK );
|
||||
SX1276LR->RegSymbTimeoutLsb = value & 0xFF;
|
||||
SX1276WriteBuffer( REG_LR_MODEMCONFIG2, &SX1276LR->RegModemConfig2, 2 );
|
||||
}
|
||||
|
||||
uint16_t SX1276LoRaGetSymbTimeout( void )
|
||||
{
|
||||
SX1276ReadBuffer( REG_LR_MODEMCONFIG2, &SX1276LR->RegModemConfig2, 2 );
|
||||
return ( ( SX1276LR->RegModemConfig2 & ~RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) << 8 ) | SX1276LR->RegSymbTimeoutLsb;
|
||||
}
|
||||
|
||||
void SX1276LoRaSetLowDatarateOptimize( bool enable )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG3, &SX1276LR->RegModemConfig3 );
|
||||
SX1276LR->RegModemConfig3 = ( SX1276LR->RegModemConfig3 & RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_MASK ) | ( enable << 3 );
|
||||
SX1276Write( REG_LR_MODEMCONFIG3, SX1276LR->RegModemConfig3 );
|
||||
}
|
||||
|
||||
bool SX1276LoRaGetLowDatarateOptimize( void )
|
||||
{
|
||||
SX1276Read( REG_LR_MODEMCONFIG3, &SX1276LR->RegModemConfig3 );
|
||||
return ( ( SX1276LR->RegModemConfig3 & RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_ON ) >> 3 );
|
||||
}
|
||||
|
||||
void SX1276LoRaSetNbTrigPeaks( uint8_t value )
|
||||
{
|
||||
SX1276Read( 0x31, &SX1276LR->RegTestReserved31 );
|
||||
SX1276LR->RegTestReserved31 = ( SX1276LR->RegTestReserved31 & 0xF8 ) | value;//数据包长度最高有效位 0x31 bit2 1 0
|
||||
SX1276Write( 0x31, SX1276LR->RegTestReserved31 );
|
||||
}
|
||||
|
||||
uint8_t SX1276LoRaGetNbTrigPeaks( void )
|
||||
{
|
||||
SX1276Read( 0x31, &SX1276LR->RegTestReserved31 );
|
||||
return ( SX1276LR->RegTestReserved31 & 0x07 );
|
||||
}
|
||||
|
||||
#endif // USE_SX1276_RADIO
|
|
@ -0,0 +1,324 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file sx1276-LoRaMisc.h
|
||||
* \brief SX1276 RF chip high level functions driver
|
||||
*
|
||||
* \remark Optional support functions.
|
||||
* These functions are defined only to easy the change of the
|
||||
* parameters.
|
||||
* For a final firmware the radio parameters will be known so
|
||||
* there is no need to support all possible parameters.
|
||||
* Removing these functions will greatly reduce the final firmware
|
||||
* size.
|
||||
*
|
||||
* \version 2.0.0
|
||||
* \date May 6 2013
|
||||
* \author Gregory Cristian
|
||||
*
|
||||
* Last modified by Miguel Luis on Jun 19 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: sx1276-LoRaMisc.h
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
#ifndef __SX1276_LORA_MISC_H__
|
||||
#define __SX1276_LORA_MISC_H__
|
||||
#include "stdint.h"
|
||||
#include "stdbool.h"
|
||||
/*!
|
||||
* \brief Writes the new RF frequency value
|
||||
*
|
||||
* \param [IN] freq New RF frequency value in [Hz]
|
||||
*/
|
||||
void SX1276LoRaSetRFFrequency( uint32_t freq );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current RF frequency value
|
||||
*
|
||||
* \retval freq Current RF frequency value in [Hz]
|
||||
*/
|
||||
uint32_t SX1276LoRaGetRFFrequency( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new RF output power value
|
||||
*
|
||||
* \param [IN] power New output power value in [dBm]
|
||||
*/
|
||||
void SX1276LoRaSetRFPower( int8_t power );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current RF output power value
|
||||
*
|
||||
* \retval power Current output power value in [dBm]
|
||||
*/
|
||||
int8_t SX1276LoRaGetRFPower( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new Signal Bandwidth value
|
||||
*
|
||||
* \remark This function sets the IF frequency according to the datasheet
|
||||
*
|
||||
* \param [IN] factor New Signal Bandwidth value [0: 125 kHz, 1: 250 kHz, 2: 500 kHz]
|
||||
*/
|
||||
void SX1276LoRaSetSignalBandwidth( uint8_t bw );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current Signal Bandwidth value
|
||||
*
|
||||
* \retval factor Current Signal Bandwidth value [0: 125 kHz, 1: 250 kHz, 2: 500 kHz]
|
||||
*/
|
||||
uint8_t SX1276LoRaGetSignalBandwidth( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new Spreading Factor value
|
||||
*
|
||||
* \param [IN] factor New Spreading Factor value [7, 8, 9, 10, 11, 12]
|
||||
*/
|
||||
void SX1276LoRaSetSpreadingFactor( uint8_t factor );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current Spreading Factor value
|
||||
*
|
||||
* \retval factor Current Spreading Factor value [7, 8, 9, 10, 11, 12]
|
||||
*/
|
||||
uint8_t SX1276LoRaGetSpreadingFactor( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new Error Coding value
|
||||
*
|
||||
* \param [IN] value New Error Coding value [1: 4/5, 2: 4/6, 3: 4/7, 4: 4/8]
|
||||
*/
|
||||
void SX1276LoRaSetErrorCoding( uint8_t value );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current Error Coding value
|
||||
*
|
||||
* \retval value Current Error Coding value [1: 4/5, 2: 4/6, 3: 4/7, 4: 4/8]
|
||||
*/
|
||||
uint8_t SX1276LoRaGetErrorCoding( void );
|
||||
|
||||
/*!
|
||||
* \brief Enables/Disables the packet CRC generation
|
||||
*
|
||||
* \param [IN] enaable [true, false]
|
||||
*/
|
||||
void SX1276LoRaSetPacketCrcOn( bool enable );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current packet CRC generation status
|
||||
*
|
||||
* \retval enable [true, false]
|
||||
*/
|
||||
bool SX1276LoRaGetPacketCrcOn( void );
|
||||
|
||||
/*!
|
||||
* \brief Enables/Disables the Implicit Header mode in LoRa
|
||||
*
|
||||
* \param [IN] enable [true, false]
|
||||
*/
|
||||
void SX1276LoRaSetImplicitHeaderOn( bool enable );
|
||||
|
||||
/*!
|
||||
* \brief Check if implicit header mode in LoRa in enabled or disabled
|
||||
*
|
||||
* \retval enable [true, false]
|
||||
*/
|
||||
bool SX1276LoRaGetImplicitHeaderOn( void );
|
||||
|
||||
/*!
|
||||
* \brief Enables/Disables Rx single instead of Rx continuous
|
||||
*
|
||||
* \param [IN] enable [true, false]
|
||||
*/
|
||||
void SX1276LoRaSetRxSingleOn( bool enable );
|
||||
|
||||
/*!
|
||||
* \brief Check if LoRa is in Rx Single mode
|
||||
*
|
||||
* \retval enable [true, false]
|
||||
*/
|
||||
bool SX1276LoRaGetRxSingleOn( void );
|
||||
|
||||
/*!
|
||||
* \brief Enables/Disables the frequency hopping
|
||||
*
|
||||
* \param [IN] enable [true, false]
|
||||
*/
|
||||
|
||||
void SX1276LoRaSetFreqHopOn( bool enable );
|
||||
|
||||
/*!
|
||||
* \brief Get the frequency hopping status
|
||||
*
|
||||
* \param [IN] enable [true, false]
|
||||
*/
|
||||
bool SX1276LoRaGetFreqHopOn( void );
|
||||
|
||||
/*!
|
||||
* \brief Set symbol period between frequency hops
|
||||
*
|
||||
* \param [IN] value
|
||||
*/
|
||||
void SX1276LoRaSetHopPeriod( uint8_t value );
|
||||
|
||||
/*!
|
||||
* \brief Get symbol period between frequency hops
|
||||
*
|
||||
* \retval value symbol period between frequency hops
|
||||
*/
|
||||
uint8_t SX1276LoRaGetHopPeriod( void );
|
||||
|
||||
/*!
|
||||
* \brief Set timeout Tx packet (based on MCU timer, timeout between Tx Mode entry Tx Done IRQ)
|
||||
*
|
||||
* \param [IN] value timeout (ms)
|
||||
*/
|
||||
void SX1276LoRaSetTxPacketTimeout( uint32_t value );
|
||||
|
||||
/*!
|
||||
* \brief Get timeout between Tx packet (based on MCU timer, timeout between Tx Mode entry Tx Done IRQ)
|
||||
*
|
||||
* \retval value timeout (ms)
|
||||
*/
|
||||
uint32_t SX1276LoRaGetTxPacketTimeout( void );
|
||||
|
||||
/*!
|
||||
* \brief Set timeout Rx packet (based on MCU timer, timeout between Rx Mode entry and Rx Done IRQ)
|
||||
*
|
||||
* \param [IN] value timeout (ms)
|
||||
*/
|
||||
void SX1276LoRaSetRxPacketTimeout( uint32_t value );
|
||||
|
||||
/*!
|
||||
* \brief Get timeout Rx packet (based on MCU timer, timeout between Rx Mode entry and Rx Done IRQ)
|
||||
*
|
||||
* \retval value timeout (ms)
|
||||
*/
|
||||
uint32_t SX1276LoRaGetRxPacketTimeout( void );
|
||||
|
||||
/*!
|
||||
* \brief Set payload length
|
||||
*
|
||||
* \param [IN] value payload length
|
||||
*/
|
||||
void SX1276LoRaSetPayloadLength( uint8_t value );
|
||||
|
||||
/*!
|
||||
* \brief Get payload length
|
||||
*
|
||||
* \retval value payload length
|
||||
*/
|
||||
uint8_t SX1276LoRaGetPayloadLength( void );
|
||||
|
||||
/*!
|
||||
* \brief Enables/Disables the 20 dBm PA
|
||||
*
|
||||
* \param [IN] enable [true, false]
|
||||
*/
|
||||
void SX1276LoRaSetPa20dBm( bool enale );
|
||||
|
||||
/*!
|
||||
* \brief Gets the current 20 dBm PA status
|
||||
*
|
||||
* \retval enable [true, false]
|
||||
*/
|
||||
bool SX1276LoRaGetPa20dBm( void );
|
||||
|
||||
/*!
|
||||
* \brief Set the RF Output pin
|
||||
*
|
||||
* \param [IN] RF_PACONFIG_PASELECT_PABOOST or RF_PACONFIG_PASELECT_RFO
|
||||
*/
|
||||
void SX1276LoRaSetPAOutput( uint8_t outputPin );
|
||||
|
||||
/*!
|
||||
* \brief Gets the used RF Ouptut pin
|
||||
*
|
||||
* \retval RF_PACONFIG_PASELECT_PABOOST or RF_PACONFIG_PASELECT_RFO
|
||||
*/
|
||||
uint8_t SX1276LoRaGetPAOutput( void );
|
||||
|
||||
/*!
|
||||
* \brief Writes the new PA rise/fall time of ramp up/down value
|
||||
*
|
||||
* \param [IN] value New PaRamp value
|
||||
*/
|
||||
void SX1276LoRaSetPaRamp( uint8_t value );
|
||||
|
||||
/*!
|
||||
* \brief Reads the current PA rise/fall time of ramp up/down value
|
||||
*
|
||||
* \retval freq Current PaRamp value
|
||||
*/
|
||||
uint8_t SX1276LoRaGetPaRamp( void );
|
||||
|
||||
/*!
|
||||
* \brief Set Symbol Timeout based on symbol length
|
||||
*
|
||||
* \param [IN] value number of symbol
|
||||
*/
|
||||
void SX1276LoRaSetSymbTimeout( uint16_t value );
|
||||
|
||||
/*!
|
||||
* \brief Get Symbol Timeout based on symbol length
|
||||
*
|
||||
* \retval value number of symbol
|
||||
*/
|
||||
uint16_t SX1276LoRaGetSymbTimeout( void );
|
||||
|
||||
/*!
|
||||
* \brief Configure the device to optimize low datarate transfers
|
||||
*
|
||||
* \param [IN] enable Enables/Disables the low datarate optimization
|
||||
*/
|
||||
void SX1276LoRaSetLowDatarateOptimize( bool enable );
|
||||
|
||||
/*!
|
||||
* \brief Get the status of optimize low datarate transfers
|
||||
*
|
||||
* \retval LowDatarateOptimize enable or disable
|
||||
*/
|
||||
bool SX1276LoRaGetLowDatarateOptimize( void );
|
||||
|
||||
/*!
|
||||
* \brief Get the preamble length
|
||||
*
|
||||
* \retval value preamble length
|
||||
*/
|
||||
uint16_t SX1276LoRaGetPreambleLength( void );
|
||||
|
||||
/*!
|
||||
* \brief Set the preamble length
|
||||
*
|
||||
* \param [IN] value preamble length
|
||||
*/
|
||||
void SX1276LoRaSetPreambleLength( uint16_t value );
|
||||
|
||||
/*!
|
||||
* \brief Set the number or rolling preamble symbol needed for detection
|
||||
*
|
||||
* \param [IN] value number of preamble symbol
|
||||
*/
|
||||
void SX1276LoRaSetNbTrigPeaks( uint8_t value );
|
||||
|
||||
/*!
|
||||
* \brief Get the number or rolling preamble symbol needed for detection
|
||||
*
|
||||
* \retval value number of preamble symbol
|
||||
*/
|
||||
uint8_t SX1276LoRaGetNbTrigPeaks( void );
|
||||
#endif
|
|
@ -0,0 +1,282 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file sx1276.c
|
||||
* \brief SX1276 RF chip high level functions driver
|
||||
*
|
||||
* \remark Optional support functions.
|
||||
* These functions are defined only to easy the change of the
|
||||
* parameters.
|
||||
* For a final firmware the radio parameters will be known so
|
||||
* there is no need to support all possible parameters.
|
||||
* Removing these functions will greatly reduce the final firmware
|
||||
* size.
|
||||
*
|
||||
* \version 2.0.0
|
||||
* \date May 6 2013
|
||||
* \author Gregory Cristian
|
||||
*
|
||||
* Last modified by Miguel Luis on Jun 19 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: sx1276.c
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
|
||||
#include "platform.h"
|
||||
#include "radio.h"
|
||||
|
||||
#if defined(USE_SX1276_RADIO)
|
||||
#include "sx1276.h"
|
||||
#include "sx1276-Hal.h"
|
||||
#include "sx1276-Fsk.h"
|
||||
#include "sx1276-LoRa.h"
|
||||
|
||||
uint8_t SX1276Regs[0x70];
|
||||
|
||||
static bool LoRaOn = true;
|
||||
static bool LoRaOnState = false;
|
||||
|
||||
void SX1276Reset(void)
|
||||
{
|
||||
uint32_t startTick;
|
||||
|
||||
SX1276SetReset(RADIO_RESET_ON);
|
||||
|
||||
DDL_DelayMS(1);
|
||||
|
||||
SX1276SetReset(RADIO_RESET_OFF);
|
||||
|
||||
DDL_DelayMS(6);
|
||||
}
|
||||
|
||||
void SX1276_SetLoRaOn(bool enable)
|
||||
{
|
||||
if(LoRaOnState == enable) {
|
||||
return;
|
||||
}
|
||||
|
||||
LoRaOnState = enable;
|
||||
LoRaOn = enable;
|
||||
|
||||
if(LoRaOn == true) {
|
||||
SX1276LoRaSetOpMode(RFLR_OPMODE_SLEEP);
|
||||
|
||||
SX1276LR->RegOpMode = (SX1276LR->RegOpMode & RFLR_OPMODE_LONGRANGEMODE_MASK) | RFLR_OPMODE_LONGRANGEMODE_ON;
|
||||
SX1276Write(REG_LR_OPMODE, SX1276LR->RegOpMode);
|
||||
|
||||
SX1276LoRaSetOpMode(RFLR_OPMODE_STANDBY);
|
||||
|
||||
// RxDone RxTimeout FhssChangeChannel CadDone
|
||||
SX1276LR->RegDioMapping1 = RFLR_DIOMAPPING1_DIO0_00 | RFLR_DIOMAPPING1_DIO1_00 | RFLR_DIOMAPPING1_DIO2_00 | RFLR_DIOMAPPING1_DIO3_00;
|
||||
// CadDetected ModeReady
|
||||
SX1276LR->RegDioMapping2 = RFLR_DIOMAPPING2_DIO4_00 | RFLR_DIOMAPPING2_DIO5_00;
|
||||
SX1276WriteBuffer(REG_LR_DIOMAPPING1, &SX1276LR->RegDioMapping1, 2);
|
||||
|
||||
SX1276ReadBuffer(REG_LR_OPMODE, SX1276Regs + 1, 0x70 - 1);
|
||||
} else {
|
||||
SX1276LoRaSetOpMode(RFLR_OPMODE_SLEEP);
|
||||
|
||||
SX1276LR->RegOpMode = (SX1276LR->RegOpMode & RFLR_OPMODE_LONGRANGEMODE_MASK) | RFLR_OPMODE_LONGRANGEMODE_OFF;
|
||||
SX1276Write(REG_LR_OPMODE, SX1276LR->RegOpMode);
|
||||
|
||||
SX1276LoRaSetOpMode(RFLR_OPMODE_STANDBY);
|
||||
|
||||
SX1276ReadBuffer(REG_OPMODE, SX1276Regs + 1, 0x70 - 1);
|
||||
}
|
||||
}
|
||||
|
||||
bool SX1276_GetLoRaOn(void)
|
||||
{
|
||||
return LoRaOn;
|
||||
}
|
||||
|
||||
void SX1276SetOpMode(uint8_t opMode)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
SX1276FskSetOpMode(opMode);
|
||||
} else {
|
||||
SX1276LoRaSetOpMode(opMode);
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t SX1276_GetOpMode(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
return SX1276FskGetOpMode();
|
||||
} else {
|
||||
return SX1276LoRaGetOpMode();
|
||||
}
|
||||
}
|
||||
|
||||
double SX1276ReadRssi(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
return SX1276FskReadRssi();
|
||||
} else {
|
||||
return SX1276LoRaReadRssi();
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t SX1276_ReadRxGain(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
return SX1276FskReadRxGain();
|
||||
} else {
|
||||
return SX1276LoRaReadRxGain();
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t SX1276_GetPacketRxGain(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
return SX1276FskGetPacketRxGain();
|
||||
} else {
|
||||
return SX1276LoRaGetPacketRxGain();
|
||||
}
|
||||
}
|
||||
|
||||
int8_t SX1276_GetPacketSnr(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
while(1) {
|
||||
// Useless in FSK mode
|
||||
// Block program here
|
||||
}
|
||||
} else {
|
||||
return SX1276LoRaGetPacketSnr();
|
||||
}
|
||||
}
|
||||
|
||||
double SX1276_GetPacketRssi(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
return SX1276FskGetPacketRssi();
|
||||
} else {
|
||||
return SX1276LoRaGetPacketRssi();
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t SX1276GetPacketAfc(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
return SX1276FskGetPacketAfc();
|
||||
} else {
|
||||
while(1) {
|
||||
// Useless in LoRa mode
|
||||
// Block program here
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void SX1276StartRx(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
SX1276FskSetRFState(RF_STATE_RX_INIT);
|
||||
} else {
|
||||
SX1276LoRaSetRFState(RFLR_STATE_RX_INIT);
|
||||
}
|
||||
}
|
||||
|
||||
void SX1276GetRxPacket(void *buffer, uint16_t *size)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
SX1276FskGetRxPacket(buffer, size);
|
||||
} else {
|
||||
SX1276LoRaGetRxPacket(buffer, size);
|
||||
}
|
||||
}
|
||||
|
||||
void SX1276SetTxPacket(const void *buffer, uint16_t size)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
SX1276FskSetTxPacket(buffer, size);
|
||||
} else {
|
||||
SX1276LoRaSetTxPacket(buffer, size);
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t SX1276GetRFState(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
return SX1276FskGetRFState();
|
||||
} else {
|
||||
return SX1276LoRaGetRFState();
|
||||
}
|
||||
}
|
||||
|
||||
void SX1276SetRFState(uint8_t state)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
SX1276FskSetRFState(state);
|
||||
} else {
|
||||
SX1276LoRaSetRFState(state);
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t SX1276Process(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
return SX1276FskProcess();
|
||||
} else {
|
||||
return SX1276LoRaProcess();
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t SX1276ChannelEmpty(void)
|
||||
{
|
||||
if(LoRaOn == false) {
|
||||
return true;
|
||||
} else {
|
||||
SX1276LoraChannelEmpty();
|
||||
}
|
||||
}
|
||||
|
||||
void SX1276Init(void)
|
||||
{
|
||||
uint8_t TempReg;
|
||||
|
||||
SX1276 = (tSX1276 *)SX1276Regs;
|
||||
SX1276LR = (tSX1276LR *)SX1276Regs;
|
||||
|
||||
SX1276InitIo();
|
||||
|
||||
SX1276Reset();
|
||||
|
||||
SX1276Read(0x06, &TempReg);
|
||||
|
||||
if(TempReg != 0x6C) {
|
||||
KPrintf("Hard SPI Err!\r\n");
|
||||
}
|
||||
|
||||
SX1276Read(0x42, &TempReg);
|
||||
|
||||
if(TempReg != 0x12) {
|
||||
KPrintf("Hard SPI Err! version 0x%x\r\n", TempReg);
|
||||
}
|
||||
|
||||
#if (LORA == 0)
|
||||
LoRaOn = false;
|
||||
SX1276_SetLoRaOn(LoRaOn);
|
||||
SX1276FskInit();
|
||||
#else
|
||||
LoRaOn = true;
|
||||
SX1276_SetLoRaOn(LoRaOn);
|
||||
SX1276LoRaInit();
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
|
@ -0,0 +1,93 @@
|
|||
/*
|
||||
* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
|
||||
* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
|
||||
* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
|
||||
* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
|
||||
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
|
||||
* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* Copyright (C) SEMTECH S.A.
|
||||
*/
|
||||
/*!
|
||||
* \file sx1276.h
|
||||
* \brief SX1276 RF chip high level functions driver
|
||||
*
|
||||
* \remark Optional support functions.
|
||||
* These functions are defined only to easy the change of the
|
||||
* parameters.
|
||||
* For a final firmware the radio parameters will be known so
|
||||
* there is no need to support all possible parameters.
|
||||
* Removing these functions will greatly reduce the final firmware
|
||||
* size.
|
||||
*
|
||||
* \version 2.0.0
|
||||
* \date May 6 2013
|
||||
* \author Gregory Cristian
|
||||
*
|
||||
* Last modified by Miguel Luis on Jun 19 2013
|
||||
*/
|
||||
/*************************************************
|
||||
File name: sx1276.h
|
||||
Description: support aiit board configure and register function
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. replace original macro and basic date type with AIIT XUOS Lab's own defination
|
||||
*************************************************/
|
||||
|
||||
|
||||
#ifndef __SX1276_H__
|
||||
#define __SX1276_H__
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
extern uint8_t SX1276Regs[0x70]; //SX1276寄存器数组
|
||||
|
||||
void SX1276Init( void ); //初始化SX1276
|
||||
|
||||
void SX1276Reset( void ); //重置SX1276
|
||||
|
||||
/*以下函数都没有被使用到,因为在sx1276-LoRa.h里面又定义了一系列与下面作用相同的函数*/
|
||||
void SX1276_SetLoRaOn( bool enable ); //启用LoRa调制解调器或FSK调制解调器
|
||||
|
||||
bool SX1276_GetLoRaOn( void ); //获取LoRa调制解调器状态
|
||||
|
||||
void SX1276SetOpMode( uint8_t opMode ); //设置SX1276操作模式
|
||||
|
||||
uint8_t SX1276_GetOpMode( void ); //获取SX1276操作模式
|
||||
|
||||
uint8_t SX1276_ReadRxGain( void ); //读取当前Rx增益设置
|
||||
|
||||
double SX1276ReadRssi( void ); //读取无线信号强度
|
||||
|
||||
uint8_t SX1276_GetPacketRxGain( void ); //获取数据时的增益值
|
||||
|
||||
int8_t SX1276_GetPacketSnr( void ); //获取数据时的信噪比值,信号和噪声的比值,信噪比越高,说明信号干扰越小。
|
||||
|
||||
double SX1276_GetPacketRssi( void ); //获取数据是的无线信号强度
|
||||
|
||||
/*!
|
||||
* \brief Gets the AFC value measured while receiving the packet
|
||||
*
|
||||
* \retval afcValue Current AFC value in [Hz]
|
||||
*/
|
||||
uint32_t SX1276GetPacketAfc( void ); //此函数不知道作用
|
||||
|
||||
|
||||
void SX1276StartRx( void ); //开始接收
|
||||
|
||||
void SX1276GetRxPacket( void *buffer, uint16_t *size ); //得到接收的数据
|
||||
|
||||
void SX1276SetTxPacket( const void *buffer, uint16_t size ); //发送数据
|
||||
|
||||
uint8_t SX1276GetRFState( void ); //得到RFLRState状态
|
||||
|
||||
void SX1276SetRFState( uint8_t state ); //设置RFLRState状态,RFLRState的值决定了下面的函数处理哪一步的代码
|
||||
|
||||
uint32_t SX1276Process( void ); //SX1276模块接发收数据的处理函数
|
||||
|
||||
uint32_t SX1276ChannelEmpty( void );
|
||||
|
||||
#endif
|
|
@ -104,12 +104,22 @@ struct SerialHardwareDevice serial_device_3;
|
|||
|
||||
void Uart3RxIrqHandler(void)
|
||||
{
|
||||
x_base lock = 0;
|
||||
lock = DISABLE_INTERRUPT();
|
||||
|
||||
SerialSetIsr(&serial_device_3, SERIAL_EVENT_RX_IND);
|
||||
|
||||
ENABLE_INTERRUPT(lock);
|
||||
}
|
||||
|
||||
void Uart3RxErrIrqHandler(void)
|
||||
{
|
||||
x_base lock = 0;
|
||||
lock = DISABLE_INTERRUPT();
|
||||
|
||||
UartRxErrIsr(&serial_bus_3, &serial_driver_3, &serial_device_3);
|
||||
|
||||
ENABLE_INTERRUPT(lock);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -120,12 +130,22 @@ struct SerialHardwareDevice serial_device_6;
|
|||
|
||||
void Uart6RxIrqHandler(void)
|
||||
{
|
||||
x_base lock = 0;
|
||||
lock = DISABLE_INTERRUPT();
|
||||
|
||||
SerialSetIsr(&serial_device_6, SERIAL_EVENT_RX_IND);
|
||||
|
||||
ENABLE_INTERRUPT(lock);
|
||||
}
|
||||
|
||||
void Uart6RxErrIrqHandler(void)
|
||||
{
|
||||
x_base lock = 0;
|
||||
lock = DISABLE_INTERRUPT();
|
||||
|
||||
UartRxErrIsr(&serial_bus_6, &serial_driver_6, &serial_device_6);
|
||||
|
||||
ENABLE_INTERRUPT(lock);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -0,0 +1,25 @@
|
|||
config BSP_USING_HC32_USBH
|
||||
bool "Using usb host by HC32 library"
|
||||
default y
|
||||
if BSP_USING_HC32_USBH
|
||||
config USB_BUS_NAME
|
||||
string "usb bus name"
|
||||
default "usb"
|
||||
config USB_DRIVER_NAME
|
||||
string "usb bus driver name"
|
||||
default "usb_drv"
|
||||
config USB_DEVICE_NAME
|
||||
string "usb bus device name"
|
||||
default "usb_dev"
|
||||
config MOUNT_USB_FS
|
||||
bool "mount usb file system : if y then not support sdcard-mount-fs"
|
||||
default y
|
||||
select MOUNT_USB
|
||||
|
||||
if MOUNT_USB_FS
|
||||
config MOUNT_USB_FS_TYPE
|
||||
int "choose file system type : FATFS(0)"
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
SRC_DIR := hc32_usb_driver
|
||||
|
||||
SRC_FILES := connect_usb.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,235 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_usb.c
|
||||
* @brief support hc32f4a0-board usb function and register to bus framework
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-11-07
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: connect_usb.c
|
||||
Description: support hc32f4a0-board usb function and register to bus framework
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2022-11-07
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support hc32f4a0-board usb configure, write and read
|
||||
2. support hc32f4a0-board usb bus device and driver register
|
||||
*************************************************/
|
||||
|
||||
#include <connect_usb.h>
|
||||
|
||||
usb_core_instance usb_app_instance;
|
||||
USBH_HOST usb_app_host;
|
||||
|
||||
static void UsbHostTask(void *parameter);
|
||||
|
||||
#if defined(FS_VFS)
|
||||
void UsbMountFileSystem()
|
||||
{
|
||||
if (MountFilesystem(USB_BUS_NAME, USB_DEVICE_NAME, USB_DRIVER_NAME, FSTYPE_FATFS, UDISK_MOUNTPOINT) == 0)
|
||||
KPrintf("Mount FAT on Udisk successful.\n");
|
||||
else
|
||||
KPrintf("Mount FAT on Udisk failed.\n");
|
||||
}
|
||||
|
||||
void UsbUnmountFileSystem()
|
||||
{
|
||||
UnmountFileSystem(UDISK_MOUNTPOINT);
|
||||
}
|
||||
|
||||
#ifdef MOUNT_USB
|
||||
int MountUsb(void)
|
||||
{
|
||||
int32 usb_host_task = 0;
|
||||
usb_host_task = KTaskCreate("usbh", UsbHostTask, NONE,
|
||||
USB_HOST_STACK_SIZE, 8);
|
||||
if(usb_host_task < 0) {
|
||||
KPrintf("usb_host_task create failed ...%s %d.\n", __FUNCTION__, __LINE__);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
StartupKTask(usb_host_task);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
static uint32 UsbHostOpen(void *dev)
|
||||
{
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 UsbHostClose(void *dev)
|
||||
{
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 UsbHostRead(void *dev, struct BusBlockReadParam *read_param)
|
||||
{
|
||||
USB_HOST_MSC_STATUS status = USB_HOST_MSC_OK;
|
||||
|
||||
if (host_driver_ifdevconnected(&usb_app_instance) != 0UL) {
|
||||
|
||||
do {
|
||||
status = usb_host_msc_Read10(&usb_app_instance, (uint8 *)read_param->buffer, read_param->pos, USB_SINGLE_BLOCK_SIZE * (uint32_t)read_param->size);
|
||||
usb_host_msc_botxferprocess(&usb_app_instance, &usb_app_host);
|
||||
|
||||
if (host_driver_ifdevconnected(&usb_app_instance) == 0UL) {
|
||||
return 0;
|
||||
}
|
||||
} while (USB_HOST_MSC_BUSY == status);
|
||||
}
|
||||
|
||||
if (USB_HOST_MSC_OK == status) {
|
||||
return read_param->size;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint32 UsbHostWrite(void *dev, struct BusBlockWriteParam *write_param)
|
||||
{
|
||||
USB_HOST_MSC_STATUS status = USB_HOST_MSC_OK;
|
||||
|
||||
if (host_driver_ifdevconnected(&usb_app_instance) != 0UL) {
|
||||
do {
|
||||
status = usb_host_msc_Write10(&usb_app_instance, (uint8 *)write_param->buffer, write_param->pos, USB_SINGLE_BLOCK_SIZE * (uint32_t)write_param->size);
|
||||
usb_host_msc_botxferprocess(&usb_app_instance, &usb_app_host);
|
||||
|
||||
if (host_driver_ifdevconnected(&usb_app_instance) == 0UL) {
|
||||
return 0;
|
||||
}
|
||||
} while (USB_HOST_MSC_BUSY == status);
|
||||
}
|
||||
|
||||
if (USB_HOST_MSC_OK == status) {
|
||||
return write_param->size;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int UsbControl(struct HardwareDev *dev, struct HalDevBlockParam *block_param)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
|
||||
if (OPER_BLK_GETGEOME == block_param->cmd) {
|
||||
block_param->dev_block.size_perbank = USB_SINGLE_BLOCK_SIZE;
|
||||
block_param->dev_block.block_size = USB_SINGLE_BLOCK_SIZE;
|
||||
block_param->dev_block.bank_num = USB_HOST_MSC_Param.MSC_Capacity;
|
||||
}
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
/*manage the usb device operations*/
|
||||
static const struct UsbDevDone dev_done =
|
||||
{
|
||||
.open = UsbHostOpen,
|
||||
.close = UsbHostClose,
|
||||
.write = UsbHostWrite,
|
||||
.read = UsbHostRead,
|
||||
};
|
||||
|
||||
static void UsbHostTask(void *parameter)
|
||||
{
|
||||
usb_host_init(&usb_app_instance, &usb_app_host, &USBH_MSC_cb, &USR_cb);
|
||||
while (1) {
|
||||
usb_host_mainprocess(&usb_app_instance, &usb_app_host);
|
||||
}
|
||||
}
|
||||
|
||||
/*Init usb host bus、driver*/
|
||||
static int BoardUsbBusInit(struct UsbBus *usb_bus, struct UsbDriver *usb_driver)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the usb bus */
|
||||
ret = UsbBusInit(usb_bus, USB_BUS_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_usb_init UsbBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Init the usb driver*/
|
||||
ret = UsbDriverInit(usb_driver, USB_DRIVER_NAME);
|
||||
if (EOK != ret){
|
||||
KPrintf("board_usb_init UsbDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Attach the usb driver to the usb bus*/
|
||||
ret = UsbDriverAttachToBus(USB_DRIVER_NAME, USB_BUS_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_usb_init USEDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Attach the usb device to the usb bus*/
|
||||
static int BoardUsbDevBend(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
static struct UsbHardwareDevice usb_device;
|
||||
memset(&usb_device, 0, sizeof(struct UsbHardwareDevice));
|
||||
|
||||
usb_device.dev_done = &dev_done;
|
||||
usb_device.haldev.dev_block_control = UsbControl;
|
||||
|
||||
ret = USBDeviceRegister(&usb_device, NONE, USB_DEVICE_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("USBDeviceRegister device %s error %d\n", USB_DEVICE_NAME, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = USBDeviceAttachToBus(USB_DEVICE_NAME, USB_BUS_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("USBDeviceAttachToBus device %s error %d\n", USB_DEVICE_NAME, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int HwUsbHostInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
static struct UsbBus usb_bus;
|
||||
memset(&usb_bus, 0, sizeof(struct UsbBus));
|
||||
|
||||
static struct UsbDriver usb_driver;
|
||||
memset(&usb_driver, 0, sizeof(struct UsbDriver));
|
||||
|
||||
ret = BoardUsbBusInit(&usb_bus, &usb_driver);
|
||||
if (EOK != ret) {
|
||||
KPrintf("BoardUsbBusInit error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardUsbDevBend();
|
||||
if (EOK != ret) {
|
||||
KPrintf("BoardUsbDevBend error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
SRC_FILES := usb_host_user.c usb_bsp.c
|
||||
|
||||
SRC_DIR := usb_host_lib
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,104 @@
|
|||
/**
|
||||
*******************************************************************************
|
||||
* @file usb/usb_host_msc/source/usb_app_conf.h
|
||||
* @brief low level driver configuration
|
||||
@verbatim
|
||||
Change Logs:
|
||||
Date Author Notes
|
||||
2022-03-31 CDT First version
|
||||
@endverbatim
|
||||
*******************************************************************************
|
||||
* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
|
||||
*
|
||||
* This software component is licensed by XHSC under BSD 3-Clause license
|
||||
* (the "License"); You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
#ifndef __USB_APP_CONF_H__
|
||||
#define __USB_APP_CONF_H__
|
||||
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Include files
|
||||
******************************************************************************/
|
||||
|
||||
/* USB MODE CONFIGURATION */
|
||||
/*
|
||||
USB_FS_MODE, USB_HS_MODE, USB_HS_EXTERNAL_PHY defined comment
|
||||
(1) If only defined USB_FS_MODE:
|
||||
MCU USBFS core work in full speed using internal PHY.
|
||||
(2) If only defined USB_HS_MODE:
|
||||
MCU USBHS core work in full speed using internal PHY.
|
||||
(3) If both defined USB_HS_MODE && USB_HS_EXTERNAL_PHY
|
||||
MCU USBHS core work in high speed using external PHY.
|
||||
(4) Other combination:
|
||||
Not support, forbid!!
|
||||
*/
|
||||
|
||||
//#define USB_HS_MODE
|
||||
#define USB_FS_MODE
|
||||
|
||||
#define USE_HOST_MODE
|
||||
|
||||
#ifdef USB_HS_MODE
|
||||
#define USB_HS_EXTERNAL_PHY
|
||||
#endif
|
||||
|
||||
#ifndef USB_HS_MODE
|
||||
#ifndef USB_FS_MODE
|
||||
#error "USB_HS_MODE or USB_FS_MODE should be defined"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef USE_DEVICE_MODE
|
||||
#ifndef USE_HOST_MODE
|
||||
#error "USE_DEVICE_MODE or USE_HOST_MODE should be defined"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* USB FIFO CONFIGURATION */
|
||||
#ifdef USB_FS_MODE
|
||||
#define RX_FIFO_FS_SIZE (128U)
|
||||
#define TXH_NP_FS_FIFOSIZ (32U)
|
||||
#define TXH_P_FS_FIFOSIZ (64U)
|
||||
|
||||
#if ((RX_FIFO_FS_SIZE + TXH_NP_FS_FIFOSIZ + TXH_P_FS_FIFOSIZ) > 640U)
|
||||
#error "The USB max FIFO size is 640 x 4 Bytes!"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef USB_HS_MODE
|
||||
#define RX_FIFO_HS_SIZE (512U)
|
||||
#define TXH_NP_HS_FIFOSIZ (128U)
|
||||
#define TXH_P_HS_FIFOSIZ (256U)
|
||||
|
||||
#if ((RX_FIFO_FS_SIZE + TXH_NP_FS_FIFOSIZ + TXH_P_FS_FIFOSIZ) > 2048U)
|
||||
#error "The USB max FIFO size is 2048 x 4 Bytes!"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* FUNCTION CONFIGURATION */
|
||||
#define USBH_MAX_NUM_INTERFACES (3U)
|
||||
#define USBH_MAX_NUM_ENDPOINTS (2U)
|
||||
|
||||
/* CONFIGURATION FOR MSC */
|
||||
#define USBH_MSC_MPS_SIZE (0x40U)
|
||||
//#define USB_MSC_FAT_VALID
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __USB_APP_CONF_H__ */
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF (not truncated)
|
||||
******************************************************************************/
|
|
@ -0,0 +1,147 @@
|
|||
/**
|
||||
*******************************************************************************
|
||||
* @file usb/usb_host_msc/source/usb_bsp.c
|
||||
* @brief BSP function for USB example
|
||||
@verbatim
|
||||
Change Logs:
|
||||
Date Author Notes
|
||||
2022-03-31 CDT First version
|
||||
@endverbatim
|
||||
*******************************************************************************
|
||||
* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
|
||||
*
|
||||
* This software component is licensed by XHSC under BSD 3-Clause license
|
||||
* (the "License"); You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file usb_bsp.c
|
||||
* @brief support hc32f4a0-board usb bsp function
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-11-08
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: usb_bsp.c
|
||||
Description: support hc32f4a0-board usb bsp function
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2022-11-08
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support hc32f4a0-board usb IO configure
|
||||
2. support hc32f4a0-board usb irq define
|
||||
*************************************************/
|
||||
#include <device.h>
|
||||
#include "usb_bsp.h"
|
||||
#include <usb_host_int.h>
|
||||
|
||||
extern usb_core_instance usb_app_instance;
|
||||
|
||||
/* USBFS Core*/
|
||||
#define USB_DP_PORT (GPIO_PORT_A)
|
||||
#define USB_DP_PIN (GPIO_PIN_12)
|
||||
|
||||
#define USB_DM_PORT (GPIO_PORT_A)
|
||||
#define USB_DM_PIN (GPIO_PIN_11)
|
||||
|
||||
#define USB_DRVVBUS_PORT (GPIO_PORT_C)
|
||||
#define USB_DRVVBUS_PIN (GPIO_PIN_09)
|
||||
|
||||
#define USB_VBUSDET_PORT (GPIO_PORT_A)
|
||||
#define USB_VBUSDET_PIN (GPIO_PIN_09)
|
||||
|
||||
#define USB_OC_PORT (GPIO_PORT_D)
|
||||
#define USB_OC_PIN (GPIO_PIN_15)
|
||||
|
||||
//USB HOST ISR
|
||||
static void USB_IRQ_Handler(void)
|
||||
{
|
||||
x_base lock = 0;
|
||||
lock = DISABLE_INTERRUPT();
|
||||
|
||||
usb_host_isr(&usb_app_instance);
|
||||
|
||||
ENABLE_INTERRUPT(lock);
|
||||
}
|
||||
|
||||
void usb_bsp_init(usb_core_instance *pdev)
|
||||
{
|
||||
stc_gpio_init_t stcGpioCfg;
|
||||
|
||||
/* USB clock source configurate */
|
||||
CLK_SetUSBClockSrc(CLK_USBCLK_SYSCLK_DIV5);
|
||||
|
||||
(void)GPIO_StructInit(&stcGpioCfg);
|
||||
|
||||
#ifdef USB_FS_MODE
|
||||
stcGpioCfg.u16PinAttr = PIN_ATTR_ANALOG;
|
||||
(void)GPIO_Init(USB_DM_PORT, USB_DM_PIN, &stcGpioCfg);
|
||||
(void)GPIO_Init(USB_DP_PORT, USB_DP_PIN, &stcGpioCfg);
|
||||
|
||||
GPIO_SetFunc(USB_DRVVBUS_PORT, USB_DRVVBUS_PIN, GPIO_FUNC_10); /* VBUS */
|
||||
|
||||
FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_USBFS, ENABLE);
|
||||
#endif
|
||||
}
|
||||
|
||||
void usb_bsp_nvicconfig(void)
|
||||
{
|
||||
stc_irq_signin_config_t stcIrqRegiConf;
|
||||
/* Register INT_SRC_USBFS_GLB Int to Vect.No.030 */
|
||||
stcIrqRegiConf.enIRQn = INT030_IRQn;
|
||||
/* Select interrupt function */
|
||||
#ifdef USB_FS_MODE
|
||||
stcIrqRegiConf.enIntSrc = INT_SRC_USBFS_GLB;
|
||||
#else
|
||||
stcIrqRegiConf.enIntSrc = INT_SRC_USBHS_GLB;
|
||||
#endif
|
||||
/* Callback function */
|
||||
stcIrqRegiConf.pfnCallback = &USB_IRQ_Handler;
|
||||
/* Registration IRQ */
|
||||
(void)INTC_IrqSignIn(&stcIrqRegiConf);
|
||||
/* Clear Pending */
|
||||
NVIC_ClearPendingIRQ(stcIrqRegiConf.enIRQn);
|
||||
/* Set priority */
|
||||
NVIC_SetPriority(stcIrqRegiConf.enIRQn, DDL_IRQ_PRIO_15);
|
||||
/* Enable NVIC */
|
||||
NVIC_EnableIRQ(stcIrqRegiConf.enIRQn);
|
||||
}
|
||||
|
||||
void usb_udelay(const uint32_t usec)
|
||||
{
|
||||
__IO uint32_t i;
|
||||
uint32_t j;
|
||||
j = (HCLK_VALUE + 1000000UL - 1UL) / 1000000UL * usec;
|
||||
for (i = 0UL; i < j; i++) {
|
||||
}
|
||||
}
|
||||
|
||||
void usb_mdelay(const uint32_t msec)
|
||||
{
|
||||
usb_udelay(msec * 1000);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the IO for the Vbus and OverCurrent
|
||||
* @param [in] pdev device instance
|
||||
* @retval None
|
||||
*/
|
||||
void usb_bsp_cfgvbus(LL_USB_TypeDef *USBx)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Drive vbus
|
||||
* @param [in] pdev device instance
|
||||
* @param [in] state the vbus state it would be.
|
||||
* @retval None
|
||||
*/
|
||||
void usb_bsp_drivevbus(LL_USB_TypeDef *USBx, uint8_t state)
|
||||
{
|
||||
}
|
|
@ -0,0 +1,104 @@
|
|||
/**
|
||||
*******************************************************************************
|
||||
* @file usb/usb_host_msc/source/usb_bsp.h
|
||||
* @brief Head file for usb_bsp.c
|
||||
@verbatim
|
||||
Change Logs:
|
||||
Date Author Notes
|
||||
2022-03-31 CDT First version
|
||||
@endverbatim
|
||||
*******************************************************************************
|
||||
* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
|
||||
*
|
||||
* This software component is licensed by XHSC under BSD 3-Clause license
|
||||
* (the "License"); You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file usb_bsp.h
|
||||
* @brief support hc32f4a0-board usb bsp function
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-11-08
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: usb_bsp.h
|
||||
Description: support hc32f4a0-board usb bsp function
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2022-11-08
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
*************************************************/
|
||||
|
||||
#ifndef USB_BSP_H
|
||||
#define USB_BSP_H
|
||||
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Include files
|
||||
******************************************************************************/
|
||||
#include <usb_lib.h>
|
||||
|
||||
/**
|
||||
* @addtogroup HC32F4A0_DDL_Applications
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup USB_Host_Msc
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Global type definitions ('typedef')
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Global pre-processor symbols/macros ('#define')
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Global variable definitions ('extern')
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
Global function prototypes (definition in C source)
|
||||
******************************************************************************/
|
||||
extern void usb_bsp_init(usb_core_instance *pdev);
|
||||
extern void usb_udelay(const uint32_t usec);
|
||||
extern void usb_mdelay(const uint32_t msec);
|
||||
extern void usb_bsp_nvicconfig(void);
|
||||
#ifdef USE_HOST_MODE
|
||||
extern void usb_bsp_cfgvbus(LL_USB_TypeDef *USBx);
|
||||
extern void usb_bsp_drivevbus(LL_USB_TypeDef *USBx, uint8_t state);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __USB_BSP_H__ */
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF (not truncated)
|
||||
******************************************************************************/
|
|
@ -0,0 +1,3 @@
|
|||
SRC_DIR := host_class host_core
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue