From ccc9d8e72e70b59b6393b13272eb6b2f6add4948 Mon Sep 17 00:00:00 2001 From: Wang_Weigen Date: Wed, 2 Mar 2022 15:35:46 +0800 Subject: [PATCH] add rv32m1 zero riscy jump entry --- .../XiUOS/arch/risc-v/rv32m1_vega/startup_RV32M1_zero_riscy.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Ubiquitous/XiUOS/arch/risc-v/rv32m1_vega/startup_RV32M1_zero_riscy.S b/Ubiquitous/XiUOS/arch/risc-v/rv32m1_vega/startup_RV32M1_zero_riscy.S index cb180e747..943b5ff63 100644 --- a/Ubiquitous/XiUOS/arch/risc-v/rv32m1_vega/startup_RV32M1_zero_riscy.S +++ b/Ubiquitous/XiUOS/arch/risc-v/rv32m1_vega/startup_RV32M1_zero_riscy.S @@ -33,7 +33,7 @@ History: Author: AIIT XUOS Lab Modification: *************************************************/ - +.extern Rv32m1VgeaStart #define EXCEPTION_STACK_SIZE 0x58 .text @@ -108,7 +108,7 @@ Reset_Handler: # Enable global interrupt. */ csrsi mstatus, 8 - jal main + jal Rv32m1VgeaStart ebreak .size Reset_Handler, . - Reset_Handler