forked from xuos/xiuos
change ch438 on nuttx
This commit is contained in:
parent
8d6e9532cf
commit
cd5686de2e
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@ -26,7 +26,7 @@
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/****************************************************************************
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/****************************************************************************
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* Private Function Prototypes
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* Private Function Prototypes
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****************************************************************************/
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****************************************************************************/
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static FAR void *getInterruptStatus(FAR void *arg);
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static FAR void getInterruptStatus(FAR void *arg);
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static void CH438SetOutput(void);
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static void CH438SetOutput(void);
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static void CH438SetInput(void);
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static void CH438SetInput(void);
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static uint8_t ReadCH438Data(uint8_t addr);
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static uint8_t ReadCH438Data(uint8_t addr);
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@ -58,7 +58,7 @@ struct ch438_dev_s
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* Private Data
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* Private Data
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****************************************************************************/
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****************************************************************************/
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static pthread_mutex_t mutex[CH438PORTNUM] =
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static pthread_mutex_t mutex[CH438PORTNUM] =
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{
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{
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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@ -69,7 +69,7 @@ static pthread_mutex_t mutex[CH438PORTNUM] =
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER
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PTHREAD_MUTEX_INITIALIZER
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};
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};
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static pthread_cond_t cond[CH438PORTNUM] =
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static pthread_cond_t cond[CH438PORTNUM] =
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{
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{
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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@ -109,25 +109,25 @@ static const struct file_operations g_ch438fops =
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* thread task getInterruptStatus
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* thread task getInterruptStatus
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*
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*
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****************************************************************************/
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****************************************************************************/
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static FAR void *getInterruptStatus(FAR void *arg)
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static FAR void getInterruptStatus(FAR void *arg)
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{
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{
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uint8_t i;
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uint8_t i;
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while(1)
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while(1)
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{
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{
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gInterruptStatus = ReadCH438Data(REG_SSR_ADDR);
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gInterruptStatus = ReadCH438Data(REG_SSR_ADDR);
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if(!gInterruptStatus)
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if(!gInterruptStatus)
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{
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continue;
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}
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for(i = 0; i < CH438PORTNUM; i++)
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{
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{
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if(gInterruptStatus & Interruptnum[i])
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continue;
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{
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}
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pthread_mutex_lock(&mutex[i]);
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for(i = 0; i < CH438PORTNUM; i++)
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done[i] = true;
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{
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pthread_cond_signal(&cond[i]);
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if(gInterruptStatus & Interruptnum[i])
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pthread_mutex_unlock(&mutex[i]);
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{
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}
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pthread_mutex_lock(&mutex[i]);
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done[i] = true;
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pthread_cond_signal(&cond[i]);
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pthread_mutex_unlock(&mutex[i]);
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}
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}
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}
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}
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}
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}
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}
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@ -187,14 +187,14 @@ static uint8_t ReadCH438Data(uint8_t addr)
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CH438SetOutput();
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CH438SetOutput();
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up_udelay(1);
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up_udelay(1);
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if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
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if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
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if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
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if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
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if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
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if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
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if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
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if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
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if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
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if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
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if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
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if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
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if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
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if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
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if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
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if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
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up_udelay(1);
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up_udelay(1);
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@ -229,7 +229,7 @@ static uint8_t ReadCH438Data(uint8_t addr)
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* Description:
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* Description:
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* write data to ch438 address
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* write data to ch438 address
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*
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*
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****************************************************************************/
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****************************************************************************/
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static void WriteCH438Data(uint8_t addr, uint8_t dat)
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static void WriteCH438Data(uint8_t addr, uint8_t dat)
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{
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{
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imxrt_gpio_write(CH438_ALE_PIN, true);
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imxrt_gpio_write(CH438_ALE_PIN, true);
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@ -239,36 +239,36 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat)
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CH438SetOutput();
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CH438SetOutput();
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up_udelay(1);
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up_udelay(1);
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if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
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if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
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if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
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if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
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if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
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if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
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if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
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if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
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if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
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if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
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if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
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if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
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if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
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if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
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if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
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if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
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up_udelay(1);
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up_udelay(1);
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imxrt_gpio_write(CH438_ALE_PIN, false);
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imxrt_gpio_write(CH438_ALE_PIN, false);
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up_udelay(1);
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up_udelay(1);
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if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
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if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
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if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
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if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
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if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
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if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
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if(dat &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
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if(dat &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
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if(dat &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
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if(dat &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
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if(dat &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
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if(dat &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
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if(dat &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
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if(dat &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
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if(dat &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
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if(dat &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
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up_udelay(1);
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up_udelay(1);
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imxrt_gpio_write(CH438_NWR_PIN, false);
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imxrt_gpio_write(CH438_NWR_PIN, false);
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up_udelay(1);
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up_udelay(1);
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imxrt_gpio_write(CH438_NWR_PIN, true);
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imxrt_gpio_write(CH438_NWR_PIN, true);
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imxrt_gpio_write(CH438_ALE_PIN, true);
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imxrt_gpio_write(CH438_ALE_PIN, true);
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up_udelay(1);
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up_udelay(1);
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CH438SetInput();
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CH438SetInput();
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@ -282,10 +282,10 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat)
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* Description:
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* Description:
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* Write data block from ch438 address
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* Write data block from ch438 address
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*
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*
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****************************************************************************/
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****************************************************************************/
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static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf)
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static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf)
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{
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{
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while (mLen--)
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while(mLen--)
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WriteCH438Data(mAddr, *mBuf++);
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WriteCH438Data(mAddr, *mBuf++);
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}
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}
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@ -293,31 +293,31 @@ static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf)
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* Name: CH438UARTSend
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* Name: CH438UARTSend
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*
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*
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* Description:
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* Description:
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* Enable FIFO mode, which is used for ch438 serial port to send multi byte data,
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* Enable FIFO mode, which is used for ch438 serial port to send multi byte data,
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* with a maximum of 128 bytes of data sent at a time
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* with a maximum of 128 bytes of data sent at a time
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*
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*
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****************************************************************************/
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****************************************************************************/
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static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num)
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static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num)
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{
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{
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uint8_t REG_LSR_ADDR,REG_THR_ADDR;
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uint8_t REG_LSR_ADDR,REG_THR_ADDR;
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REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
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REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
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REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
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REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
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while(1)
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while(1)
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{
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{
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while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT ) == 0); /* 等待数据发送完毕,THR,TSR全空 */
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while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT) == 0); /* 等待数据发送完毕,THR,TSR全空 */
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if(Num <= CH438_BUFFSIZE)
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if(Num <= CH438_BUFFSIZE)
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{
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{
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WriteCH438Block(REG_THR_ADDR, Num, Data);
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WriteCH438Block(REG_THR_ADDR, Num, Data);
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break;
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break;
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}
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}
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else
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else
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{
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{
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WriteCH438Block(REG_THR_ADDR, 128, Data);
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WriteCH438Block(REG_THR_ADDR, 128, Data);
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Num -= CH438_BUFFSIZE;
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Num -= CH438_BUFFSIZE;
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Data += CH438_BUFFSIZE;
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Data += CH438_BUFFSIZE;
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}
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}
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}
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}
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}
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}
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/****************************************************************************
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/****************************************************************************
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@ -326,25 +326,25 @@ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num)
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* Description:
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* Description:
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* Disable FIFO mode for ch438 serial port to receive multi byte data
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* Disable FIFO mode for ch438 serial port to receive multi byte data
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*
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*
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****************************************************************************/
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****************************************************************************/
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uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf)
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uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf)
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{
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{
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uint8_t RcvNum = 0;
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uint8_t RcvNum = 0;
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uint8_t dat = 0;
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uint8_t dat = 0;
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uint8_t REG_LSR_ADDR,REG_RBR_ADDR;
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uint8_t REG_LSR_ADDR,REG_RBR_ADDR;
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REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
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REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
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REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
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REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
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/* Wait for the data to be ready */
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/* Wait for the data to be ready */
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while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 );
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while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 );
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while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01 )
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while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01)
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{
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{
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dat = ReadCH438Data(REG_RBR_ADDR);
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dat = ReadCH438Data(REG_RBR_ADDR);
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buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat;
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buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat;
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buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1;
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buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1;
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if (buff_ptr[ext_uart_no] == CH438_BUFFSIZE)
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if(buff_ptr[ext_uart_no] == CH438_BUFFSIZE)
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buff_ptr[ext_uart_no] = 0;
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buff_ptr[ext_uart_no] = 0;
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RcvNum = RcvNum + 1;
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RcvNum = RcvNum + 1;
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}
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}
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@ -380,13 +380,13 @@ static void ImxrtCH438Init(void)
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static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
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static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
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{
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{
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uint32_t div;
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uint32_t div;
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uint8_t DLL,DLM,dlab;
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uint8_t DLL,DLM,dlab;
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uint8_t REG_LCR_ADDR;
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uint8_t REG_LCR_ADDR;
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uint8_t REG_DLL_ADDR;
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uint8_t REG_DLL_ADDR;
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uint8_t REG_DLM_ADDR;
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uint8_t REG_DLM_ADDR;
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uint8_t REG_IER_ADDR;
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uint8_t REG_IER_ADDR;
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uint8_t REG_MCR_ADDR;
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uint8_t REG_MCR_ADDR;
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uint8_t REG_FCR_ADDR;
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uint8_t REG_FCR_ADDR;
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REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
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REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
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REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
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REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
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@ -408,7 +408,7 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
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dlab |= 0x80;
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dlab |= 0x80;
|
||||||
WriteCH438Data(REG_LCR_ADDR, dlab);
|
WriteCH438Data(REG_LCR_ADDR, dlab);
|
||||||
|
|
||||||
div = ( Fpclk >> 4 ) / baud_rate;
|
div = (Fpclk >> 4) / baud_rate;
|
||||||
DLM = div >> 8;
|
DLM = div >> 8;
|
||||||
DLL = div & 0xff;
|
DLL = div & 0xff;
|
||||||
|
|
||||||
|
@ -448,12 +448,12 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s
|
||||||
write_len = size;;
|
write_len = size;;
|
||||||
write_len_continue = size;
|
write_len_continue = size;
|
||||||
|
|
||||||
if (write_len > CH438_BUFFSIZE)
|
if(write_len > CH438_BUFFSIZE)
|
||||||
{
|
{
|
||||||
if (0 == write_len % CH438_BUFFSIZE)
|
if(0 == write_len % CH438_BUFFSIZE)
|
||||||
{
|
{
|
||||||
write_index = write_len / CH438_BUFFSIZE;
|
write_index = write_len / CH438_BUFFSIZE;
|
||||||
for (i = 0; i < write_index; i ++)
|
for(i = 0; i < write_index; i ++)
|
||||||
{
|
{
|
||||||
Ch438UartSend(ext_uart_no, write_buffer + i * CH438_BUFFSIZE, CH438_BUFFSIZE);
|
Ch438UartSend(ext_uart_no, write_buffer + i * CH438_BUFFSIZE, CH438_BUFFSIZE);
|
||||||
}
|
}
|
||||||
|
@ -461,7 +461,7 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
write_index = 0;
|
write_index = 0;
|
||||||
while (write_len_continue > CH438_BUFFSIZE)
|
while(write_len_continue > CH438_BUFFSIZE)
|
||||||
{
|
{
|
||||||
Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, CH438_BUFFSIZE);
|
Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, CH438_BUFFSIZE);
|
||||||
write_index++;
|
write_index++;
|
||||||
|
@ -489,26 +489,26 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no)
|
||||||
{
|
{
|
||||||
size_t RevLen = 0;
|
size_t RevLen = 0;
|
||||||
uint8_t InterruptStatus;
|
uint8_t InterruptStatus;
|
||||||
uint8_t REG_IIR_ADDR;
|
uint8_t REG_IIR_ADDR;
|
||||||
uint8_t REG_LSR_ADDR;
|
uint8_t REG_LSR_ADDR;
|
||||||
uint8_t REG_MSR_ADDR;
|
uint8_t REG_MSR_ADDR;
|
||||||
|
|
||||||
pthread_mutex_lock(&mutex[ext_uart_no]);
|
pthread_mutex_lock(&mutex[ext_uart_no]);
|
||||||
while(done[ext_uart_no] == false)
|
while(done[ext_uart_no] == false)
|
||||||
pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]);
|
pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]);
|
||||||
if (done[ext_uart_no] == true)
|
if(done[ext_uart_no] == true)
|
||||||
{
|
{
|
||||||
REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
|
REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
|
||||||
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
|
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
|
||||||
REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR;
|
REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR;
|
||||||
InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */
|
InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */
|
||||||
ch438info("InterruptStatus is %d\n", InterruptStatus);
|
ch438info("InterruptStatus is %d\n", InterruptStatus);
|
||||||
|
|
||||||
switch(InterruptStatus)
|
switch(InterruptStatus)
|
||||||
{
|
{
|
||||||
case INT_NOINT: /* 没有中断 */
|
case INT_NOINT: /* 没有中断 */
|
||||||
break;
|
break;
|
||||||
case INT_THR_EMPTY: /* THR空中断 */
|
case INT_THR_EMPTY: /* THR空中断 */
|
||||||
break;
|
break;
|
||||||
case INT_RCV_OVERTIME: /* 接收超时中断,收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/
|
case INT_RCV_OVERTIME: /* 接收超时中断,收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/
|
||||||
case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生,否则一般是前面的超时中断。处理过程同上面的超时中断 */
|
case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生,否则一般是前面的超时中断。处理过程同上面的超时中断 */
|
||||||
|
@ -546,16 +546,16 @@ static void Ch438InitDefault(void)
|
||||||
|
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
int i;
|
int i;
|
||||||
struct sched_param param;
|
struct sched_param param;
|
||||||
pthread_attr_t attr;
|
pthread_attr_t attr;
|
||||||
pthread_t thread;
|
pthread_t thread;
|
||||||
|
|
||||||
/* Initialize the mutex */
|
/* Initialize the mutex */
|
||||||
|
|
||||||
for(i = 0; i < CH438PORTNUM; i++)
|
for(i = 0; i < CH438PORTNUM; i++)
|
||||||
{
|
{
|
||||||
ret = pthread_mutex_init(&mutex[i], NULL);
|
ret = pthread_mutex_init(&mutex[i], NULL);
|
||||||
if (ret != 0)
|
if(ret != 0)
|
||||||
{
|
{
|
||||||
ch438err("pthread_mutex_init failed, status=%d\n", ret);
|
ch438err("pthread_mutex_init failed, status=%d\n", ret);
|
||||||
}
|
}
|
||||||
|
@ -565,18 +565,18 @@ static void Ch438InitDefault(void)
|
||||||
for(i = 0; i < CH438PORTNUM; i++)
|
for(i = 0; i < CH438PORTNUM; i++)
|
||||||
{
|
{
|
||||||
ret = pthread_cond_init(&cond[i], NULL);
|
ret = pthread_cond_init(&cond[i], NULL);
|
||||||
if (ret != 0)
|
if(ret != 0)
|
||||||
{
|
{
|
||||||
ch438err("pthread_cond_init failed, status=%d\n", ret);
|
ch438err("pthread_cond_init failed, status=%d\n", ret);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
pthread_attr_init(&attr);
|
pthread_attr_init(&attr);
|
||||||
param.sched_priority = 60;
|
param.sched_priority = 60;
|
||||||
pthread_attr_setschedparam(&attr, ¶m);
|
pthread_attr_setschedparam(&attr, ¶m);
|
||||||
pthread_attr_setstacksize(&attr, 2048);
|
pthread_attr_setstacksize(&attr, 2048);
|
||||||
ret = pthread_create(&thread, &attr, getInterruptStatus, NULL);
|
ret = pthread_create(&thread, &attr, (void*)getInterruptStatus, NULL);
|
||||||
if (ret < 0)
|
if(ret < 0)
|
||||||
{
|
{
|
||||||
ch438err("task create failed, status=%d\n", ret);
|
ch438err("task create failed, status=%d\n", ret);
|
||||||
}
|
}
|
||||||
|
@ -602,7 +602,7 @@ static int ch438_open(FAR struct file *filep)
|
||||||
uint8_t port = priv->port;
|
uint8_t port = priv->port;
|
||||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||||
|
|
||||||
if (g_ch438open[port])
|
if(g_ch438open[port])
|
||||||
{
|
{
|
||||||
return -EBUSY;
|
return -EBUSY;
|
||||||
}
|
}
|
||||||
|
@ -639,7 +639,7 @@ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t bufle
|
||||||
length = ImxrtCh438ReadData(port);
|
length = ImxrtCh438ReadData(port);
|
||||||
memcpy(buffer, buff[port], length);
|
memcpy(buffer, buff[port], length);
|
||||||
|
|
||||||
if (length > buflen)
|
if(length > buflen)
|
||||||
{
|
{
|
||||||
length = buflen;
|
length = buflen;
|
||||||
}
|
}
|
||||||
|
@ -679,7 +679,7 @@ static int ch438_register(FAR const char *devpath, uint8_t port)
|
||||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||||
|
|
||||||
priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s));
|
priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s));
|
||||||
if (priv == NULL)
|
if(priv == NULL)
|
||||||
{
|
{
|
||||||
ch438err("ERROR: Failed to allocate instance\n");
|
ch438err("ERROR: Failed to allocate instance\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
@ -689,7 +689,7 @@ static int ch438_register(FAR const char *devpath, uint8_t port)
|
||||||
|
|
||||||
/* Register the character driver */
|
/* Register the character driver */
|
||||||
ret = register_driver(devpath, &g_ch438fops, 0666, priv);
|
ret = register_driver(devpath, &g_ch438fops, 0666, priv);
|
||||||
if (ret < 0)
|
if(ret < 0)
|
||||||
{
|
{
|
||||||
ch438err("ERROR: Failed to register driver: %d\n", ret);
|
ch438err("ERROR: Failed to register driver: %d\n", ret);
|
||||||
kmm_free(priv);
|
kmm_free(priv);
|
||||||
|
|
Loading…
Reference in New Issue