forked from xuos/xiuos
xidatong support nuttx.bin
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3acf2c227a
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@ -7,7 +7,7 @@ if ARCH_BOARD_XIDATONG
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choice
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prompt "Boot Flash"
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default XIDATONG_HYPER_FLASH
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default XIDATONG_QSPI_FLASH
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config XIDATONG_HYPER_FLASH
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bool "HYPER Flash"
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@ -19,7 +19,7 @@ endchoice # Boot Flash
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config XIDATONG_SDRAM
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bool "Enable SDRAM"
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default n
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default y
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select IMXRT_SEMC_INIT_DONE
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---help---
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Activate DCD configuration of SDRAM
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@ -90,121 +90,41 @@ const struct flexspi_nor_config_s g_flash_config =
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{
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.mem_config =
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{
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.tag = FLEXSPI_CFG_BLK_TAG,
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.version = FLEXSPI_CFG_BLK_VERSION,
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.read_sample_clksrc = FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD,
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.cs_hold_time = 3u,
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.cs_setup_time = 3u,
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.column_address_width = 0u,
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.device_type = FLEXSPI_DEVICE_TYPE_SERIAL_NOR,
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.sflash_pad_type = SERIAL_FLASH_4PADS,
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.serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_60MHz,
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.sflash_a1size = 8u * 1024u * 1024u,
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.data_valid_time =
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{
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16u, 16u
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},
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.lookup_table =
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.tag = FLEXSPI_CFG_BLK_TAG,
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.version = FLEXSPI_CFG_BLK_VERSION,
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.read_sample_clksrc = FLASH_READ_SAMPLE_CLK_LOOPBACK_INTERNELLY,
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.cs_hold_time = 3u,
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.cs_setup_time = 3u,
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.device_mode_cfg_enable = true,
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.device_mode_type = 1,
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.device_mode_seq.seq_num = 1,
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.device_mode_seq.seq_id = 4,
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.device_mode_arg = 0x000200,
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.device_type = FLEXSPI_DEVICE_TYPE_SERIAL_NOR,
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.sflash_pad_type = SERIAL_FLASH_4PADS,
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.serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_60MHz,
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.sflash_a1size = 16u * 1024u * 1024u,
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.data_valid_time = {16u, 16u},
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/* Enable DDR mode, Word addassable,
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* Safe configuration, Differential clock
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*/
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.lookup_table =
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{
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/* LUTs */
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/* Read LUTs */
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[0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
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[1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
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[2] = FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0),
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/* 0 Fast read Quad IO DTR Mode Operation in SPI Mode (normal read) */
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FLEXSPI_LUT_SEQ(CMD_SDR,
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FLEXSPI_1PAD, 0xed, RADDR_DDR, FLEXSPI_4PAD, 0x18),
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FLEXSPI_LUT_SEQ(DUMMY_DDR,
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FLEXSPI_4PAD, 0x0c, READ_DDR, FLEXSPI_4PAD, 0x08),
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FLEXSPI_LUT_SEQ(STOP,
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FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP,
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FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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/* 1 Read Status */
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FLEXSPI_LUT_SEQ(CMD_SDR,
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FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x1),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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/* 2 */
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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/* 3 */
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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/* 4 */
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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/* 5 Erase Sector */
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FLEXSPI_LUT_SEQ(CMD_SDR,
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FLEXSPI_1PAD, 0xd7, RADDR_SDR, FLEXSPI_1PAD, 0x18),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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/* 6 */
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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/* 7 */
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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/* 8 */
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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/* 9 Page Program */
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FLEXSPI_LUT_SEQ(CMD_SDR,
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FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
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FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x8, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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/* 10 */
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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/* 11 Chip Erase */
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xc7, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
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[1*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
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//Write Enable
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[3*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, 0, 0),
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//Write status
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[4*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x2),
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},
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},
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.page_size = 256u,
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.sector_size = 4u * 1024u,
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.blocksize = 32u * 1024u,
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.is_uniform_blocksize = false,
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};
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#else
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# error Boot Flash type not chosen!
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@ -1256,7 +1256,7 @@ const uint8_t g_dcd_data[] =
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0x00,
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0x4c,
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0x50,
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0x21,
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0x07,
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0x0a,
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0x09,
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};
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