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xidatong support nuttx.bin

This commit is contained in:
wgzAIIT 2022-03-28 15:59:22 +08:00
parent 3acf2c227a
commit baae4c7204
3 changed files with 32 additions and 112 deletions
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4
Ubiquitous/Nuttx/aiit_board/xidatong/Kconfig
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@ -7,7 +7,7 @@ if ARCH_BOARD_XIDATONG
choice choice
prompt "Boot Flash" prompt "Boot Flash"
default XIDATONG_HYPER_FLASH default XIDATONG_QSPI_FLASH
config XIDATONG_HYPER_FLASH config XIDATONG_HYPER_FLASH
bool "HYPER Flash" bool "HYPER Flash"
@ -19,7 +19,7 @@ endchoice # Boot Flash
config XIDATONG_SDRAM config XIDATONG_SDRAM
bool "Enable SDRAM" bool "Enable SDRAM"
default n default y
select IMXRT_SEMC_INIT_DONE select IMXRT_SEMC_INIT_DONE
---help--- ---help---
Activate DCD configuration of SDRAM Activate DCD configuration of SDRAM

122
Ubiquitous/Nuttx/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.c
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@ -92,119 +92,39 @@ const struct flexspi_nor_config_s g_flash_config =
{ {
.tag = FLEXSPI_CFG_BLK_TAG, .tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION, .version = FLEXSPI_CFG_BLK_VERSION,
.read_sample_clksrc = FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD, .read_sample_clksrc = FLASH_READ_SAMPLE_CLK_LOOPBACK_INTERNELLY,
.cs_hold_time = 3u, .cs_hold_time = 3u,
.cs_setup_time = 3u, .cs_setup_time = 3u,
.column_address_width = 0u, .device_mode_cfg_enable = true,
.device_mode_type = 1,
.device_mode_seq.seq_num = 1,
.device_mode_seq.seq_id = 4,
.device_mode_arg = 0x000200,
.device_type = FLEXSPI_DEVICE_TYPE_SERIAL_NOR, .device_type = FLEXSPI_DEVICE_TYPE_SERIAL_NOR,
.sflash_pad_type = SERIAL_FLASH_4PADS, .sflash_pad_type = SERIAL_FLASH_4PADS,
.serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_60MHz, .serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_60MHz,
.sflash_a1size = 8u * 1024u * 1024u, .sflash_a1size = 16u * 1024u * 1024u,
.data_valid_time = .data_valid_time = {16u, 16u},
{
16u, 16u /* Enable DDR mode, Word addassable,
}, * Safe configuration, Differential clock
*/
.lookup_table = .lookup_table =
{ {
/* LUTs */ /* Read LUTs */
[0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
[1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
[2] = FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0),
/* 0 Fast read Quad IO DTR Mode Operation in SPI Mode (normal read) */ [1*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
//Write Enable
FLEXSPI_LUT_SEQ(CMD_SDR, [3*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, 0, 0),
FLEXSPI_1PAD, 0xed, RADDR_DDR, FLEXSPI_4PAD, 0x18), //Write status
FLEXSPI_LUT_SEQ(DUMMY_DDR, [4*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x2),
FLEXSPI_4PAD, 0x0c, READ_DDR, FLEXSPI_4PAD, 0x08),
FLEXSPI_LUT_SEQ(STOP,
FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP,
FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
/* 1 Read Status */
FLEXSPI_LUT_SEQ(CMD_SDR,
FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x1),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
/* 2 */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 3 */
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
/* 4 */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 5 Erase Sector */
FLEXSPI_LUT_SEQ(CMD_SDR,
FLEXSPI_1PAD, 0xd7, RADDR_SDR, FLEXSPI_1PAD, 0x18),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
/* 6 */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 7 */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 8 */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 9 Page Program */
FLEXSPI_LUT_SEQ(CMD_SDR,
FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x8, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
/* 10 */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 11 Chip Erase */
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xc7, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0),
}, },
}, },
.page_size = 256u, .page_size = 256u,
.sector_size = 4u * 1024u, .sector_size = 4u * 1024u,
.blocksize = 32u * 1024u,
.is_uniform_blocksize = false,
}; };
#else #else
# error Boot Flash type not chosen! # error Boot Flash type not chosen!

2
Ubiquitous/Nuttx/aiit_board/xidatong/src/imxrt_sdram_ini_dcd.c
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@ -1256,7 +1256,7 @@ const uint8_t g_dcd_data[] =
0x00, 0x00,
0x4c, 0x4c,
0x50, 0x50,
0x21, 0x07,
0x0a, 0x0a,
0x09, 0x09,
}; };