From 546edab7f04dc011d767c194c9a197e9ac00864a Mon Sep 17 00:00:00 2001 From: Liu_Weichao Date: Tue, 18 Jan 2022 14:11:55 +0800 Subject: [PATCH 1/3] feat support lcd driver for aiit-arm32-board --- .../XiUOS/board/aiit-arm32-board/board.c | 4 + .../third_party_driver/Kconfig | 1 - .../third_party_driver/common/Makefile | 2 +- .../{extmem => common}/hardware_fsmc.c | 23 +- .../third_party_driver/extmem/Makefile | 2 +- .../{connect_fsmc.c => connect_extmem.c} | 4 +- .../third_party_driver/include/connect_dac.h | 2 +- .../{connect_fsmc.h => connect_extmem.h} | 8 +- .../third_party_driver/include/connect_gpio.h | 52 + .../third_party_driver/include/connect_lcd.h | 164 +++ .../include/connect_touch.h | 52 - .../third_party_driver/include/font.h | 323 ++++++ .../include/hardware_fsmc.h | 59 +- .../third_party_driver/lcd/Kconfig | 12 +- .../third_party_driver/lcd/Makefile | 2 +- .../third_party_driver/lcd/connect_lcd.c | 656 +++++++++++ .../third_party_driver/lcd/hardware_fsmc.c | 1002 ----------------- .../XiUOS/kernel/kernel_test/test_lcd.c | 47 +- Ubiquitous/XiUOS/resources/include/dev_lcd.h | 48 +- 19 files changed, 1323 insertions(+), 1140 deletions(-) rename Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/{extmem => common}/hardware_fsmc.c (98%) rename Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/{connect_fsmc.c => connect_extmem.c} (99%) rename Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/{connect_fsmc.h => connect_extmem.h} (84%) create mode 100644 Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_lcd.h create mode 100644 Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/font.h create mode 100644 Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/connect_lcd.c delete mode 100644 Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/hardware_fsmc.c diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/board.c b/Ubiquitous/XiUOS/board/aiit-arm32-board/board.c index d7b03ef99..7a4460487 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/board.c +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/board.c @@ -50,6 +50,7 @@ extern int HwSdioInit(); extern int HwSramInit(void); extern int Stm32HwAdcInit(void); extern int Stm32HwDacInit(void); +extern int Stm32HwLcdInit(void); static void ClockConfiguration() { @@ -154,6 +155,9 @@ struct InitSequenceDesc _board_init[] = #endif #ifdef BSP_USING_DAC {"hw dac init", Stm32HwDacInit}, +#endif +#ifdef BSP_USING_LCD + {"hw lcd init", Stm32HwLcdInit}, #endif { " NONE ",NONE }, }; diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/Kconfig b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/Kconfig index cf0b85e9f..8dbc94076 100755 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/Kconfig +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/Kconfig @@ -40,7 +40,6 @@ menuconfig BSP_USING_LCD bool "Using LCD device" default n select RESOURCES_LCD -select BSP_USING_SPI1 if BSP_USING_LCD source "$BSP_DIR/third_party_driver/lcd/Kconfig" endif diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/common/Makefile b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/common/Makefile index 7b9e85d87..17073e912 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/common/Makefile +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/common/Makefile @@ -1,5 +1,5 @@ SRC_FILES := misc.c hardware_rcc.c hardware_exti.c \ - hardware_it.c hardware_pwr.c hardware_syscfg.c \ + hardware_it.c hardware_pwr.c hardware_syscfg.c hardware_fsmc.c\ ifeq ($(CONFIG_BSP_USING_DMA),y) diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/hardware_fsmc.c b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/common/hardware_fsmc.c similarity index 98% rename from Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/hardware_fsmc.c rename to Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/common/hardware_fsmc.c index 5c46e4d7d..b532efc21 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/hardware_fsmc.c +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/common/hardware_fsmc.c @@ -31,9 +31,28 @@ ****************************************************************************** */ +/** +* @file: hardware_fsmc.c +* @brief: support hardware fsmc for lcd、extmem functiong +* @version: 2.0 +* @author: AIIT XUOS Lab +* @date: 2022/1/12 +*/ + +/************************************************* +File name: hardware_fsmc.c +Description: support hardware fsmc for lcd、extmem function +Others: +History: +1. Date: 2022-1-12 +Author: AIIT XUOS Lab +Modification: +1. rename stm32f4xx_fsmc.c for XiUOS +*************************************************/ + /* Includes ------------------------------------------------------------------*/ -#include "hardware_fsmc.h" -#include "hardware_rcc.h" +#include +#include #include /** @addtogroup STM32F4xx_StdPeriph_Driver diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/Makefile b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/Makefile index 81594a1bf..cc3f729ff 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/Makefile +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/Makefile @@ -1,3 +1,3 @@ -SRC_FILES := hardware_fsmc.c connect_fsmc.c +SRC_FILES := connect_extmem.c include $(KERNEL_ROOT)/compiler.mk diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/connect_fsmc.c b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/connect_extmem.c similarity index 99% rename from Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/connect_fsmc.c rename to Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/connect_extmem.c index 74313937c..3703fcd60 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/connect_fsmc.c +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/extmem/connect_extmem.c @@ -11,14 +11,14 @@ */ /** -* @file connect_fsmc.c +* @file connect_extmem.c * @brief support extern memory by fsmc * @version 1.0 * @author AIIT XUOS Lab * @date 2021-05-28 */ -#include "connect_fsmc.h" +#include "connect_extmem.h" #include "hardware_fsmc.h" #include "hardware_gpio.h" #include "hardware_rcc.h" diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_dac.h b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_dac.h index e5fa169de..dfc801aec 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_dac.h +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_dac.h @@ -12,7 +12,7 @@ /** * @file connect_dac.h -* @brief define stm32f407-st-discovery adc function and struct +* @brief define aiit-arm32-board adc function and struct * @version 2.0 * @author AIIT XUOS Lab * @date 2022-1-10 diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_fsmc.h b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_extmem.h similarity index 84% rename from Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_fsmc.h rename to Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_extmem.h index 04c41c191..57c8c4357 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_fsmc.h +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_extmem.h @@ -11,15 +11,15 @@ */ /** -* @file connect_fsmc.h -* @brief declare stm32f407zgt6-board fsmc function +* @file connect_extmem.h +* @brief declare aiit-arm32-board extmem fsmc function * @version 1.0 * @author AIIT XUOS Lab * @date 2021-05-28 */ -#ifndef CONNECT_FSMC_H -#define CONNECT_FSMC_H +#ifndef CONNECT_EXTMEM_H +#define CONNECT_EXTMEM_H #include diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_gpio.h b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_gpio.h index 895b7da10..f6c4476b3 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_gpio.h +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_gpio.h @@ -27,6 +27,58 @@ extern "C" { #endif +#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2)) +#define MEM_ADDR(addr) (*((volatile unsigned long *)(addr))) +#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum)) + +#define GPIOA_ODR_Addr (GPIOA_BASE+20) //0x40020014 +#define GPIOB_ODR_Addr (GPIOB_BASE+20) //0x40020414 +#define GPIOC_ODR_Addr (GPIOC_BASE+20) //0x40020814 +#define GPIOD_ODR_Addr (GPIOD_BASE+20) //0x40020C14 +#define GPIOE_ODR_Addr (GPIOE_BASE+20) //0x40021014 +#define GPIOF_ODR_Addr (GPIOF_BASE+20) //0x40021414 +#define GPIOG_ODR_Addr (GPIOG_BASE+20) //0x40021814 +#define GPIOH_ODR_Addr (GPIOH_BASE+20) //0x40021C14 +#define GPIOI_ODR_Addr (GPIOI_BASE+20) //0x40022014 + +#define GPIOA_IDR_Addr (GPIOA_BASE+16) //0x40020010 +#define GPIOB_IDR_Addr (GPIOB_BASE+16) //0x40020410 +#define GPIOC_IDR_Addr (GPIOC_BASE+16) //0x40020810 +#define GPIOD_IDR_Addr (GPIOD_BASE+16) //0x40020C10 +#define GPIOE_IDR_Addr (GPIOE_BASE+16) //0x40021010 +#define GPIOF_IDR_Addr (GPIOF_BASE+16) //0x40021410 +#define GPIOG_IDR_Addr (GPIOG_BASE+16) //0x40021810 +#define GPIOH_IDR_Addr (GPIOH_BASE+16) //0x40021C10 +#define GPIOI_IDR_Addr (GPIOI_BASE+16) //0x40022010 + + +#define PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) //output +#define PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n) //input + +#define PBout(n) BIT_ADDR(GPIOB_ODR_Addr,n) //output +#define PBin(n) BIT_ADDR(GPIOB_IDR_Addr,n) //input + +#define PCout(n) BIT_ADDR(GPIOC_ODR_Addr,n) //output +#define PCin(n) BIT_ADDR(GPIOC_IDR_Addr,n) //input + +#define PDout(n) BIT_ADDR(GPIOD_ODR_Addr,n) //output +#define PDin(n) BIT_ADDR(GPIOD_IDR_Addr,n) //input + +#define PEout(n) BIT_ADDR(GPIOE_ODR_Addr,n) //output +#define PEin(n) BIT_ADDR(GPIOE_IDR_Addr,n) //input + +#define PFout(n) BIT_ADDR(GPIOF_ODR_Addr,n) //output +#define PFin(n) BIT_ADDR(GPIOF_IDR_Addr,n) //input + +#define PGout(n) BIT_ADDR(GPIOG_ODR_Addr,n) //output +#define PGin(n) BIT_ADDR(GPIOG_IDR_Addr,n) //input + +#define PHout(n) BIT_ADDR(GPIOH_ODR_Addr,n) //output +#define PHin(n) BIT_ADDR(GPIOH_IDR_Addr,n) //input + +#define PIout(n) BIT_ADDR(GPIOI_ODR_Addr,n) //output +#define PIin(n) BIT_ADDR(GPIOI_IDR_Addr,n) //input + int Stm32HwGpioInit(void); #ifdef __cplusplus diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_lcd.h b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_lcd.h new file mode 100644 index 000000000..def430b27 --- /dev/null +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_lcd.h @@ -0,0 +1,164 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file connect_lcd.h +* @brief declare aiit-arm32-board lcd fsmc function +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2022-1-12 +*/ + +#ifndef CONNECT_LCD_H +#define CONNECT_LCD_H + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define ILI9341 0x9341 + +#define NO_OPERATION 0x00 +#define SOFTWARE_RESET 0x01 +#define READ_ID 0x04 +#define READ_STATUS 0x09 +#define READ_POWER_MODE 0x0A +#define READ_MADCTL 0x0B +#define READ_PIXEL_FORMAT 0x0C +#define READ_IMAGE_FORMAT 0x0D +#define READ_SIGNAL_MODE 0x0E +#define READ_SELT_DIAG_RESULT 0x0F +#define SLEEP_ON 0x10 +#define SLEEP_OFF 0x11 +#define PARTIAL_DISPALY_ON 0x12 +#define NORMAL_DISPALY_ON 0x13 +#define INVERSION_DISPALY_OFF 0x20 +#define INVERSION_DISPALY_ON 0x21 +#define GAMMA_SET 0x26 +#define DISPALY_OFF 0x28 +#define DISPALY_ON 0x29 +#define HORIZONTAL_ADDRESS_SET 0x2A +#define VERTICAL_ADDRESS_SET 0x2B +#define MEMORY_WRITE 0x2C +#define COLOR_SET 0x2D +#define MEMORY_READ 0x2E +#define PARTIAL_AREA 0x30 +#define VERTICAL_SCROL_DEFINE 0x33 +#define TEAR_EFFECT_LINE_OFF 0x34 +#define TEAR_EFFECT_LINE_ON 0x35 +#define MEMORY_ACCESS_CTL 0x36 +#define VERTICAL_SCROL_S_ADD 0x37 +#define IDLE_MODE_OFF 0x38 +#define IDLE_MODE_ON 0x39 +#define PIXEL_FORMAT_SET 0x3A +#define WRITE_MEMORY_CONTINUE 0x3C +#define READ_MEMORY_CONTINUE 0x3E +#define SET_TEAR_SCANLINE 0x44 +#define GET_SCANLINE 0x45 +#define WRITE_BRIGHTNESS 0x51 +#define READ_BRIGHTNESS 0x52 +#define WRITE_CTRL_DISPALY 0x53 +#define READ_CTRL_DISPALY 0x54 +#define WRITE_BRIGHTNESS_CTL 0x55 +#define READ_BRIGHTNESS_CTL 0x56 +#define WRITE_MIN_BRIGHTNESS 0x5E +#define READ_MIN_BRIGHTNESS 0x5F +#define READ_ID1 0xDA +#define READ_ID2 0xDB +#define READ_ID3 0xDC +#define RGB_IF_SIGNAL_CTL 0xB0 +#define NORMAL_FRAME_CTL 0xB1 +#define IDLE_FRAME_CTL 0xB2 +#define PARTIAL_FRAME_CTL 0xB3 +#define INVERSION_CTL 0xB4 +#define BLANK_PORCH_CTL 0xB5 +#define DISPALY_FUNCTION_CTL 0xB6 +#define ENTRY_MODE_SET 0xB7 +#define BACKLIGHT_CTL1 0xB8 +#define BACKLIGHT_CTL2 0xB9 +#define BACKLIGHT_CTL3 0xBA +#define BACKLIGHT_CTL4 0xBB +#define BACKLIGHT_CTL5 0xBC +#define BACKLIGHT_CTL7 0xBE +#define BACKLIGHT_CTL8 0xBF +#define POWER_CTL1 0xC0 +#define POWER_CTL2 0xC1 +#define VCOM_CTL1 0xC5 +#define VCOM_CTL2 0xC7 +#define NV_MEMORY_WRITE 0xD0 +#define NV_MEMORY_PROTECT_KEY 0xD1 +#define NV_MEMORY_STATUS_READ 0xD2 +#define READ_ID4 0xD3 +#define POSITIVE_GAMMA_CORRECT 0xE0 +#define NEGATIVE_GAMMA_CORRECT 0xE1 +#define DIGITAL_GAMMA_CTL1 0xE2 +#define DIGITAL_GAMMA_CTL2 0xE3 +#define INTERFACE_CTL 0xF6 + +#define LCD_VERTICAL_SCEEN 0 +#define LCD_HORIZONTAL_SCEEN 1 + +//LCD Scan Direction +#define L2R_U2D 0 //from left to right , from up to down +#define L2R_D2U 1 +#define R2L_U2D 2 +#define R2L_D2U 3 + +#define U2D_L2R 4 +#define U2D_R2L 5 +#define D2U_L2R 6 +#define D2U_R2L 7 + +#define DFT_SCAN_DIR L2R_U2D //default scan direction + +#define FSMC_BANK1_NORSRAM4_START_ADDRESS 0x6C000000 +#define FSMC_BANK1_NORSRAM4_DATA_WIDTH 16 +#define STM32_FSMC_OFFSET 0x0000007E + +typedef struct +{ + volatile uint16_t LCD_REG_CMD;//0x6C00007E, ADDR_A6 = 0, RS =0, write CMD + volatile uint16_t LCD_RAM_DATA;//0x6C000080, ADDR_A6 =1, RS = 1, write DATA +} LCD_TypeDef; + +#ifndef AIIT_BOARD_LCD_BASE +#define AIIT_BOARD_LCD_BASE ((uint32_t)(FSMC_BANK1_NORSRAM4_START_ADDRESS | STM32_FSMC_OFFSET)) +#define AIIT_BOARD_LCD ((LCD_TypeDef *) AIIT_BOARD_LCD_BASE) +#endif + +typedef struct +{ + uint16_t width; + uint16_t height; + uint16_t lcd_id; + uint8_t lcd_direction; //0，Vertical screen；1，Horizontal screen + uint16_t write_ram_cmd; + uint16_t set_x_cmd; + uint16_t set_y_cmd; +} LCD_PARAM; + +struct Stm32HwLcd +{ + LCD_TypeDef *LCD; + LCD_PARAM lcd_param; +}; + +int Stm32HwLcdInit(void); + +#ifdef __cplusplus +} +#endif + +#endif \ No newline at end of file diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_touch.h b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_touch.h index 592c96413..d1e6a06c8 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_touch.h +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_touch.h @@ -19,58 +19,6 @@ #include #include -#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2)) -#define MEM_ADDR(addr) (*((volatile unsigned long *)(addr))) -#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum)) - -#define GPIOA_ODR_Addr (GPIOA_BASE+20) //0x40020014 -#define GPIOB_ODR_Addr (GPIOB_BASE+20) //0x40020414 -#define GPIOC_ODR_Addr (GPIOC_BASE+20) //0x40020814 -#define GPIOD_ODR_Addr (GPIOD_BASE+20) //0x40020C14 -#define GPIOE_ODR_Addr (GPIOE_BASE+20) //0x40021014 -#define GPIOF_ODR_Addr (GPIOF_BASE+20) //0x40021414 -#define GPIOG_ODR_Addr (GPIOG_BASE+20) //0x40021814 -#define GPIOH_ODR_Addr (GPIOH_BASE+20) //0x40021C14 -#define GPIOI_ODR_Addr (GPIOI_BASE+20) //0x40022014 - -#define GPIOA_IDR_Addr (GPIOA_BASE+16) //0x40020010 -#define GPIOB_IDR_Addr (GPIOB_BASE+16) //0x40020410 -#define GPIOC_IDR_Addr (GPIOC_BASE+16) //0x40020810 -#define GPIOD_IDR_Addr (GPIOD_BASE+16) //0x40020C10 -#define GPIOE_IDR_Addr (GPIOE_BASE+16) //0x40021010 -#define GPIOF_IDR_Addr (GPIOF_BASE+16) //0x40021410 -#define GPIOG_IDR_Addr (GPIOG_BASE+16) //0x40021810 -#define GPIOH_IDR_Addr (GPIOH_BASE+16) //0x40021C10 -#define GPIOI_IDR_Addr (GPIOI_BASE+16) //0x40022010 - - -#define PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) //output -#define PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n) //input - -#define PBout(n) BIT_ADDR(GPIOB_ODR_Addr,n) //output -#define PBin(n) BIT_ADDR(GPIOB_IDR_Addr,n) //input - -#define PCout(n) BIT_ADDR(GPIOC_ODR_Addr,n) //output -#define PCin(n) BIT_ADDR(GPIOC_IDR_Addr,n) //input - -#define PDout(n) BIT_ADDR(GPIOD_ODR_Addr,n) //output -#define PDin(n) BIT_ADDR(GPIOD_IDR_Addr,n) //input - -#define PEout(n) BIT_ADDR(GPIOE_ODR_Addr,n) //output -#define PEin(n) BIT_ADDR(GPIOE_IDR_Addr,n) //input - -#define PFout(n) BIT_ADDR(GPIOF_ODR_Addr,n) //output -#define PFin(n) BIT_ADDR(GPIOF_IDR_Addr,n) //input - -#define PGout(n) BIT_ADDR(GPIOG_ODR_Addr,n) //output -#define PGin(n) BIT_ADDR(GPIOG_IDR_Addr,n) //input - -#define PHout(n) BIT_ADDR(GPIOH_ODR_Addr,n) //output -#define PHin(n) BIT_ADDR(GPIOH_IDR_Addr,n) //input - -#define PIout(n) BIT_ADDR(GPIOI_ODR_Addr,n) //output -#define PIin(n) BIT_ADDR(GPIOI_IDR_Addr,n) //input - #define TP_PRES_DOWN 0x80 #define TP_CATH_PRES 0x40 diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/font.h b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/font.h new file mode 100644 index 000000000..c2fa2825a --- /dev/null +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/font.h @@ -0,0 +1,323 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file font.h +* @brief support font for lcd +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2022-1-13 +*/ + +#ifndef FONT_H +#define FONT_H +//ASCII char table +//offset 32 +//ASCII char: !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ +//3 ASCII char table（12*12、16*16和24*24）。 +//bytes of a single char:(size/8+((size%8)?1:0))*(size/2), size:code table size(12/16/24...) + +//12*12 ASCII code +const unsigned char asc2_1206[95][12]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x3F,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x30,0x00,0x40,0x00,0x30,0x00,0x40,0x00,0x00,0x00},/*""",2*/ +{0x09,0x00,0x0B,0xC0,0x3D,0x00,0x0B,0xC0,0x3D,0x00,0x09,0x00},/*"#",3*/ +{0x18,0xC0,0x24,0x40,0x7F,0xE0,0x22,0x40,0x31,0x80,0x00,0x00},/*"$",4*/ +{0x18,0x00,0x24,0xC0,0x1B,0x00,0x0D,0x80,0x32,0x40,0x01,0x80},/*"%",5*/ +{0x03,0x80,0x1C,0x40,0x27,0x40,0x1C,0x80,0x07,0x40,0x00,0x40},/*"&",6*/ +{0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x80,0x20,0x40,0x40,0x20},/*"(",8*/ +{0x00,0x00,0x40,0x20,0x20,0x40,0x1F,0x80,0x00,0x00,0x00,0x00},/*")",9*/ +{0x09,0x00,0x06,0x00,0x1F,0x80,0x06,0x00,0x09,0x00,0x00,0x00},/*"*",10*/ +{0x04,0x00,0x04,0x00,0x3F,0x80,0x04,0x00,0x04,0x00,0x00,0x00},/*"+",11*/ +{0x00,0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x00,0x00},/*"-",13*/ +{0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x20,0x01,0xC0,0x06,0x00,0x38,0x00,0x40,0x00,0x00,0x00},/*"/",15*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x10,0x40,0x3F,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x18,0xC0,0x21,0x40,0x22,0x40,0x24,0x40,0x18,0x40,0x00,0x00},/*"2",18*/ +{0x10,0x80,0x20,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"3",19*/ +{0x02,0x00,0x0D,0x00,0x11,0x00,0x3F,0xC0,0x01,0x40,0x00,0x00},/*"4",20*/ +{0x3C,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x23,0x80,0x00,0x00},/*"5",21*/ +{0x1F,0x80,0x24,0x40,0x24,0x40,0x34,0x40,0x03,0x80,0x00,0x00},/*"6",22*/ +{0x30,0x00,0x20,0x00,0x27,0xC0,0x38,0x00,0x20,0x00,0x00,0x00},/*"7",23*/ +{0x1B,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"8",24*/ +{0x1C,0x00,0x22,0xC0,0x22,0x40,0x22,0x40,0x1F,0x80,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x08,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x04,0x60,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x04,0x00,0x0A,0x00,0x11,0x00,0x20,0x80,0x40,0x40},/*"<",28*/ +{0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x40,0x40,0x20,0x80,0x11,0x00,0x0A,0x00,0x04,0x00},/*">",30*/ +{0x18,0x00,0x20,0x00,0x23,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"?",31*/ +{0x1F,0x80,0x20,0x40,0x27,0x40,0x29,0x40,0x1F,0x40,0x00,0x00},/*"@",32*/ +{0x00,0x40,0x07,0xC0,0x39,0x00,0x0F,0x00,0x01,0xC0,0x00,0x40},/*"A",33*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"B",34*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x30,0x80,0x00,0x00},/*"C",35*/ +{0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"D",36*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x40,0x30,0xC0,0x00,0x00},/*"E",37*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x00,0x30,0x00,0x00,0x00},/*"F",38*/ +{0x0F,0x00,0x10,0x80,0x20,0x40,0x22,0x40,0x33,0x80,0x02,0x00},/*"G",39*/ +{0x20,0x40,0x3F,0xC0,0x04,0x00,0x04,0x00,0x3F,0xC0,0x20,0x40},/*"H",40*/ +{0x20,0x40,0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x00,0x00},/*"I",41*/ +{0x00,0x60,0x20,0x20,0x20,0x20,0x3F,0xC0,0x20,0x00,0x20,0x00},/*"J",42*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x0B,0x00,0x30,0xC0,0x20,0x40},/*"K",43*/ +{0x20,0x40,0x3F,0xC0,0x20,0x40,0x00,0x40,0x00,0x40,0x00,0xC0},/*"L",44*/ +{0x3F,0xC0,0x3C,0x00,0x03,0xC0,0x3C,0x00,0x3F,0xC0,0x00,0x00},/*"M",45*/ +{0x20,0x40,0x3F,0xC0,0x0C,0x40,0x23,0x00,0x3F,0xC0,0x20,0x00},/*"N",46*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"O",47*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"P",48*/ +{0x1F,0x80,0x21,0x40,0x21,0x40,0x20,0xE0,0x1F,0xA0,0x00,0x00},/*"Q",49*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x26,0x00,0x19,0xC0,0x00,0x40},/*"R",50*/ +{0x18,0xC0,0x24,0x40,0x24,0x40,0x22,0x40,0x31,0x80,0x00,0x00},/*"S",51*/ +{0x30,0x00,0x20,0x40,0x3F,0xC0,0x20,0x40,0x30,0x00,0x00,0x00},/*"T",52*/ +{0x20,0x00,0x3F,0x80,0x00,0x40,0x00,0x40,0x3F,0x80,0x20,0x00},/*"U",53*/ +{0x20,0x00,0x3E,0x00,0x01,0xC0,0x07,0x00,0x38,0x00,0x20,0x00},/*"V",54*/ +{0x38,0x00,0x07,0xC0,0x3C,0x00,0x07,0xC0,0x38,0x00,0x00,0x00},/*"W",55*/ +{0x20,0x40,0x39,0xC0,0x06,0x00,0x39,0xC0,0x20,0x40,0x00,0x00},/*"X",56*/ +{0x20,0x00,0x38,0x40,0x07,0xC0,0x38,0x40,0x20,0x00,0x00,0x00},/*"Y",57*/ +{0x30,0x40,0x21,0xC0,0x26,0x40,0x38,0x40,0x20,0xC0,0x00,0x00},/*"Z",58*/ +{0x00,0x00,0x00,0x00,0x7F,0xE0,0x40,0x20,0x40,0x20,0x00,0x00},/*"[",59*/ +{0x00,0x00,0x70,0x00,0x0C,0x00,0x03,0x80,0x00,0x40,0x00,0x00},/*"\",60*/ +{0x00,0x00,0x40,0x20,0x40,0x20,0x7F,0xE0,0x00,0x00,0x00,0x00},/*"]",61*/ +{0x00,0x00,0x20,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00},/*"^",62*/ +{0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10},/*"_",63*/ +{0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ +{0x00,0x00,0x02,0x80,0x05,0x40,0x05,0x40,0x03,0xC0,0x00,0x40},/*"a",65*/ +{0x20,0x00,0x3F,0xC0,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"b",66*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x06,0x40,0x00,0x00},/*"c",67*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x24,0x40,0x3F,0xC0,0x00,0x40},/*"d",68*/ +{0x00,0x00,0x03,0x80,0x05,0x40,0x05,0x40,0x03,0x40,0x00,0x00},/*"e",69*/ +{0x00,0x00,0x04,0x40,0x1F,0xC0,0x24,0x40,0x24,0x40,0x20,0x00},/*"f",70*/ +{0x00,0x00,0x02,0xE0,0x05,0x50,0x05,0x50,0x06,0x50,0x04,0x20},/*"g",71*/ +{0x20,0x40,0x3F,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"h",72*/ +{0x00,0x00,0x04,0x40,0x27,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x10,0x00,0x10,0x04,0x10,0x27,0xE0,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x20,0x40,0x3F,0xC0,0x01,0x40,0x07,0x00,0x04,0xC0,0x04,0x40},/*"k",75*/ +{0x20,0x40,0x20,0x40,0x3F,0xC0,0x00,0x40,0x00,0x40,0x00,0x00},/*"l",76*/ +{0x07,0xC0,0x04,0x00,0x07,0xC0,0x04,0x00,0x03,0xC0,0x00,0x00},/*"m",77*/ +{0x04,0x40,0x07,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"n",78*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"o",79*/ +{0x04,0x10,0x07,0xF0,0x04,0x50,0x04,0x40,0x03,0x80,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x50,0x07,0xF0,0x00,0x10},/*"q",81*/ +{0x04,0x40,0x07,0xC0,0x02,0x40,0x04,0x00,0x04,0x00,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x06,0x40,0x05,0x40,0x05,0x40,0x04,0xC0,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x04,0x00,0x1F,0x80,0x04,0x40,0x00,0x40,0x00,0x00},/*"t",84*/ +{0x04,0x00,0x07,0x80,0x00,0x40,0x04,0x40,0x07,0xC0,0x00,0x40},/*"u",85*/ +{0x04,0x00,0x07,0x00,0x04,0xC0,0x01,0x80,0x06,0x00,0x04,0x00},/*"v",86*/ +{0x06,0x00,0x01,0xC0,0x07,0x00,0x01,0xC0,0x06,0x00,0x00,0x00},/*"w",87*/ +{0x04,0x40,0x06,0xC0,0x01,0x00,0x06,0xC0,0x04,0x40,0x00,0x00},/*"x",88*/ +{0x04,0x10,0x07,0x10,0x04,0xE0,0x01,0x80,0x06,0x00,0x04,0x00},/*"y",89*/ +{0x00,0x00,0x04,0x40,0x05,0xC0,0x06,0x40,0x04,0x40,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x04,0x00,0x7B,0xE0,0x40,0x20,0x00,0x00},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x40,0x20,0x7B,0xE0,0x04,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x40,0x00,0x80,0x00,0x40,0x00,0x20,0x00,0x20,0x00,0x40,0x00},/*"~",94*/ +}; +//16*16 ASCII code +const unsigned char asc2_1608[95][16]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xCC,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x00,0x00},/*""",2*/ +{0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x00,0x00},/*"#",3*/ +{0x00,0x00,0x0E,0x18,0x11,0x04,0x3F,0xFF,0x10,0x84,0x0C,0x78,0x00,0x00,0x00,0x00},/*"$",4*/ +{0x0F,0x00,0x10,0x84,0x0F,0x38,0x00,0xC0,0x07,0x78,0x18,0x84,0x00,0x78,0x00,0x00},/*"%",5*/ +{0x00,0x78,0x0F,0x84,0x10,0xC4,0x11,0x24,0x0E,0x98,0x00,0xE4,0x00,0x84,0x00,0x08},/*"&",6*/ +{0x08,0x00,0x68,0x00,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x18,0x18,0x20,0x04,0x40,0x02,0x00,0x00},/*"(",8*/ +{0x00,0x00,0x40,0x02,0x20,0x04,0x18,0x18,0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00},/*")",9*/ +{0x02,0x40,0x02,0x40,0x01,0x80,0x0F,0xF0,0x01,0x80,0x02,0x40,0x02,0x40,0x00,0x00},/*"*",10*/ +{0x00,0x80,0x00,0x80,0x00,0x80,0x0F,0xF8,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00},/*"+",11*/ +{0x00,0x01,0x00,0x0D,0x00,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80},/*"-",13*/ +{0x00,0x00,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x00,0x00,0x06,0x00,0x18,0x00,0x60,0x01,0x80,0x06,0x00,0x18,0x00,0x20,0x00},/*"/",15*/ +{0x00,0x00,0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x08,0x04,0x08,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x00,0x00,0x0E,0x0C,0x10,0x14,0x10,0x24,0x10,0x44,0x11,0x84,0x0E,0x0C,0x00,0x00},/*"2",18*/ +{0x00,0x00,0x0C,0x18,0x10,0x04,0x11,0x04,0x11,0x04,0x12,0x88,0x0C,0x70,0x00,0x00},/*"3",19*/ +{0x00,0x00,0x00,0xE0,0x03,0x20,0x04,0x24,0x08,0x24,0x1F,0xFC,0x00,0x24,0x00,0x00},/*"4",20*/ +{0x00,0x00,0x1F,0x98,0x10,0x84,0x11,0x04,0x11,0x04,0x10,0x88,0x10,0x70,0x00,0x00},/*"5",21*/ +{0x00,0x00,0x07,0xF0,0x08,0x88,0x11,0x04,0x11,0x04,0x18,0x88,0x00,0x70,0x00,0x00},/*"6",22*/ +{0x00,0x00,0x1C,0x00,0x10,0x00,0x10,0xFC,0x13,0x00,0x1C,0x00,0x10,0x00,0x00,0x00},/*"7",23*/ +{0x00,0x00,0x0E,0x38,0x11,0x44,0x10,0x84,0x10,0x84,0x11,0x44,0x0E,0x38,0x00,0x00},/*"8",24*/ +{0x00,0x00,0x07,0x00,0x08,0x8C,0x10,0x44,0x10,0x44,0x08,0x88,0x07,0xF0,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x0C,0x03,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x00,0x80,0x01,0x40,0x02,0x20,0x04,0x10,0x08,0x08,0x10,0x04,0x00,0x00},/*"<",28*/ +{0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x10,0x04,0x08,0x08,0x04,0x10,0x02,0x20,0x01,0x40,0x00,0x80,0x00,0x00},/*">",30*/ +{0x00,0x00,0x0E,0x00,0x12,0x00,0x10,0x0C,0x10,0x6C,0x10,0x80,0x0F,0x00,0x00,0x00},/*"?",31*/ +{0x03,0xE0,0x0C,0x18,0x13,0xE4,0x14,0x24,0x17,0xC4,0x08,0x28,0x07,0xD0,0x00,0x00},/*"@",32*/ +{0x00,0x04,0x00,0x3C,0x03,0xC4,0x1C,0x40,0x07,0x40,0x00,0xE4,0x00,0x1C,0x00,0x04},/*"A",33*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x11,0x04,0x0E,0x88,0x00,0x70,0x00,0x00},/*"B",34*/ +{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x04,0x10,0x08,0x1C,0x10,0x00,0x00},/*"C",35*/ +{0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"D",36*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x17,0xC4,0x10,0x04,0x08,0x18,0x00,0x00},/*"E",37*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x17,0xC0,0x10,0x00,0x08,0x00,0x00,0x00},/*"F",38*/ +{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x44,0x1C,0x78,0x00,0x40,0x00,0x00},/*"G",39*/ +{0x10,0x04,0x1F,0xFC,0x10,0x84,0x00,0x80,0x00,0x80,0x10,0x84,0x1F,0xFC,0x10,0x04},/*"H",40*/ +{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x00,0x00,0x00,0x00},/*"I",41*/ +{0x00,0x03,0x00,0x01,0x10,0x01,0x10,0x01,0x1F,0xFE,0x10,0x00,0x10,0x00,0x00,0x00},/*"J",42*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x03,0x80,0x14,0x64,0x18,0x1C,0x10,0x04,0x00,0x00},/*"K",43*/ +{0x10,0x04,0x1F,0xFC,0x10,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x0C,0x00,0x00},/*"L",44*/ +{0x10,0x04,0x1F,0xFC,0x1F,0x00,0x00,0xFC,0x1F,0x00,0x1F,0xFC,0x10,0x04,0x00,0x00},/*"M",45*/ +{0x10,0x04,0x1F,0xFC,0x0C,0x04,0x03,0x00,0x00,0xE0,0x10,0x18,0x1F,0xFC,0x10,0x00},/*"N",46*/ +{0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"O",47*/ +{0x10,0x04,0x1F,0xFC,0x10,0x84,0x10,0x80,0x10,0x80,0x10,0x80,0x0F,0x00,0x00,0x00},/*"P",48*/ +{0x07,0xF0,0x08,0x18,0x10,0x24,0x10,0x24,0x10,0x1C,0x08,0x0A,0x07,0xF2,0x00,0x00},/*"Q",49*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x11,0xC0,0x11,0x30,0x0E,0x0C,0x00,0x04},/*"R",50*/ +{0x00,0x00,0x0E,0x1C,0x11,0x04,0x10,0x84,0x10,0x84,0x10,0x44,0x1C,0x38,0x00,0x00},/*"S",51*/ +{0x18,0x00,0x10,0x00,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x00,0x18,0x00,0x00,0x00},/*"T",52*/ +{0x10,0x00,0x1F,0xF8,0x10,0x04,0x00,0x04,0x00,0x04,0x10,0x04,0x1F,0xF8,0x10,0x00},/*"U",53*/ +{0x10,0x00,0x1E,0x00,0x11,0xE0,0x00,0x1C,0x00,0x70,0x13,0x80,0x1C,0x00,0x10,0x00},/*"V",54*/ +{0x1F,0xC0,0x10,0x3C,0x00,0xE0,0x1F,0x00,0x00,0xE0,0x10,0x3C,0x1F,0xC0,0x00,0x00},/*"W",55*/ +{0x10,0x04,0x18,0x0C,0x16,0x34,0x01,0xC0,0x01,0xC0,0x16,0x34,0x18,0x0C,0x10,0x04},/*"X",56*/ +{0x10,0x00,0x1C,0x00,0x13,0x04,0x00,0xFC,0x13,0x04,0x1C,0x00,0x10,0x00,0x00,0x00},/*"Y",57*/ +{0x08,0x04,0x10,0x1C,0x10,0x64,0x10,0x84,0x13,0x04,0x1C,0x04,0x10,0x18,0x00,0x00},/*"Z",58*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFE,0x40,0x02,0x40,0x02,0x40,0x02,0x00,0x00},/*"[",59*/ +{0x00,0x00,0x30,0x00,0x0C,0x00,0x03,0x80,0x00,0x60,0x00,0x1C,0x00,0x03,0x00,0x00},/*"\",60*/ +{0x00,0x00,0x40,0x02,0x40,0x02,0x40,0x02,0x7F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00},/*"]",61*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00},/*"^",62*/ +{0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01},/*"_",63*/ +{0x00,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ +{0x00,0x00,0x00,0x98,0x01,0x24,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xFC,0x00,0x04},/*"a",65*/ +{0x10,0x00,0x1F,0xFC,0x00,0x88,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"b",66*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x00},/*"c",67*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x11,0x08,0x1F,0xFC,0x00,0x04},/*"d",68*/ +{0x00,0x00,0x00,0xF8,0x01,0x44,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xC8,0x00,0x00},/*"e",69*/ +{0x00,0x00,0x01,0x04,0x01,0x04,0x0F,0xFC,0x11,0x04,0x11,0x04,0x11,0x00,0x18,0x00},/*"f",70*/ +{0x00,0x00,0x00,0xD6,0x01,0x29,0x01,0x29,0x01,0x29,0x01,0xC9,0x01,0x06,0x00,0x00},/*"g",71*/ +{0x10,0x04,0x1F,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"h",72*/ +{0x00,0x00,0x01,0x04,0x19,0x04,0x19,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x00,0x00,0x03,0x00,0x01,0x01,0x01,0x19,0x01,0x19,0xFE,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x10,0x04,0x1F,0xFC,0x00,0x24,0x00,0x40,0x01,0xB4,0x01,0x0C,0x01,0x04,0x00,0x00},/*"k",75*/ +{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"l",76*/ +{0x01,0x04,0x01,0xFC,0x01,0x04,0x01,0x00,0x01,0xFC,0x01,0x04,0x01,0x00,0x00,0xFC},/*"m",77*/ +{0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"n",78*/ +{0x00,0x00,0x00,0xF8,0x01,0x04,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0xF8,0x00,0x00},/*"o",79*/ +{0x01,0x01,0x01,0xFF,0x00,0x85,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x05,0x01,0xFF,0x00,0x01},/*"q",81*/ +{0x01,0x04,0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x04,0x01,0x00,0x01,0x80,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x00,0xCC,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x98,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x01,0x00,0x01,0x00,0x07,0xF8,0x01,0x04,0x01,0x04,0x00,0x00,0x00,0x00},/*"t",84*/ +{0x01,0x00,0x01,0xF8,0x00,0x04,0x00,0x04,0x00,0x04,0x01,0x08,0x01,0xFC,0x00,0x04},/*"u",85*/ +{0x01,0x00,0x01,0x80,0x01,0x70,0x00,0x0C,0x00,0x10,0x01,0x60,0x01,0x80,0x01,0x00},/*"v",86*/ +{0x01,0xF0,0x01,0x0C,0x00,0x30,0x01,0xC0,0x00,0x30,0x01,0x0C,0x01,0xF0,0x01,0x00},/*"w",87*/ +{0x00,0x00,0x01,0x04,0x01,0x8C,0x00,0x74,0x01,0x70,0x01,0x8C,0x01,0x04,0x00,0x00},/*"x",88*/ +{0x01,0x01,0x01,0x81,0x01,0x71,0x00,0x0E,0x00,0x18,0x01,0x60,0x01,0x80,0x01,0x00},/*"y",89*/ +{0x00,0x00,0x01,0x84,0x01,0x0C,0x01,0x34,0x01,0x44,0x01,0x84,0x01,0x0C,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x3E,0xFC,0x40,0x02,0x40,0x02},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x40,0x02,0x40,0x02,0x3E,0xFC,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x00,0x00,0x60,0x00,0x80,0x00,0x80,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x20,0x00},/*"~",94*/ +}; +//24*24 ASICII code +const unsigned char asc2_2412[95][36]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x80,0x38,0x0F,0xFE,0x38,0x0F,0x80,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x06,0x00,0x00,0x0C,0x00,0x00,0x38,0x00,0x00,0x31,0x00,0x00,0x06,0x00,0x00,0x0C,0x00,0x00,0x38,0x00,0x00,0x30,0x00,0x00,0x00,0x00,0x00},/*""",2*/ +{0x00,0x00,0x00,0x00,0x61,0x80,0x00,0x67,0xF8,0x07,0xF9,0x80,0x00,0x61,0x80,0x00,0x61,0x80,0x00,0x61,0x80,0x00,0x61,0x80,0x00,0x67,0xF8,0x07,0xF9,0x80,0x00,0x61,0x80,0x00,0x00,0x00},/*"#",3*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,0xE0,0x03,0xE0,0xF0,0x06,0x30,0x08,0x04,0x18,0x08,0x1F,0xFF,0xFE,0x04,0x0E,0x08,0x07,0x87,0xF0,0x03,0x81,0xE0,0x00,0x00,0x00,0x00,0x00,0x00},/*"$",4*/ +{0x01,0xF0,0x00,0x06,0x0C,0x00,0x04,0x04,0x08,0x06,0x0C,0x70,0x01,0xF9,0xC0,0x00,0x0E,0x00,0x00,0x3B,0xE0,0x00,0xEC,0x18,0x07,0x08,0x08,0x04,0x0C,0x18,0x00,0x03,0xE0,0x00,0x00,0x00},/*"%",5*/ +{0x00,0x01,0xE0,0x00,0x07,0xF0,0x03,0xF8,0x18,0x04,0x1C,0x08,0x04,0x17,0x08,0x07,0xE1,0xD0,0x03,0xC0,0xE0,0x00,0x23,0xB0,0x00,0x3C,0x08,0x00,0x20,0x08,0x00,0x00,0x10,0x00,0x00,0x00},/*"&",6*/ +{0x00,0x00,0x00,0x01,0x00,0x00,0x31,0x00,0x00,0x32,0x00,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x00,0x01,0xFF,0xC0,0x07,0x80,0xF0,0x0C,0x00,0x18,0x10,0x00,0x04,0x20,0x00,0x02,0x00,0x00,0x00},/*"(",8*/ +{0x00,0x00,0x00,0x20,0x00,0x02,0x10,0x00,0x04,0x0C,0x00,0x18,0x07,0x80,0xF0,0x01,0xFF,0xC0,0x00,0x7F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*")",9*/ +{0x00,0x00,0x00,0x00,0x42,0x00,0x00,0x66,0x00,0x00,0x66,0x00,0x00,0x3C,0x00,0x00,0x18,0x00,0x03,0xFF,0xC0,0x00,0x18,0x00,0x00,0x3C,0x00,0x00,0x66,0x00,0x00,0x66,0x00,0x00,0x42,0x00},/*"*",10*/ +{0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x01,0xFF,0xC0,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00},/*"+",11*/ +{0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x31,0x00,0x00,0x32,0x00,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x00,0x00},/*"-",13*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x00,0x00,0x38,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x00,0x1C,0x00,0x00,0x70,0x00,0x01,0x80,0x00,0x0E,0x00,0x00,0x38,0x00,0x00,0xC0,0x00,0x07,0x00,0x00,0x1C,0x00,0x00,0x30,0x00,0x00,0x00,0x00,0x00},/*"/",15*/ +{0x00,0x00,0x00,0x00,0x7F,0x80,0x01,0xFF,0xE0,0x03,0x80,0x70,0x06,0x00,0x18,0x04,0x00,0x08,0x04,0x00,0x08,0x06,0x00,0x18,0x03,0x80,0x70,0x01,0xFF,0xE0,0x00,0x7F,0x80,0x00,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x08,0x01,0x00,0x08,0x01,0x00,0x08,0x03,0xFF,0xF8,0x07,0xFF,0xF8,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x00,0x00,0x00,0x01,0xC0,0x38,0x02,0xC0,0x58,0x04,0x00,0x98,0x04,0x01,0x18,0x04,0x02,0x18,0x04,0x04,0x18,0x06,0x1C,0x18,0x03,0xF8,0x18,0x01,0xE0,0xF8,0x00,0x00,0x00,0x00,0x00,0x00},/*"2",18*/ +{0x00,0x00,0x00,0x01,0xC0,0xE0,0x03,0xC0,0xF0,0x04,0x00,0x08,0x04,0x08,0x08,0x04,0x08,0x08,0x06,0x18,0x08,0x03,0xF4,0x18,0x01,0xE7,0xF0,0x00,0x01,0xE0,0x00,0x00,0x00,0x00,0x00,0x00},/*"3",19*/ +{0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x0D,0x00,0x00,0x11,0x00,0x00,0x61,0x00,0x00,0x81,0x08,0x03,0x01,0x08,0x07,0xFF,0xF8,0x0F,0xFF,0xF8,0x00,0x01,0x08,0x00,0x01,0x08,0x00,0x00,0x00},/*"4",20*/ +{0x00,0x00,0x00,0x00,0x00,0xE0,0x07,0xFC,0xD0,0x06,0x08,0x08,0x06,0x10,0x08,0x06,0x10,0x08,0x06,0x10,0x08,0x06,0x18,0x38,0x06,0x0F,0xF0,0x06,0x07,0xC0,0x00,0x00,0x00,0x00,0x00,0x00},/*"5",21*/ +{0x00,0x00,0x00,0x00,0x3F,0x80,0x01,0xFF,0xE0,0x03,0x84,0x30,0x02,0x08,0x18,0x04,0x10,0x08,0x04,0x10,0x08,0x04,0x10,0x08,0x07,0x18,0x10,0x03,0x0F,0xF0,0x00,0x07,0xC0,0x00,0x00,0x00},/*"6",22*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xC0,0x00,0x07,0x00,0x00,0x06,0x00,0x00,0x06,0x00,0xF8,0x06,0x07,0xF8,0x06,0x18,0x00,0x06,0xE0,0x00,0x07,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00},/*"7",23*/ +{0x00,0x00,0x00,0x01,0xE1,0xE0,0x03,0xF7,0xF0,0x06,0x34,0x10,0x04,0x18,0x08,0x04,0x18,0x08,0x04,0x0C,0x08,0x04,0x0C,0x08,0x06,0x16,0x18,0x03,0xF3,0xF0,0x01,0xC1,0xE0,0x00,0x00,0x00},/*"8",24*/ +{0x00,0x00,0x00,0x00,0xF8,0x00,0x03,0xFC,0x30,0x03,0x06,0x38,0x04,0x02,0x08,0x04,0x02,0x08,0x04,0x02,0x08,0x04,0x04,0x10,0x03,0x08,0xF0,0x01,0xFF,0xC0,0x00,0x7F,0x00,0x00,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x38,0x00,0x70,0x38,0x00,0x70,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x1A,0x00,0x30,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x14,0x00,0x00,0x22,0x00,0x00,0x41,0x00,0x00,0x80,0x80,0x01,0x00,0x40,0x02,0x00,0x20,0x04,0x00,0x10,0x08,0x00,0x08,0x00,0x00,0x00},/*"<",28*/ +{0x00,0x00,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x08,0x04,0x00,0x10,0x02,0x00,0x20,0x01,0x00,0x40,0x00,0x80,0x80,0x00,0x41,0x00,0x00,0x22,0x00,0x00,0x14,0x00,0x00,0x08,0x00,0x00,0x00,0x00},/*">",30*/ +{0x00,0x00,0x00,0x03,0xC0,0x00,0x04,0xC0,0x00,0x04,0x00,0x00,0x08,0x00,0x38,0x08,0x0F,0x38,0x08,0x08,0x38,0x08,0x10,0x00,0x0C,0x30,0x00,0x07,0xE0,0x00,0x03,0xC0,0x00,0x00,0x00,0x00},/*"?",31*/ +{0x00,0x00,0x00,0x00,0x3F,0x80,0x00,0xFF,0xE0,0x03,0x80,0x70,0x02,0x0F,0x10,0x06,0x70,0x88,0x04,0xC0,0x88,0x04,0x83,0x08,0x04,0x7F,0x88,0x02,0xC0,0x90,0x03,0x01,0x20,0x00,0xFE,0x40},/*"@",32*/ +{0x00,0x00,0x08,0x00,0x00,0x18,0x00,0x01,0xF8,0x00,0x3E,0x08,0x01,0xC2,0x00,0x07,0x02,0x00,0x07,0xE2,0x00,0x00,0xFE,0x00,0x00,0x1F,0xC8,0x00,0x01,0xF8,0x00,0x00,0x38,0x00,0x00,0x08},/*"A",33*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x08,0x08,0x04,0x08,0x08,0x04,0x08,0x08,0x04,0x08,0x08,0x06,0x18,0x08,0x03,0xF4,0x18,0x01,0xE7,0xF0,0x00,0x01,0xE0,0x00,0x00,0x00},/*"B",34*/ +{0x00,0x00,0x00,0x00,0x3F,0x80,0x01,0xFF,0xE0,0x03,0x80,0x70,0x02,0x00,0x18,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x10,0x06,0x00,0x20,0x07,0x80,0xC0,0x00,0x00,0x00},/*"C",35*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x18,0x02,0x00,0x10,0x03,0x80,0x70,0x01,0xFF,0xE0,0x00,0x7F,0x80,0x00,0x00,0x00},/*"D",36*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x08,0x08,0x04,0x08,0x08,0x04,0x08,0x08,0x04,0x08,0x08,0x04,0x3E,0x08,0x04,0x00,0x08,0x06,0x00,0x18,0x01,0x00,0x60,0x00,0x00,0x00},/*"E",37*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x08,0x08,0x04,0x08,0x00,0x04,0x08,0x00,0x04,0x08,0x00,0x04,0x3E,0x00,0x06,0x00,0x00,0x06,0x00,0x00,0x01,0x80,0x00,0x00,0x00,0x00},/*"F",38*/ +{0x00,0x00,0x00,0x00,0x3F,0x80,0x01,0xFF,0xE0,0x03,0x80,0x70,0x06,0x00,0x18,0x04,0x00,0x08,0x04,0x02,0x08,0x04,0x02,0x08,0x02,0x03,0xF0,0x07,0x83,0xF0,0x00,0x02,0x00,0x00,0x02,0x00},/*"G",39*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x08,0x08,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x04,0x08,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08},/*"H",40*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00},/*"I",41*/ +{0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x00,0x07,0x00,0x00,0x01,0x04,0x00,0x01,0x04,0x00,0x01,0x04,0x00,0x03,0x07,0xFF,0xFE,0x07,0xFF,0xFC,0x04,0x00,0x00,0x04,0x00,0x00,0x04,0x00,0x00},/*"J",42*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x0C,0x08,0x00,0x18,0x00,0x00,0x3E,0x00,0x04,0xC7,0x80,0x05,0x03,0xC8,0x06,0x00,0xF8,0x04,0x00,0x38,0x04,0x00,0x18,0x00,0x00,0x08},/*"K",43*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x18,0x00,0x00,0x60,0x00,0x00,0x00},/*"L",44*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0x80,0x08,0x07,0xFC,0x00,0x00,0x7F,0xC0,0x00,0x03,0xF8,0x00,0x07,0xC0,0x00,0x78,0x00,0x07,0x80,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08},/*"M",45*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0x00,0x08,0x03,0xC0,0x00,0x00,0xE0,0x00,0x00,0x38,0x00,0x00,0x1E,0x00,0x00,0x07,0x00,0x00,0x01,0xC0,0x04,0x00,0xF0,0x07,0xFF,0xF8,0x04,0x00,0x00},/*"N",46*/ +{0x00,0x00,0x00,0x00,0x7F,0x80,0x01,0xFF,0xE0,0x03,0x80,0x70,0x06,0x00,0x18,0x04,0x00,0x08,0x04,0x00,0x08,0x06,0x00,0x18,0x03,0x00,0x30,0x01,0xFF,0xE0,0x00,0x7F,0x80,0x00,0x00,0x00},/*"O",47*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x04,0x08,0x04,0x04,0x00,0x04,0x04,0x00,0x04,0x04,0x00,0x04,0x04,0x00,0x06,0x0C,0x00,0x03,0xF8,0x00,0x01,0xF0,0x00,0x00,0x00,0x00},/*"P",48*/ +{0x00,0x00,0x00,0x00,0x7F,0x80,0x01,0xFF,0xE0,0x03,0x80,0x70,0x06,0x00,0x88,0x04,0x00,0x88,0x04,0x00,0xC8,0x06,0x00,0x3C,0x03,0x00,0x3E,0x01,0xFF,0xE6,0x00,0x7F,0x84,0x00,0x00,0x00},/*"Q",49*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x08,0x08,0x04,0x08,0x00,0x04,0x0C,0x00,0x04,0x0F,0x00,0x04,0x0B,0xC0,0x06,0x10,0xF0,0x03,0xF0,0x38,0x01,0xE0,0x08,0x00,0x00,0x08},/*"R",50*/ +{0x00,0x00,0x00,0x01,0xE0,0xF8,0x03,0xF0,0x30,0x06,0x30,0x10,0x04,0x18,0x08,0x04,0x18,0x08,0x04,0x0C,0x08,0x04,0x0C,0x08,0x02,0x06,0x18,0x02,0x07,0xF0,0x07,0x81,0xE0,0x00,0x00,0x00},/*"S",51*/ +{0x01,0x80,0x00,0x06,0x00,0x00,0x04,0x00,0x00,0x04,0x00,0x00,0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08,0x04,0x00,0x00,0x04,0x00,0x00,0x06,0x00,0x00,0x01,0x80,0x00},/*"T",52*/ +{0x04,0x00,0x00,0x07,0xFF,0xE0,0x07,0xFF,0xF0,0x04,0x00,0x18,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x04,0x00,0x10,0x07,0xFF,0xE0,0x04,0x00,0x00},/*"U",53*/ +{0x04,0x00,0x00,0x06,0x00,0x00,0x07,0xE0,0x00,0x07,0xFE,0x00,0x04,0x1F,0xE0,0x00,0x01,0xF8,0x00,0x00,0x38,0x00,0x01,0xE0,0x04,0x3E,0x00,0x07,0xC0,0x00,0x06,0x00,0x00,0x04,0x00,0x00},/*"V",54*/ +{0x04,0x00,0x00,0x07,0xE0,0x00,0x07,0xFF,0xC0,0x04,0x1F,0xF8,0x00,0x07,0xC0,0x07,0xF8,0x00,0x07,0xFF,0x80,0x04,0x3F,0xF8,0x00,0x07,0xC0,0x04,0xF8,0x00,0x07,0x00,0x00,0x04,0x00,0x00},/*"W",55*/ +{0x00,0x00,0x00,0x04,0x00,0x08,0x06,0x00,0x18,0x07,0xC0,0x78,0x05,0xF1,0xC8,0x00,0x3E,0x00,0x00,0x1F,0x80,0x04,0x63,0xE8,0x07,0x80,0xF8,0x06,0x00,0x18,0x04,0x00,0x08,0x00,0x00,0x00},/*"X",56*/ +{0x04,0x00,0x00,0x06,0x00,0x00,0x07,0x80,0x00,0x07,0xE0,0x08,0x04,0x7C,0x08,0x00,0x1F,0xF8,0x00,0x07,0xF8,0x00,0x18,0x08,0x04,0xE0,0x08,0x07,0x00,0x00,0x06,0x00,0x00,0x04,0x00,0x00},/*"Y",57*/ +{0x00,0x00,0x00,0x01,0x00,0x08,0x06,0x00,0x38,0x04,0x00,0xF8,0x04,0x03,0xE8,0x04,0x0F,0x08,0x04,0x7C,0x08,0x05,0xF0,0x08,0x07,0xC0,0x08,0x07,0x00,0x18,0x04,0x00,0x60,0x00,0x00,0x00},/*"Z",58*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0xFE,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x00,0x00,0x00},/*"[",59*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x07,0x00,0x00,0x00,0xC0,0x00,0x00,0x38,0x00,0x00,0x06,0x00,0x00,0x01,0xC0,0x00,0x00,0x30,0x00,0x00,0x0E,0x00,0x00,0x01,0x00,0x00,0x00},/*"\",60*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x3F,0xFF,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"]",61*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x10,0x00,0x00,0x30,0x00,0x00,0x20,0x00,0x00,0x30,0x00,0x00,0x10,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"^",62*/ +{0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01},/*"_",63*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x20,0x00,0x00,0x10,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ +{0x00,0x00,0x00,0x00,0x00,0xF0,0x00,0x19,0xF8,0x00,0x1B,0x18,0x00,0x22,0x08,0x00,0x26,0x08,0x00,0x24,0x08,0x00,0x24,0x10,0x00,0x3F,0xF8,0x00,0x1F,0xF8,0x00,0x00,0x08,0x00,0x00,0x18},/*"a",65*/ +{0x00,0x00,0x00,0x04,0x00,0x00,0x07,0xFF,0xF8,0x0F,0xFF,0xF0,0x00,0x18,0x18,0x00,0x10,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x30,0x18,0x00,0x1F,0xF0,0x00,0x0F,0xC0,0x00,0x00,0x00},/*"b",66*/ +{0x00,0x00,0x00,0x00,0x07,0xC0,0x00,0x1F,0xF0,0x00,0x18,0x30,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x3C,0x08,0x00,0x1C,0x10,0x00,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00},/*"c",67*/ +{0x00,0x00,0x00,0x00,0x07,0xC0,0x00,0x1F,0xF0,0x00,0x38,0x18,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x04,0x10,0x10,0x07,0xFF,0xF8,0x0F,0xFF,0xF0,0x00,0x00,0x10,0x00,0x00,0x00},/*"d",68*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xC0,0x00,0x1F,0xF0,0x00,0x12,0x30,0x00,0x22,0x18,0x00,0x22,0x08,0x00,0x22,0x08,0x00,0x32,0x08,0x00,0x1E,0x10,0x00,0x0E,0x20,0x00,0x00,0x00},/*"e",69*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x20,0x08,0x00,0x20,0x08,0x01,0xFF,0xF8,0x03,0xFF,0xF8,0x06,0x20,0x08,0x04,0x20,0x08,0x04,0x20,0x08,0x07,0x20,0x00,0x03,0x00,0x00,0x00,0x00,0x00},/*"f",70*/ +{0x00,0x00,0x00,0x00,0x00,0x0E,0x00,0x0E,0x6E,0x00,0x1F,0xF3,0x00,0x31,0xB1,0x00,0x20,0xB1,0x00,0x20,0xB1,0x00,0x31,0x91,0x00,0x1F,0x13,0x00,0x2E,0x1E,0x00,0x20,0x0E,0x00,0x30,0x00},/*"g",71*/ +{0x00,0x00,0x00,0x04,0x00,0x08,0x07,0xFF,0xF8,0x0F,0xFF,0xF8,0x00,0x10,0x08,0x00,0x20,0x00,0x00,0x20,0x00,0x00,0x20,0x08,0x00,0x3F,0xF8,0x00,0x1F,0xF8,0x00,0x00,0x08,0x00,0x00,0x00},/*"h",72*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x06,0x3F,0xF8,0x06,0x3F,0xF8,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x03,0x00,0x20,0x01,0x00,0x20,0x01,0x00,0x20,0x03,0x06,0x3F,0xFE,0x06,0x3F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x00,0x00,0x00,0x04,0x00,0x08,0x07,0xFF,0xF8,0x0F,0xFF,0xF8,0x00,0x01,0x88,0x00,0x03,0x00,0x00,0x2F,0xC0,0x00,0x38,0xF8,0x00,0x20,0x38,0x00,0x20,0x08,0x00,0x00,0x08,0x00,0x00,0x00},/*"k",75*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x08,0x07,0xFF,0xF8,0x0F,0xFF,0xF8,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00},/*"l",76*/ +{0x00,0x20,0x08,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x10,0x08,0x00,0x20,0x00,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x10,0x08,0x00,0x20,0x00,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x00,0x08},/*"m",77*/ +{0x00,0x00,0x00,0x00,0x20,0x08,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x10,0x08,0x00,0x10,0x00,0x00,0x20,0x00,0x00,0x20,0x08,0x00,0x3F,0xF8,0x00,0x1F,0xF8,0x00,0x00,0x08,0x00,0x00,0x00},/*"n",78*/ +{0x00,0x00,0x00,0x00,0x07,0xC0,0x00,0x0F,0xF0,0x00,0x18,0x30,0x00,0x30,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x30,0x08,0x00,0x18,0x30,0x00,0x0F,0xF0,0x00,0x07,0xC0,0x00,0x00,0x00},/*"o",79*/ +{0x00,0x00,0x00,0x00,0x20,0x01,0x00,0x3F,0xFF,0x00,0x3F,0xFF,0x00,0x10,0x11,0x00,0x20,0x09,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x30,0x38,0x00,0x1F,0xF0,0x00,0x0F,0xC0,0x00,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x00,0x00,0x07,0xC0,0x00,0x1F,0xF0,0x00,0x38,0x18,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x09,0x00,0x10,0x11,0x00,0x1F,0xFF,0x00,0x3F,0xFF,0x00,0x00,0x01,0x00,0x00,0x00},/*"q",81*/ +{0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x08,0x08,0x00,0x10,0x08,0x00,0x20,0x08,0x00,0x20,0x00,0x00,0x30,0x00,0x00,0x30,0x00,0x00,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x78,0x00,0x1E,0x18,0x00,0x33,0x08,0x00,0x23,0x08,0x00,0x21,0x08,0x00,0x21,0x88,0x00,0x21,0x98,0x00,0x30,0xF0,0x00,0x38,0x60,0x00,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x20,0x00,0x00,0x20,0x00,0x00,0xFF,0xF0,0x03,0xFF,0xF8,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x00,0x30,0x00,0x00,0x00,0x00,0x00,0x00},/*"t",84*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x3F,0xF0,0x00,0x7F,0xF8,0x00,0x00,0x18,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x20,0x10,0x00,0x3F,0xF8,0x00,0x7F,0xF0,0x00,0x00,0x10,0x00,0x00,0x00},/*"u",85*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x30,0x00,0x00,0x3C,0x00,0x00,0x3F,0x80,0x00,0x23,0xF0,0x00,0x00,0x78,0x00,0x00,0x70,0x00,0x23,0x80,0x00,0x3C,0x00,0x00,0x30,0x00,0x00,0x20,0x00},/*"v",86*/ +{0x00,0x20,0x00,0x00,0x3C,0x00,0x00,0x3F,0xE0,0x00,0x23,0xF8,0x00,0x00,0xE0,0x00,0x27,0x00,0x00,0x3E,0x00,0x00,0x3F,0xE0,0x00,0x21,0xF8,0x00,0x01,0xE0,0x00,0x3E,0x00,0x00,0x20,0x00},/*"w",87*/ +{0x00,0x00,0x00,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x38,0x38,0x00,0x3E,0x68,0x00,0x27,0x80,0x00,0x03,0xC8,0x00,0x2C,0xF8,0x00,0x38,0x38,0x00,0x20,0x18,0x00,0x20,0x08,0x00,0x00,0x00},/*"x",88*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x30,0x03,0x00,0x3C,0x01,0x00,0x3F,0x83,0x00,0x23,0xEC,0x00,0x00,0x70,0x00,0x23,0x80,0x00,0x3C,0x00,0x00,0x20,0x00,0x00,0x20,0x00,0x00,0x00,0x00},/*"y",89*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x08,0x00,0x20,0x38,0x00,0x20,0xF8,0x00,0x23,0xE8,0x00,0x2F,0x88,0x00,0x3E,0x08,0x00,0x38,0x08,0x00,0x20,0x18,0x00,0x00,0x70,0x00,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x14,0x00,0x1F,0xF7,0xFC,0x30,0x00,0x06,0x20,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x02,0x30,0x00,0x06,0x1F,0xF7,0xFC,0x00,0x14,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x00,0x00,0x00,0x18,0x00,0x00,0x60,0x00,0x00,0x40,0x00,0x00,0x40,0x00,0x00,0x20,0x00,0x00,0x10,0x00,0x00,0x08,0x00,0x00,0x04,0x00,0x00,0x04,0x00,0x00,0x0C,0x00,0x00,0x10,0x00,0x00},/*"~",94*/ +}; +#endif diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/hardware_fsmc.h b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/hardware_fsmc.h index 7669636f2..430d38edf 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/hardware_fsmc.h +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/hardware_fsmc.h @@ -2,30 +2,36 @@ ****************************************************************************** * @file stm32f4xx_fsmc.h * @author MCD Application Team - * @version V1.0.0 - * @date 30-September-2011 + * @version V1.4.0 + * @date 04-August-2014 * @brief This file contains all the functions prototypes for the FSMC firmware * library. ****************************************************************************** * @attention * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * - *

© COPYRIGHT 2011 STMicroelectronics

****************************************************************************** */ /** * @file: hardware_fsmc.h * @brief: define hardware fsmc function -* @version: 1.0 +* @version: 2.0 * @author: AIIT XUOS Lab -* @date: 2021/4/25 +* @date: 2022/1/12 */ /************************************************* @@ -33,15 +39,15 @@ File name: hardware_fsmc.h Description: define hardware fsmc function Others: History: -1. Date: 2021-04-25 +1. Date: 2022-1-12 Author: AIIT XUOS Lab Modification: 1. rename stm32f4xx_fsmc.h for XiUOS *************************************************/ /* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __HARDWARE_FSMC_H__ -#define __HARDWARE_FSMC_H__ +#ifndef __HARDWARE_FSMC_H +#define __HARDWARE_FSMC_H #ifdef __cplusplus extern "C" { @@ -110,7 +116,7 @@ typedef struct This parameter can be a value of @ref FSMC_NORSRAM_Bank */ uint32_t FSMC_DataAddressMux; /*!< Specifies whether the address and data values are - multiplexed on the databus or not. + multiplexed on the data bus or not. This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */ uint32_t FSMC_MemoryType; /*!< Specifies the type of external memory attached to @@ -144,7 +150,7 @@ typedef struct uint32_t FSMC_WriteOperation; /*!< Enables or disables the write operation in the selected bank by the FSMC. This parameter can be a value of @ref FSMC_Write_Operation */ - uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait-state insertion via wait + uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait state insertion via wait signal, valid for Flash memory access in burst mode. This parameter can be a value of @ref FSMC_Wait_Signal */ @@ -154,9 +160,9 @@ typedef struct uint32_t FSMC_WriteBurst; /*!< Enables or disables the write burst operation. This parameter can be a value of @ref FSMC_Write_Burst */ - FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the ExtendedMode is not used*/ + FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the Extended Mode is not used*/ - FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the ExtendedMode is used*/ + FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the Extended Mode is used*/ }FSMC_NORSRAMInitTypeDef; /** @@ -165,26 +171,26 @@ typedef struct typedef struct { uint32_t FSMC_SetupTime; /*!< Defines the number of HCLK cycles to setup address before - the command assertion for NAND-Flash read or write access + the command assertion for NAND Flash read or write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a value between 0 and 0xFF.*/ - uint32_t FSMC_WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to CHECK the - command for NAND-Flash read or write access to + uint32_t FSMC_WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the + command for NAND Flash read or write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a number between 0x00 and 0xFF */ uint32_t FSMC_HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address - (and data for write access) after the command deassertion - for NAND-Flash read or write access to common/Attribute + (and data for write access) after the command de-assertion + for NAND Flash read or write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a number between 0x00 and 0xFF */ uint32_t FSMC_HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the - databus is kept in HiZ after the start of a NAND-Flash + data bus is kept in HiZ after the start of a NAND Flash write access to common/Attribute or I/O memory space (depending on the memory space timing to be configured). This parameter can be a number between 0x00 and 0xFF */ @@ -334,7 +340,6 @@ typedef struct #define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000) #define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010) -#define FSMC_MemoryDataWidth_32b ((uint32_t)0x00000020) #define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \ ((WIDTH) == FSMC_MemoryDataWidth_16b)) /** @@ -677,7 +682,7 @@ void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT); } #endif -#endif /*__HARDWARE_FSMC_H__ */ +#endif /*__STM32F4xx_FSMC_H */ /** * @} */ @@ -686,4 +691,4 @@ void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT); * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Kconfig b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Kconfig index 8b1378917..b859ecb61 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Kconfig +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Kconfig @@ -1 +1,11 @@ - +if BSP_USING_LCD + config LCD_BUS_NAME + string "lcd bus name" + default "lcd" + config LCD_DRV_NAME + string "lcd bus driver name" + default "lcd_drv" + config LCD_DEVICE_NAME + string "lcd bus device name" + default "lcd_dev" +endif diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Makefile b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Makefile index 91904d501..05bd917f0 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Makefile +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Makefile @@ -1,4 +1,4 @@ -SRC_FILES := hardware_fsmc.c +SRC_FILES := connect_lcd.c include $(KERNEL_ROOT)/compiler.mk diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/connect_lcd.c b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/connect_lcd.c new file mode 100644 index 000000000..9df8912e2 --- /dev/null +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/connect_lcd.c @@ -0,0 +1,656 @@ +/* + * Copyright (c) Guangzhou Xingyi Electronic Technology Co., Ltd + * + * Change Logs: + * Date Author Notes + * 2014-7-4 alientek first version + */ + +/** +* @file connect_lcd.c +* @brief support aiit-arm32-board lcd function and register to bus framework +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2022-1-12 +*/ + +/************************************************* +File name: connect_lcd.c +Description: support aiit-arm32-board lcd configure and lcd bus register function +Others: take hardware/lcd/lcd.c for references +History: +1. Date: 2022-1-12 +Author: AIIT XUOS Lab +Modification: +1. support aiit-arm32-board lcd configure, write by FSMC function +2. support aiit-arm32-board lcd bus device and driver register +*************************************************/ + +#include +#include +#include +#include +#include + +static void HwFsmcInit() +{ + GPIO_InitTypeDef GPIO_InitStructure; + FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; + FSMC_NORSRAMTimingInitTypeDef readWriteTiming; + FSMC_NORSRAMTimingInitTypeDef writeTiming; + + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD|RCC_AHB1Periph_GPIOE|RCC_AHB1Periph_GPIOF|RCC_AHB1Periph_GPIOG, ENABLE); + RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;//PD3, LCD back light + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(GPIOE, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;//PF12, FSMC_A6 + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(GPIOF, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;//PG12, FSMC_NE4 + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(GPIOG, &GPIO_InitStructure); + + GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);//PD0,AF12 + GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);//PD1,AF12 + GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);//PD4,AF12 + GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);//PD5,AF12 + GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);//PD8,AF12 + GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);//PD9,AF12 + GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);//PD10,AF12 + GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);//PD14,AF12 + GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);//PD15,AF12 + + GPIO_PinAFConfig(GPIOE, GPIO_PinSource7, GPIO_AF_FSMC);//PE7,AF12 + GPIO_PinAFConfig(GPIOE, GPIO_PinSource8, GPIO_AF_FSMC);//PE8,AF12 + GPIO_PinAFConfig(GPIOE, GPIO_PinSource9, GPIO_AF_FSMC);//PE9,AF12 + GPIO_PinAFConfig(GPIOE, GPIO_PinSource10, GPIO_AF_FSMC);//PE10,AF12 + GPIO_PinAFConfig(GPIOE, GPIO_PinSource11, GPIO_AF_FSMC);//PE11,AF12 + GPIO_PinAFConfig(GPIOE, GPIO_PinSource12, GPIO_AF_FSMC);//PE12,AF12 + GPIO_PinAFConfig(GPIOE, GPIO_PinSource13, GPIO_AF_FSMC);//PE13,AF12 + GPIO_PinAFConfig(GPIOE, GPIO_PinSource14, GPIO_AF_FSMC);//PE14,AF12 + GPIO_PinAFConfig(GPIOE, GPIO_PinSource15, GPIO_AF_FSMC);//PE15,AF12 + + GPIO_PinAFConfig(GPIOF, GPIO_PinSource12, GPIO_AF_FSMC);//PF12,AF12 + GPIO_PinAFConfig(GPIOG, GPIO_PinSource12, GPIO_AF_FSMC);//PG12,AF12 + + readWriteTiming.FSMC_AddressSetupTime = 0xF;//16 HCLK 1/168M=6ns*16=96ns + readWriteTiming.FSMC_AddressHoldTime = 0x00; + readWriteTiming.FSMC_DataSetupTime = 60;//60 HCLK 6*60=360ns + readWriteTiming.FSMC_BusTurnAroundDuration = 0x00; + readWriteTiming.FSMC_CLKDivision = 0x00; + readWriteTiming.FSMC_DataLatency = 0x00; + readWriteTiming.FSMC_AccessMode = FSMC_AccessMode_A;//mode A + + writeTiming.FSMC_AddressSetupTime = 9;//9 HCLK =54ns + writeTiming.FSMC_AddressHoldTime = 0x00; + writeTiming.FSMC_DataSetupTime = 8;//9 HCLK=54ns + writeTiming.FSMC_BusTurnAroundDuration = 0x00; + writeTiming.FSMC_CLKDivision = 0x00; + writeTiming.FSMC_DataLatency = 0x00; + writeTiming.FSMC_AccessMode = FSMC_AccessMode_A;//mode A + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4;//FSMC_NE4, register BTCR[6],[7]。 + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType =FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;//data bit width 16bit + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode =FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait=FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &readWriteTiming; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &writeTiming; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);//init FSMC init + + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);//enable BANK1 +} + +static void LcdWriteCmd(LCD_TypeDef *LCD, uint16_t cmd) +{ + LCD->LCD_REG_CMD = cmd; +} + +static void LcdWriteData(LCD_TypeDef *LCD, uint16_t data) +{ + LCD->LCD_RAM_DATA = data; +} + +static void LcdWriteReg(LCD_TypeDef *LCD, uint16_t cmd, uint16_t data) +{ + LCD->LCD_REG_CMD = cmd; + LCD->LCD_RAM_DATA = data; +} + +static uint16_t LcdReadData(LCD_TypeDef *LCD) +{ + uint16_t data; + data = LCD->LCD_RAM_DATA; + return data; +} + +static uint16_t LcdReadReg(LCD_TypeDef *LCD, uint16_t cmd) +{ + LcdWriteCmd(LCD, cmd); + MdelayKTask(1); + return LcdReadData(LCD); +} + +static void LcdDisplayOn(LCD_TypeDef *LCD) +{ + LcdWriteCmd(LCD, DISPALY_ON); +} + +static void LcdDisplayOff(LCD_TypeDef *LCD) +{ + LcdWriteCmd(LCD, DISPALY_OFF); +} + +static void LcdWriteRamCmd(struct Stm32HwLcd *hw_lcd) +{ + LcdWriteCmd(hw_lcd->LCD, hw_lcd->lcd_param.write_ram_cmd); +} + +static void LcdWriteRamColor(struct Stm32HwLcd *hw_lcd, uint16_t color) +{ + LcdWriteData(hw_lcd->LCD, color); +} + +static void LcdSetCursor(struct Stm32HwLcd *hw_lcd, uint16_t x_pos, uint16_t y_pos) +{ + LcdWriteCmd(hw_lcd->LCD, hw_lcd->lcd_param.set_x_cmd); + LcdWriteData(hw_lcd->LCD, x_pos >> 8); + LcdWriteData(hw_lcd->LCD, x_pos & 0xFF); + LcdWriteCmd(hw_lcd->LCD, hw_lcd->lcd_param.set_y_cmd); + LcdWriteData(hw_lcd->LCD, y_pos >> 8); + LcdWriteData(hw_lcd->LCD, y_pos & 0xFF); +} + +static void LcdDrawPoint(struct Stm32HwLcd *hw_lcd, uint16_t x, uint16_t y, uint16_t color) +{ + LcdSetCursor(hw_lcd, x, y); + LcdWriteRamCmd(hw_lcd); + LcdWriteRamColor(hw_lcd, color); +} + +//(start_x,start_y),(end_x,end_y), area: (end_x-start_x+1)*(end_y-start_y+1) +static void LcdDrawArea(struct Stm32HwLcd *hw_lcd, uint16_t start_x, uint16_t start_y, uint16_t end_x, uint16_t end_y, uint16_t *color) +{ + uint16_t height, width; + uint16_t i, j; + width = end_x - start_x + 1; + height = end_y - start_y + 1; + + for (i = 0; i < height; i++) { + LcdSetCursor(hw_lcd, start_x, start_y + i); + LcdWriteRamCmd(hw_lcd); + + for (j = 0; j < width; j++) { + LcdWriteRamColor(hw_lcd, color[i * width + j]); + } + } +} + +//mode 0 : draw char, default configure ; 1 : draw char over background +static void LcdDrawChar(struct Stm32HwLcd *hw_lcd, uint16_t x, uint16_t y, uint8_t char_data, uint8_t size, uint8_t mode, uint16_t color,uint16_t back_color) +{ + uint8_t temp, t1, t; + uint16_t y0 = y; + uint8_t csize = (size / 8 + ((size % 8) ? 1 : 0)) * (size / 2); + char_data = char_data - ' '; + for(t = 0;t < csize;t ++) { + if(12 == size) + temp = asc2_1206[char_data][t]; + else if(16 == size) + temp = asc2_1608[char_data][t]; + else if(24 == size) + temp = asc2_2412[char_data][t]; + else + return; + + for(t1 = 0;t1 < 8;t1 ++) { + if(temp & 0x80) + LcdDrawPoint(hw_lcd, x, y, color); + else if(mode == 0) + LcdDrawPoint(hw_lcd, x, y, back_color); + + temp <<= 1; + y++; + + if(y >= hw_lcd->lcd_param.height) + return;//over height + + if((y - y0) == size) { + y = y0; + x++; + if(x >= hw_lcd->lcd_param.width) + return;//over width + break; + } + } + } +} + +static void LcdDrawString(struct Stm32HwLcd *hw_lcd, uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint8_t size, uint8_t *p, uint16_t color, uint16_t back_color) +{ + uint8_t x0 = x; + width += x; + height += y; + + while ((*p <= '~') && (*p >= ' ')) { + if (x >= width) { + x = x0; + y += size; + } + + if (y >= height) + break; + + LcdDrawChar(hw_lcd, x, y, *p, size, 0, color, back_color); + x += size / 2; + p++; + } +} + +static void LcdClear(struct Stm32HwLcd *hw_lcd, uint16_t color) +{ + uint32_t dot_index = 0; + uint32_t totalpoint = hw_lcd->lcd_param.width * hw_lcd->lcd_param.height; + + LcdSetCursor(hw_lcd, 0x00, 0x00); + LcdWriteRamCmd(hw_lcd); + + for (dot_index = 0; dot_index < totalpoint; dot_index ++) { + LcdWriteRamColor(hw_lcd, color); + } +} + +static void LcdScanDirection(struct Stm32HwLcd *hw_lcd, uint8_t scan_direction) +{ + uint16_t cmd = 0; + uint16_t temp; + uint8_t scan_direction_reverse; + + switch (scan_direction) { + case 0: + scan_direction_reverse = 6; + break; + case 1: + scan_direction_reverse = 7; + break; + case 2: + scan_direction_reverse = 4; + break; + case 3: + scan_direction_reverse = 5; + break; + case 4: + scan_direction_reverse = 1; + break; + case 5: + scan_direction_reverse = 0; + break; + case 6: + scan_direction_reverse = 3; + break; + case 7: + scan_direction_reverse = 2; + break; + } + + switch (scan_direction_reverse) { + case L2R_U2D: + cmd |= (0 << 7) | (0 << 6) | (0 << 5); + break; + case L2R_D2U: + cmd |= (1 << 7) | (0 << 6) | (0 << 5); + break; + case R2L_U2D: + cmd |= (0 << 7) | (1 << 6) | (0 << 5); + break; + case R2L_D2U: + cmd |= (1 << 7) | (1 << 6) | (0 << 5); + break; + case U2D_L2R: + cmd |= (0 << 7) | (0 << 6) | (1 << 5); + break; + case U2D_R2L: + cmd |= (0 << 7) | (1 << 6) | (1 << 5); + break; + case D2U_L2R: + cmd |= (1 << 7) | (0 << 6) | (1 << 5); + break; + case D2U_R2L: + cmd |= (1 << 7) | (1 << 6) | (1 << 5); + break; + } + + cmd |= 0X08;//set BGR bit + + LcdWriteReg(hw_lcd->LCD, MEMORY_ACCESS_CTL, cmd); + + if (cmd & INVERSION_DISPALY_OFF) {//reverse x、y + if (hw_lcd->lcd_param.width < hw_lcd->lcd_param.height) { + temp = hw_lcd->lcd_param.width; + hw_lcd->lcd_param.width = hw_lcd->lcd_param.height; + hw_lcd->lcd_param.height = temp; + } + } else { + if (hw_lcd->lcd_param.width > hw_lcd->lcd_param.height) { + temp = hw_lcd->lcd_param.width; + hw_lcd->lcd_param.width = hw_lcd->lcd_param.height; + hw_lcd->lcd_param.height = temp; + } + } + + LcdWriteCmd(hw_lcd->LCD, hw_lcd->lcd_param.set_x_cmd); + LcdWriteData(hw_lcd->LCD, 0); + LcdWriteData(hw_lcd->LCD, 0); + LcdWriteData(hw_lcd->LCD, (hw_lcd->lcd_param.width - 1) >> 8); + LcdWriteData(hw_lcd->LCD, (hw_lcd->lcd_param.width - 1) & 0xFF); + LcdWriteCmd(hw_lcd->LCD, hw_lcd->lcd_param.set_y_cmd); + LcdWriteData(hw_lcd->LCD, 0); + LcdWriteData(hw_lcd->LCD, 0); + LcdWriteData(hw_lcd->LCD, (hw_lcd->lcd_param.height - 1) >> 8); + LcdWriteData(hw_lcd->LCD, (hw_lcd->lcd_param.height - 1) & 0xFF); +} + +static void LcdDisplayDirection(struct Stm32HwLcd *hw_lcd) +{ + hw_lcd->lcd_param.write_ram_cmd = MEMORY_WRITE; + hw_lcd->lcd_param.set_x_cmd = HORIZONTAL_ADDRESS_SET; + hw_lcd->lcd_param.set_y_cmd = VERTICAL_ADDRESS_SET; + + LcdScanDirection(hw_lcd, DFT_SCAN_DIR); +} + +static void HwLcdInit(struct Stm32HwLcd *hw_lcd) +{ + LcdWriteCmd(hw_lcd->LCD, READ_ID4); + hw_lcd->lcd_param.lcd_id = LcdReadData(hw_lcd->LCD);//dummy read + hw_lcd->lcd_param.lcd_id = LcdReadData(hw_lcd->LCD);//0x00 + hw_lcd->lcd_param.lcd_id = LcdReadData(hw_lcd->LCD);//93 + hw_lcd->lcd_param.lcd_id <<= 8; + hw_lcd->lcd_param.lcd_id |= LcdReadData(hw_lcd->LCD);//41 + + KPrintf("HwLcdInit lcd id 0x%x\n", hw_lcd->lcd_param.lcd_id); + + if (ILI9341 == hw_lcd->lcd_param.lcd_id) { + FSMC_Bank1E->BWTR[6] &= ~(0xF << 0); + FSMC_Bank1E->BWTR[6] &= ~(0xF << 8); + FSMC_Bank1E->BWTR[6] |= 3 << 0; + FSMC_Bank1E->BWTR[6] |= 2 << 8; + + LcdWriteCmd(hw_lcd->LCD, 0xCF); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0xC1); + LcdWriteData(hw_lcd->LCD, 0x30); + LcdWriteCmd(hw_lcd->LCD, 0xED); + LcdWriteData(hw_lcd->LCD, 0x64); + LcdWriteData(hw_lcd->LCD, 0x03); + LcdWriteData(hw_lcd->LCD, 0X12); + LcdWriteData(hw_lcd->LCD, 0X81); + LcdWriteCmd(hw_lcd->LCD, 0xE8); + LcdWriteData(hw_lcd->LCD, 0x85); + LcdWriteData(hw_lcd->LCD, 0x10); + LcdWriteData(hw_lcd->LCD, 0x7A); + LcdWriteCmd(hw_lcd->LCD, 0xCB); + LcdWriteData(hw_lcd->LCD, 0x39); + LcdWriteData(hw_lcd->LCD, 0x2C); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x34); + LcdWriteData(hw_lcd->LCD, 0x02); + LcdWriteCmd(hw_lcd->LCD, 0xF7); + LcdWriteData(hw_lcd->LCD, 0x20); + LcdWriteCmd(hw_lcd->LCD, 0xEA); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteCmd(hw_lcd->LCD, POWER_CTL1);//Power control + LcdWriteData(hw_lcd->LCD, 0x1B);//VRH[5:0] + LcdWriteCmd(hw_lcd->LCD, POWER_CTL2);//Power control + LcdWriteData(hw_lcd->LCD, 0x01);//SAP[2:0];BT[3:0] + LcdWriteCmd(hw_lcd->LCD, VCOM_CTL1);//VCM control + LcdWriteData(hw_lcd->LCD, 0x30); + LcdWriteData(hw_lcd->LCD, 0x30); + LcdWriteCmd(hw_lcd->LCD, VCOM_CTL2);//VCM control2 + LcdWriteData(hw_lcd->LCD, 0xB7); + LcdWriteCmd(hw_lcd->LCD, MEMORY_ACCESS_CTL);// Memory Access Control + LcdWriteData(hw_lcd->LCD, 0x48); + LcdWriteCmd(hw_lcd->LCD, PIXEL_FORMAT_SET); + LcdWriteData(hw_lcd->LCD, 0x55); + LcdWriteCmd(hw_lcd->LCD, NORMAL_FRAME_CTL); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x1A); + LcdWriteCmd(hw_lcd->LCD, DISPALY_FUNCTION_CTL);// Display Function Control + LcdWriteData(hw_lcd->LCD, 0x0A); + LcdWriteData(hw_lcd->LCD, 0xA2); + LcdWriteCmd(hw_lcd->LCD, 0xF2);// 3Gamma Function Disable + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteCmd(hw_lcd->LCD, GAMMA_SET);//Gamma curve selected + LcdWriteData(hw_lcd->LCD, 0x01); + LcdWriteCmd(hw_lcd->LCD, POSITIVE_GAMMA_CORRECT);//Set Gamma + LcdWriteData(hw_lcd->LCD, 0x0F); + LcdWriteData(hw_lcd->LCD, 0x2A); + LcdWriteData(hw_lcd->LCD, 0x28); + LcdWriteData(hw_lcd->LCD, 0x08); + LcdWriteData(hw_lcd->LCD, 0x0E); + LcdWriteData(hw_lcd->LCD, 0x08); + LcdWriteData(hw_lcd->LCD, 0x54); + LcdWriteData(hw_lcd->LCD, 0xA9); + LcdWriteData(hw_lcd->LCD, 0x43); + LcdWriteData(hw_lcd->LCD, 0x0A); + LcdWriteData(hw_lcd->LCD, 0x0F); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteCmd(hw_lcd->LCD, NEGATIVE_GAMMA_CORRECT);//Set Gamma + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x15); + LcdWriteData(hw_lcd->LCD, 0x17); + LcdWriteData(hw_lcd->LCD, 0x07); + LcdWriteData(hw_lcd->LCD, 0x11); + LcdWriteData(hw_lcd->LCD, 0x06); + LcdWriteData(hw_lcd->LCD, 0x2B); + LcdWriteData(hw_lcd->LCD, 0x56); + LcdWriteData(hw_lcd->LCD, 0x3C); + LcdWriteData(hw_lcd->LCD, 0x05); + LcdWriteData(hw_lcd->LCD, 0x10); + LcdWriteData(hw_lcd->LCD, 0x0F); + LcdWriteData(hw_lcd->LCD, 0x3F); + LcdWriteData(hw_lcd->LCD, 0x3F); + LcdWriteData(hw_lcd->LCD, 0x0F); + LcdWriteCmd(hw_lcd->LCD, VERTICAL_ADDRESS_SET); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x01); + LcdWriteData(hw_lcd->LCD, 0x3f); + LcdWriteCmd(hw_lcd->LCD, HORIZONTAL_ADDRESS_SET); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0x00); + LcdWriteData(hw_lcd->LCD, 0xef); + LcdWriteCmd(hw_lcd->LCD, SLEEP_OFF);//Exit Sleep + MdelayKTask(120); + LcdWriteCmd(hw_lcd->LCD, DISPALY_ON);//display on + + LcdDisplayDirection(hw_lcd); + PDout(3) = 1; + LcdClear(hw_lcd, WHITE); + } +} + +static uint32 LcdWrite(void *dev, struct BusBlockWriteParam *write_param) +{ + x_err_t ret = EOK; + + struct LcdHardwareDevice *lcd_dev = (struct LcdHardwareDevice *)dev; + struct Stm32HwLcd *hw_lcd = (struct Stm32HwLcd *)lcd_dev->haldev.private_data; + + if (write_param->buffer) { + LcdWriteParam *show = (LcdWriteParam *)write_param->buffer; + + //output string + if(0 == show->type) { + LcdDrawString(hw_lcd, show->string_info.x_pos, show->string_info.y_pos, show->string_info.width, show->string_info.height, + show->string_info.font_size, show->string_info.addr, show->string_info.font_color, show->string_info.back_color); + } + //output dot + else if (1 == show->type) { + LcdDrawArea(hw_lcd, show->pixel_info.x_startpos, show->pixel_info.y_startpos, show->pixel_info.x_endpos, show->pixel_info.y_endpos, + (uint16_t *)show->pixel_info.pixel_color); + } else { + KPrintf("LcdWrite donnot support show type(0 string; 1 dot) %u\n", show->type); + ret = ERROR; + } + } + + return ret; +} + +static uint32 LcdControl(void* drv, struct BusConfigureInfo *configure_info) +{ + x_err_t ret = EOK; + + return ret; +} + +static const struct LcdDevDone dev_done = +{ + NONE, + NONE, + LcdWrite, + NONE, +}; + +static int BoardLcdBusInit(struct LcdBus * lcd_bus, struct LcdDriver * lcd_driver,const char *bus_name, const char *drv_name) +{ + x_err_t ret = EOK; + + /*Init the lcd bus */ + ret = LcdBusInit( lcd_bus, bus_name); + if (EOK != ret) { + KPrintf("Board_lcd_init LcdBusInit error %d\n", ret); + return -ERROR; + } + + /*Init the lcd driver*/ + ret = LcdDriverInit( lcd_driver, drv_name); + if (EOK != ret) { + KPrintf("Board_LCD_init LcdDriverInit error %d\n", ret); + return -ERROR; + } + + /*Attach the lcd driver to the lcd bus*/ + ret = LcdDriverAttachToBus(drv_name, bus_name); + if (EOK != ret) { + KPrintf("Board_LCD_init LcdDriverAttachToBus error %d\n", ret); + return -ERROR; + } + + return ret; +} + +/*Attach the lcd device to the lcd bus*/ +static int BoardLcdDevBend(struct LcdHardwareDevice *lcd_device, void *param, const char *bus_name, const char *dev_name) +{ + x_err_t ret = EOK; + + ret = LcdDeviceRegister(lcd_device, param, dev_name); + if (EOK != ret) { + KPrintf("Board_LCD_init LcdDeviceInit device %s error %d\n", dev_name, ret); + return -ERROR; + } + + ret = LcdDeviceAttachToBus(dev_name, bus_name); + if (EOK != ret) { + KPrintf("Board_LCD_init LcdDeviceAttachToBus device %s error %d\n", dev_name, ret); + return -ERROR; + } + + return ret; +} + +int Stm32HwLcdInit(void) +{ + x_err_t ret = EOK; + +#ifdef BSP_USING_LCD + static struct LcdBus lcd_bus; + static struct LcdDriver lcd_drv; + static struct LcdHardwareDevice lcd_dev; + static struct Stm32HwLcd hw_lcd; + + memset(&lcd_bus, 0, sizeof(struct LcdBus)); + memset(&lcd_drv, 0, sizeof(struct LcdDriver)); + memset(&lcd_dev, 0, sizeof(struct LcdHardwareDevice)); + memset(&hw_lcd, 0, sizeof(struct Stm32HwLcd)); + + lcd_drv.configure = LcdControl; + + ret = BoardLcdBusInit(&lcd_bus, &lcd_drv, LCD_BUS_NAME, LCD_DRV_NAME); + if (EOK != ret) { + KPrintf("HwLcdInit BoardLcdBusInit error ret %u\n", ret); + return ERROR; + } + + lcd_dev.dev_done = &dev_done; + hw_lcd.LCD = AIIT_BOARD_LCD; + + /*depends on the LCD hardware*/ + hw_lcd.lcd_param.lcd_direction = LCD_HORIZONTAL_SCEEN;//Horizontal screen + if (LCD_HORIZONTAL_SCEEN == hw_lcd.lcd_param.lcd_direction) { + hw_lcd.lcd_param.width = 320; + hw_lcd.lcd_param.height = 240; + } else if (LCD_VERTICAL_SCEEN == hw_lcd.lcd_param.lcd_direction) { + hw_lcd.lcd_param.width = 240; + hw_lcd.lcd_param.height = 320; + } else { + hw_lcd.lcd_param.width = 320; + hw_lcd.lcd_param.height = 240; + } + + ret = BoardLcdDevBend(&lcd_dev, (void *)&hw_lcd, LCD_BUS_NAME, LCD_DEVICE_NAME); //init lcd device + if (EOK != ret) { + KPrintf("HwLcdInit BoardLcdDevBend error ret %u\n", ret); + return ERROR; + } + + HwFsmcInit(); + + HwLcdInit(&hw_lcd); +#endif + + return ret; +} diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/hardware_fsmc.c b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/hardware_fsmc.c deleted file mode 100644 index f1dc4a869..000000000 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/hardware_fsmc.c +++ /dev/null @@ -1,1002 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_fsmc.c - * @author MCD Application Team - * @version V1.0.0 - * @date 30-September-2011 - * @brief This file provides firmware functions to manage the following - * functionalities of the FSMC peripheral: - * - Interface with SRAM, PSRAM, NOR and OneNAND memories - * - Interface with NAND memories - * - Interface with 16-bit PC Card compatible memories - * - Interrupts and flags management - * - ****************************************************************************** - - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/** -* @file: hardware_fsmc.c -* @brief: support hardware fsmc function -* @version: 1.0 -* @author: AIIT XUOS Lab -* @date: 2021/4/25 -*/ - -/************************************************* -File name: hardware_fsmc.c -Description: support hardware fsmc function -Others: -History: -1. Date: 2021-04-25 -Author: AIIT XUOS Lab -Modification: -1. rename stm32f4xx_fsmc.c for XiUOS -*************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include -#include -#include - -/** @addtogroup STM32F4xx_StdPeriph_Driver - * @{ - */ - -/** @defgroup FSMC - * @brief FSMC driver modules - * @{ - */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -/* --------------------- FSMC registers bit mask ---------------------------- */ -/* FSMC BCRx Mask */ -#define BCR_MBKEN_SET ((uint32_t)0x00000001) -#define BCR_MBKEN_RESET ((uint32_t)0x000FFFFE) -#define BCR_FACCEN_SET ((uint32_t)0x00000040) - -/* FSMC PCRx Mask */ -#define PCR_PBKEN_SET ((uint32_t)0x00000004) -#define PCR_PBKEN_RESET ((uint32_t)0x000FFFFB) -#define PCR_ECCEN_SET ((uint32_t)0x00000040) -#define PCR_ECCEN_RESET ((uint32_t)0x000FFFBF) -#define PCR_MEMORYTYPE_NAND ((uint32_t)0x00000008) - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/** @defgroup FSMC_Private_Functions - * @{ - */ - -/** @defgroup FSMC_Group1 NOR/SRAM Controller functions - * @brief NOR/SRAM Controller functions - * -@verbatim - =============================================================================== - NOR/SRAM Controller functions - =============================================================================== - - The following sequence should be followed to configure the FSMC to interface with - SRAM, PSRAM, NOR or OneNAND memory connected to the NOR/SRAM Bank: - - 1. Enable the clock for the FSMC and associated GPIOs using the following functions: - RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE); - - 2. FSMC pins configuration - - Connect the involved FSMC pins to AF12 using the following function - GPIO_PinAFConfig(GPIOx, GPIO_PinSourcex, GPIO_AF_FSMC); - - Configure these FSMC pins in alternate function mode by calling the function - GPIO_Init(); - - 3. Declare a FSMC_NORSRAMInitTypeDef structure, for example: - FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; - and fill the FSMC_NORSRAMInitStructure variable with the allowed values of - the structure member. - - 4. Initialize the NOR/SRAM Controller by calling the function - FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); - - 5. Then enable the NOR/SRAM Bank, for example: - FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); - - 6. At this stage you can read/write from/to the memory connected to the NOR/SRAM Bank. - -@endverbatim - * @{ - */ - -/** - * @brief Deinitializes the FSMC NOR/SRAM Banks registers to their default - * reset values. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1 - * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2 - * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3 - * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4 - * @retval None - */ -void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank) -{ - /* Check the parameter */ - assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank)); - - /* FSMC_Bank1_NORSRAM1 */ - if(FSMC_Bank == FSMC_Bank1_NORSRAM1) - { - FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030DB; - } - /* FSMC_Bank1_NORSRAM2, FSMC_Bank1_NORSRAM3 or FSMC_Bank1_NORSRAM4 */ - else - { - FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030D2; - } - FSMC_Bank1->BTCR[FSMC_Bank + 1] = 0x0FFFFFFF; - FSMC_Bank1E->BWTR[FSMC_Bank] = 0x0FFFFFFF; -} - -/** - * @brief Initializes the FSMC NOR/SRAM Banks according to the specified - * parameters in the FSMC_NORSRAMInitStruct. - * @param FSMC_NORSRAMInitStruct : pointer to a FSMC_NORSRAMInitTypeDef structure - * that contains the configuration information for the FSMC NOR/SRAM - * specified Banks. - * @retval None - */ -void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct) -{ - /* Check the parameters */ - assert_param(IS_FSMC_NORSRAM_BANK(FSMC_NORSRAMInitStruct->FSMC_Bank)); - assert_param(IS_FSMC_MUX(FSMC_NORSRAMInitStruct->FSMC_DataAddressMux)); - assert_param(IS_FSMC_MEMORY(FSMC_NORSRAMInitStruct->FSMC_MemoryType)); - assert_param(IS_FSMC_MEMORY_WIDTH(FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth)); - assert_param(IS_FSMC_BURSTMODE(FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode)); - assert_param(IS_FSMC_ASYNWAIT(FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait)); - assert_param(IS_FSMC_WAIT_POLARITY(FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity)); - assert_param(IS_FSMC_WRAP_MODE(FSMC_NORSRAMInitStruct->FSMC_WrapMode)); - assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive)); - assert_param(IS_FSMC_WRITE_OPERATION(FSMC_NORSRAMInitStruct->FSMC_WriteOperation)); - assert_param(IS_FSMC_WAITE_SIGNAL(FSMC_NORSRAMInitStruct->FSMC_WaitSignal)); - assert_param(IS_FSMC_EXTENDED_MODE(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode)); - assert_param(IS_FSMC_WRITE_BURST(FSMC_NORSRAMInitStruct->FSMC_WriteBurst)); - assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime)); - assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime)); - assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime)); - assert_param(IS_FSMC_TURNAROUND_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration)); - assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision)); - assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency)); - assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode)); - - /* Bank1 NOR/SRAM control register configuration */ - FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] = - (uint32_t)FSMC_NORSRAMInitStruct->FSMC_DataAddressMux | - FSMC_NORSRAMInitStruct->FSMC_MemoryType | - FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth | - FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode | - FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait | - FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity | - FSMC_NORSRAMInitStruct->FSMC_WrapMode | - FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive | - FSMC_NORSRAMInitStruct->FSMC_WriteOperation | - FSMC_NORSRAMInitStruct->FSMC_WaitSignal | - FSMC_NORSRAMInitStruct->FSMC_ExtendedMode | - FSMC_NORSRAMInitStruct->FSMC_WriteBurst; - if(FSMC_NORSRAMInitStruct->FSMC_MemoryType == FSMC_MemoryType_NOR) - { - FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] |= (uint32_t)BCR_FACCEN_SET; - } - /* Bank1 NOR/SRAM timing register configuration */ - FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank+1] = - (uint32_t)FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime << 4) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime << 8) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration << 16) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision << 20) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency << 24) | - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode; - - - /* Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */ - if(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode == FSMC_ExtendedMode_Enable) - { - assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime)); - assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime)); - assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime)); - assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision)); - assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency)); - assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode)); - FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = - (uint32_t)FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime | - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime << 4 )| - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime << 8) | - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision << 20) | - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency << 24) | - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode; - } - else - { - FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = 0x0FFFFFFF; - } -} - -/** - * @brief Fills each FSMC_NORSRAMInitStruct member with its default value. - * @param FSMC_NORSRAMInitStruct: pointer to a FSMC_NORSRAMInitTypeDef structure - * which will be initialized. - * @retval None - */ -void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct) -{ - /* Reset NOR/SRAM Init structure parameters values */ - FSMC_NORSRAMInitStruct->FSMC_Bank = FSMC_Bank1_NORSRAM1; - FSMC_NORSRAMInitStruct->FSMC_DataAddressMux = FSMC_DataAddressMux_Enable; - FSMC_NORSRAMInitStruct->FSMC_MemoryType = FSMC_MemoryType_SRAM; - FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; - FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; - FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; - FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; - FSMC_NORSRAMInitStruct->FSMC_WrapMode = FSMC_WrapMode_Disable; - FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; - FSMC_NORSRAMInitStruct->FSMC_WriteOperation = FSMC_WriteOperation_Enable; - FSMC_NORSRAMInitStruct->FSMC_WaitSignal = FSMC_WaitSignal_Enable; - FSMC_NORSRAMInitStruct->FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; - FSMC_NORSRAMInitStruct->FSMC_WriteBurst = FSMC_WriteBurst_Disable; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime = 0xFF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime = 0xFF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A; -} - -/** - * @brief Enables or disables the specified NOR/SRAM Memory Bank. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1 - * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2 - * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3 - * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4 - * @param NewState: new state of the FSMC_Bank. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState) -{ - assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected NOR/SRAM Bank by setting the PBKEN bit in the BCRx register */ - FSMC_Bank1->BTCR[FSMC_Bank] |= BCR_MBKEN_SET; - } - else - { - /* Disable the selected NOR/SRAM Bank by clearing the PBKEN bit in the BCRx register */ - FSMC_Bank1->BTCR[FSMC_Bank] &= BCR_MBKEN_RESET; - } -} -/** - * @} - */ - -/** @defgroup FSMC_Group2 NAND Controller functions - * @brief NAND Controller functions - * -@verbatim - =============================================================================== - NAND Controller functions - =============================================================================== - - The following sequence should be followed to configure the FSMC to interface with - 8-bit or 16-bit NAND memory connected to the NAND Bank: - - 1. Enable the clock for the FSMC and associated GPIOs using the following functions: - RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE); - - 2. FSMC pins configuration - - Connect the involved FSMC pins to AF12 using the following function - GPIO_PinAFConfig(GPIOx, GPIO_PinSourcex, GPIO_AF_FSMC); - - Configure these FSMC pins in alternate function mode by calling the function - GPIO_Init(); - - 3. Declare a FSMC_NANDInitTypeDef structure, for example: - FSMC_NANDInitTypeDef FSMC_NANDInitStructure; - and fill the FSMC_NANDInitStructure variable with the allowed values of - the structure member. - - 4. Initialize the NAND Controller by calling the function - FSMC_NANDInit(&FSMC_NANDInitStructure); - - 5. Then enable the NAND Bank, for example: - FSMC_NANDCmd(FSMC_Bank3_NAND, ENABLE); - - 6. At this stage you can read/write from/to the memory connected to the NAND Bank. - -@note To enable the Error Correction Code (ECC), you have to use the function - FSMC_NANDECCCmd(FSMC_Bank3_NAND, ENABLE); - and to get the current ECC value you have to use the function - ECCval = FSMC_GetECC(FSMC_Bank3_NAND); - -@endverbatim - * @{ - */ - -/** - * @brief Deinitializes the FSMC NAND Banks registers to their default reset values. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @retval None - */ -void FSMC_NANDDeInit(uint32_t FSMC_Bank) -{ - /* Check the parameter */ - assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - /* Set the FSMC_Bank2 registers to their reset values */ - FSMC_Bank2->PCR2 = 0x00000018; - FSMC_Bank2->SR2 = 0x00000040; - FSMC_Bank2->PMEM2 = 0xFCFCFCFC; - FSMC_Bank2->PATT2 = 0xFCFCFCFC; - } - /* FSMC_Bank3_NAND */ - else - { - /* Set the FSMC_Bank3 registers to their reset values */ - FSMC_Bank3->PCR3 = 0x00000018; - FSMC_Bank3->SR3 = 0x00000040; - FSMC_Bank3->PMEM3 = 0xFCFCFCFC; - FSMC_Bank3->PATT3 = 0xFCFCFCFC; - } -} - -/** - * @brief Initializes the FSMC NAND Banks according to the specified parameters - * in the FSMC_NANDInitStruct. - * @param FSMC_NANDInitStruct : pointer to a FSMC_NANDInitTypeDef structure that - * contains the configuration information for the FSMC NAND specified Banks. - * @retval None - */ -void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct) -{ - uint32_t tmppcr = 0x00000000, tmppmem = 0x00000000, tmppatt = 0x00000000; - - /* Check the parameters */ - assert_param( IS_FSMC_NAND_BANK(FSMC_NANDInitStruct->FSMC_Bank)); - assert_param( IS_FSMC_WAIT_FEATURE(FSMC_NANDInitStruct->FSMC_Waitfeature)); - assert_param( IS_FSMC_MEMORY_WIDTH(FSMC_NANDInitStruct->FSMC_MemoryDataWidth)); - assert_param( IS_FSMC_ECC_STATE(FSMC_NANDInitStruct->FSMC_ECC)); - assert_param( IS_FSMC_ECCPAGE_SIZE(FSMC_NANDInitStruct->FSMC_ECCPageSize)); - assert_param( IS_FSMC_TCLR_TIME(FSMC_NANDInitStruct->FSMC_TCLRSetupTime)); - assert_param( IS_FSMC_TAR_TIME(FSMC_NANDInitStruct->FSMC_TARSetupTime)); - assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime)); - assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime)); - - /* Set the tmppcr value according to FSMC_NANDInitStruct parameters */ - tmppcr = (uint32_t)FSMC_NANDInitStruct->FSMC_Waitfeature | - PCR_MEMORYTYPE_NAND | - FSMC_NANDInitStruct->FSMC_MemoryDataWidth | - FSMC_NANDInitStruct->FSMC_ECC | - FSMC_NANDInitStruct->FSMC_ECCPageSize | - (FSMC_NANDInitStruct->FSMC_TCLRSetupTime << 9 )| - (FSMC_NANDInitStruct->FSMC_TARSetupTime << 13); - - /* Set tmppmem value according to FSMC_CommonSpaceTimingStructure parameters */ - tmppmem = (uint32_t)FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime | - (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - /* Set tmppatt value according to FSMC_AttributeSpaceTimingStructure parameters */ - tmppatt = (uint32_t)FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime | - (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - if(FSMC_NANDInitStruct->FSMC_Bank == FSMC_Bank2_NAND) - { - /* FSMC_Bank2_NAND registers configuration */ - FSMC_Bank2->PCR2 = tmppcr; - FSMC_Bank2->PMEM2 = tmppmem; - FSMC_Bank2->PATT2 = tmppatt; - } - else - { - /* FSMC_Bank3_NAND registers configuration */ - FSMC_Bank3->PCR3 = tmppcr; - FSMC_Bank3->PMEM3 = tmppmem; - FSMC_Bank3->PATT3 = tmppatt; - } -} - - -/** - * @brief Fills each FSMC_NANDInitStruct member with its default value. - * @param FSMC_NANDInitStruct: pointer to a FSMC_NANDInitTypeDef structure which - * will be initialized. - * @retval None - */ -void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct) -{ - /* Reset NAND Init structure parameters values */ - FSMC_NANDInitStruct->FSMC_Bank = FSMC_Bank2_NAND; - FSMC_NANDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable; - FSMC_NANDInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; - FSMC_NANDInitStruct->FSMC_ECC = FSMC_ECC_Disable; - FSMC_NANDInitStruct->FSMC_ECCPageSize = FSMC_ECCPageSize_256Bytes; - FSMC_NANDInitStruct->FSMC_TCLRSetupTime = 0x0; - FSMC_NANDInitStruct->FSMC_TARSetupTime = 0x0; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; -} - -/** - * @brief Enables or disables the specified NAND Memory Bank. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @param NewState: new state of the FSMC_Bank. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState) -{ - assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected NAND Bank by setting the PBKEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 |= PCR_PBKEN_SET; - } - else - { - FSMC_Bank3->PCR3 |= PCR_PBKEN_SET; - } - } - else - { - /* Disable the selected NAND Bank by clearing the PBKEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 &= PCR_PBKEN_RESET; - } - else - { - FSMC_Bank3->PCR3 &= PCR_PBKEN_RESET; - } - } -} -/** - * @brief Enables or disables the FSMC NAND ECC feature. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @param NewState: new state of the FSMC NAND ECC feature. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState) -{ - assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected NAND Bank ECC function by setting the ECCEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 |= PCR_ECCEN_SET; - } - else - { - FSMC_Bank3->PCR3 |= PCR_ECCEN_SET; - } - } - else - { - /* Disable the selected NAND Bank ECC function by clearing the ECCEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 &= PCR_ECCEN_RESET; - } - else - { - FSMC_Bank3->PCR3 &= PCR_ECCEN_RESET; - } - } -} - -/** - * @brief Returns the error correction code register value. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @retval The Error Correction Code (ECC) value. - */ -uint32_t FSMC_GetECC(uint32_t FSMC_Bank) -{ - uint32_t eccval = 0x00000000; - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - /* Get the ECCR2 register value */ - eccval = FSMC_Bank2->ECCR2; - } - else - { - /* Get the ECCR3 register value */ - eccval = FSMC_Bank3->ECCR3; - } - /* Return the error correction code value */ - return(eccval); -} -/** - * @} - */ - -/** @defgroup FSMC_Group3 PCCARD Controller functions - * @brief PCCARD Controller functions - * -@verbatim - =============================================================================== - PCCARD Controller functions - =============================================================================== - - The following sequence should be followed to configure the FSMC to interface with - 16-bit PC Card compatible memory connected to the PCCARD Bank: - - 1. Enable the clock for the FSMC and associated GPIOs using the following functions: - RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE); - - 2. FSMC pins configuration - - Connect the involved FSMC pins to AF12 using the following function - GPIO_PinAFConfig(GPIOx, GPIO_PinSourcex, GPIO_AF_FSMC); - - Configure these FSMC pins in alternate function mode by calling the function - GPIO_Init(); - - 3. Declare a FSMC_PCCARDInitTypeDef structure, for example: - FSMC_PCCARDInitTypeDef FSMC_PCCARDInitStructure; - and fill the FSMC_PCCARDInitStructure variable with the allowed values of - the structure member. - - 4. Initialize the PCCARD Controller by calling the function - FSMC_PCCARDInit(&FSMC_PCCARDInitStructure); - - 5. Then enable the PCCARD Bank: - FSMC_PCCARDCmd(ENABLE); - - 6. At this stage you can read/write from/to the memory connected to the PCCARD Bank. - -@endverbatim - * @{ - */ - -/** - * @brief Deinitializes the FSMC PCCARD Bank registers to their default reset values. - * @param None - * @retval None - */ -void FSMC_PCCARDDeInit(void) -{ - /* Set the FSMC_Bank4 registers to their reset values */ - FSMC_Bank4->PCR4 = 0x00000018; - FSMC_Bank4->SR4 = 0x00000000; - FSMC_Bank4->PMEM4 = 0xFCFCFCFC; - FSMC_Bank4->PATT4 = 0xFCFCFCFC; - FSMC_Bank4->PIO4 = 0xFCFCFCFC; -} - -/** - * @brief Initializes the FSMC PCCARD Bank according to the specified parameters - * in the FSMC_PCCARDInitStruct. - * @param FSMC_PCCARDInitStruct : pointer to a FSMC_PCCARDInitTypeDef structure - * that contains the configuration information for the FSMC PCCARD Bank. - * @retval None - */ -void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct) -{ - /* Check the parameters */ - assert_param(IS_FSMC_WAIT_FEATURE(FSMC_PCCARDInitStruct->FSMC_Waitfeature)); - assert_param(IS_FSMC_TCLR_TIME(FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime)); - assert_param(IS_FSMC_TAR_TIME(FSMC_PCCARDInitStruct->FSMC_TARSetupTime)); - - assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime)); - - assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime)); - assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime)); - - /* Set the PCR4 register value according to FSMC_PCCARDInitStruct parameters */ - FSMC_Bank4->PCR4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_Waitfeature | - FSMC_MemoryDataWidth_16b | - (FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime << 9) | - (FSMC_PCCARDInitStruct->FSMC_TARSetupTime << 13); - - /* Set PMEM4 register value according to FSMC_CommonSpaceTimingStructure parameters */ - FSMC_Bank4->PMEM4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime | - (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - /* Set PATT4 register value according to FSMC_AttributeSpaceTimingStructure parameters */ - FSMC_Bank4->PATT4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime | - (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - /* Set PIO4 register value according to FSMC_IOSpaceTimingStructure parameters */ - FSMC_Bank4->PIO4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime | - (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime << 24); -} - -/** - * @brief Fills each FSMC_PCCARDInitStruct member with its default value. - * @param FSMC_PCCARDInitStruct: pointer to a FSMC_PCCARDInitTypeDef structure - * which will be initialized. - * @retval None - */ -void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct) -{ - /* Reset PCCARD Init structure parameters values */ - FSMC_PCCARDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable; - FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime = 0x0; - FSMC_PCCARDInitStruct->FSMC_TARSetupTime = 0x0; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; -} - -/** - * @brief Enables or disables the PCCARD Memory Bank. - * @param NewState: new state of the PCCARD Memory Bank. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_PCCARDCmd(FunctionalState NewState) -{ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the PCCARD Bank by setting the PBKEN bit in the PCR4 register */ - FSMC_Bank4->PCR4 |= PCR_PBKEN_SET; - } - else - { - /* Disable the PCCARD Bank by clearing the PBKEN bit in the PCR4 register */ - FSMC_Bank4->PCR4 &= PCR_PBKEN_RESET; - } -} -/** - * @} - */ - -/** @defgroup FSMC_Group4 Interrupts and flags management functions - * @brief Interrupts and flags management functions - * -@verbatim - =============================================================================== - Interrupts and flags management functions - =============================================================================== - -@endverbatim - * @{ - */ - -/** - * @brief Enables or disables the specified FSMC interrupts. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_IT: specifies the FSMC interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. - * @arg FSMC_IT_Level: Level edge detection interrupt. - * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. - * @param NewState: new state of the specified FSMC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState) -{ - assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); - assert_param(IS_FSMC_IT(FSMC_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected FSMC_Bank2 interrupts */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->SR2 |= FSMC_IT; - } - /* Enable the selected FSMC_Bank3 interrupts */ - else if (FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 |= FSMC_IT; - } - /* Enable the selected FSMC_Bank4 interrupts */ - else - { - FSMC_Bank4->SR4 |= FSMC_IT; - } - } - else - { - /* Disable the selected FSMC_Bank2 interrupts */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - - FSMC_Bank2->SR2 &= (uint32_t)~FSMC_IT; - } - /* Disable the selected FSMC_Bank3 interrupts */ - else if (FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 &= (uint32_t)~FSMC_IT; - } - /* Disable the selected FSMC_Bank4 interrupts */ - else - { - FSMC_Bank4->SR4 &= (uint32_t)~FSMC_IT; - } - } -} - -/** - * @brief Checks whether the specified FSMC flag is set or not. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg FSMC_FLAG_RisingEdge: Rising edge detection Flag. - * @arg FSMC_FLAG_Level: Level detection Flag. - * @arg FSMC_FLAG_FallingEdge: Falling edge detection Flag. - * @arg FSMC_FLAG_FEMPT: Fifo empty Flag. - * @retval The new state of FSMC_FLAG (SET or RESET). - */ -FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG) -{ - FlagStatus bitstatus = RESET; - uint32_t tmpsr = 0x00000000; - - /* Check the parameters */ - assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank)); - assert_param(IS_FSMC_GET_FLAG(FSMC_FLAG)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - tmpsr = FSMC_Bank2->SR2; - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - tmpsr = FSMC_Bank3->SR3; - } - /* FSMC_Bank4_PCCARD*/ - else - { - tmpsr = FSMC_Bank4->SR4; - } - - /* Get the flag status */ - if ((tmpsr & FSMC_FLAG) != (uint16_t)RESET ) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - /* Return the flag status */ - return bitstatus; -} - -/** - * @brief Clears the FSMC's pending flags. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg FSMC_FLAG_RisingEdge: Rising edge detection Flag. - * @arg FSMC_FLAG_Level: Level detection Flag. - * @arg FSMC_FLAG_FallingEdge: Falling edge detection Flag. - * @retval None - */ -void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG) -{ - /* Check the parameters */ - assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank)); - assert_param(IS_FSMC_CLEAR_FLAG(FSMC_FLAG)) ; - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->SR2 &= ~FSMC_FLAG; - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 &= ~FSMC_FLAG; - } - /* FSMC_Bank4_PCCARD*/ - else - { - FSMC_Bank4->SR4 &= ~FSMC_FLAG; - } -} - -/** - * @brief Checks whether the specified FSMC interrupt has occurred or not. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_IT: specifies the FSMC interrupt source to check. - * This parameter can be one of the following values: - * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. - * @arg FSMC_IT_Level: Level edge detection interrupt. - * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. - * @retval The new state of FSMC_IT (SET or RESET). - */ -ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT) -{ - ITStatus bitstatus = RESET; - uint32_t tmpsr = 0x0, itstatus = 0x0, itenable = 0x0; - - /* Check the parameters */ - assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); - assert_param(IS_FSMC_GET_IT(FSMC_IT)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - tmpsr = FSMC_Bank2->SR2; - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - tmpsr = FSMC_Bank3->SR3; - } - /* FSMC_Bank4_PCCARD*/ - else - { - tmpsr = FSMC_Bank4->SR4; - } - - itstatus = tmpsr & FSMC_IT; - - itenable = tmpsr & (FSMC_IT >> 3); - if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the FSMC's interrupt pending bits. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_IT: specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. - * @arg FSMC_IT_Level: Level edge detection interrupt. - * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. - * @retval None - */ -void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT) -{ - /* Check the parameters */ - assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); - assert_param(IS_FSMC_IT(FSMC_IT)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->SR2 &= ~(FSMC_IT >> 3); - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 &= ~(FSMC_IT >> 3); - } - /* FSMC_Bank4_PCCARD*/ - else - { - FSMC_Bank4->SR4 &= ~(FSMC_IT >> 3); - } -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/Ubiquitous/XiUOS/kernel/kernel_test/test_lcd.c b/Ubiquitous/XiUOS/kernel/kernel_test/test_lcd.c index cc4088c0d..32ddf044b 100644 --- a/Ubiquitous/XiUOS/kernel/kernel_test/test_lcd.c +++ b/Ubiquitous/XiUOS/kernel/kernel_test/test_lcd.c @@ -21,9 +21,7 @@ #include "bus_lcd.h" #include "dev_lcd.h" -uint16 color = RED; - -char *addr ="LCD Testing "; +static char *addr = "LCD Testing"; /** * @description: Enable LCD function @@ -31,14 +29,13 @@ char *addr ="LCD Testing "; * @param driver_name - LCD driver name * @param device_name - LCD device name */ -int EnableLcd(const char *bus_name, const char *driver_name, const char *device_name) +static int EnableLcd(const char *bus_name, const char *driver_name, const char *device_name) { struct Bus *bus; struct Driver *driver, *bus_driver; struct HardwareDev *device; struct HardwareDev *bus_device; - if (bus_name) { KPrintf("##test find bus %s\n", bus_name); bus = BusFind(bus_name); @@ -59,41 +56,33 @@ int EnableLcd(const char *bus_name, const char *driver_name, const char *device_ KPrintf("##test device %p bus_device %p##\n", device, bus_device); } - LcdStringParam str; - str.x_pos = 60 ; - str.y_pos = 40; - str.width = 250; - str.height = 24; - str.font_size = 24; - str.addr = addr; - str.font_color = WHITE; - str.back_color = RED; + LcdWriteParam lcd_write_param; + lcd_write_param.type = 0; + lcd_write_param.string_info.x_pos = 60; + lcd_write_param.string_info.y_pos = 40; + lcd_write_param.string_info.width = 250; + lcd_write_param.string_info.height = 24; + lcd_write_param.string_info.font_size = 24; + lcd_write_param.string_info.addr = addr; + lcd_write_param.string_info.font_color = WHITE; + lcd_write_param.string_info.back_color = RED; struct BusBlockWriteParam write_param; - memset(&write_param,0,sizeof(struct BusBlockWriteParam )); + memset(&write_param, 0, sizeof(struct BusBlockWriteParam )); - struct BusConfigureInfo pdata = {RED,NONE}; - - write_param.pos = 0; - write_param.buffer = &str ; + write_param.buffer = &lcd_write_param; while (1) { - - BusDrvConfigure(bus_driver, &pdata ); + BusDevWriteData(device, &write_param); MdelayKTask(1000); - - BusDevWriteData(device,&write_param); - MdelayKTask(1000); - } } /** * @description: LCD test function */ -void TestLcd(void) +void TestLcd(void) { - EnableLcd(LCD_BUS_NAME_1,LCD_DRV_NAME_1,LCD_1_DEVICE_NAME_0); + EnableLcd(LCD_BUS_NAME, LCD_DRV_NAME, LCD_DEVICE_NAME); } - -SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0),TestLcd, TestLcd, Test LCD ); +SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0),TestLcd, TestLcd, Test LCD); diff --git a/Ubiquitous/XiUOS/resources/include/dev_lcd.h b/Ubiquitous/XiUOS/resources/include/dev_lcd.h index fe967a633..576b476aa 100644 --- a/Ubiquitous/XiUOS/resources/include/dev_lcd.h +++ b/Ubiquitous/XiUOS/resources/include/dev_lcd.h @@ -30,26 +30,26 @@ extern "C" { /*set the pen color*/ #define WHITE 0xFFFF #define BLACK 0x0000 -#define BLUE 0x001F -#define BRED 0xF81F -#define GRED 0xFFE0 +#define BLUE 0x001F +#define BRED 0xF81F +#define GRED 0xFFE0 #define GBLUE 0x07FF -#define RED 0xF800 -#define MAGENTA 0xF81F +#define RED 0xF800 +#define MAGENTA 0xF81F #define GREEN 0x07E0 -#define CYAN 0x7FFF -#define YELLOW 0xFFE0 -#define BROWN 0xBC40 +#define CYAN 0x7FFF +#define YELLOW 0xFFE0 +#define BROWN 0xBC40 #define BRRED 0xFC07 -#define GRAY 0x8430 +#define GRAY 0x8430 #define DARKBLUE 0x01CF//Navy blue #define LIGHTBLUE 0x7D7C//Light blue -#define GRAYBLUE 0x5458//Gray blue -#define LIGHTGREEN 0x841F -#define LGRAY 0xC618 +#define GRAYBLUE 0x5458//Gray blue +#define LIGHTGREEN 0x841F +#define LGRAY 0xC618 #define LGRAYBLUE 0xA651 -#define LBBLUE 0x2B12 +#define LBBLUE 0x2B12 typedef struct { @@ -63,7 +63,23 @@ typedef struct uint16 back_color; }LcdStringParam; -struct LcdDevDone +typedef struct +{ + uint16 x_startpos; + uint16 x_endpos; + uint16 y_startpos; + uint16 y_endpos; + void *pixel_color; +}LcdPixelParam; + +typedef struct +{ + char type;//0: string; 1 : dot + LcdPixelParam pixel_info; + LcdStringParam string_info; +}LcdWriteParam; + +struct LcdDevDone { uint32 (*open) (void *dev); uint32 (*close) (void *dev); @@ -71,11 +87,11 @@ struct LcdDevDone uint32 (*read) (void *dev, struct BusBlockReadParam *read_param); }; -struct LcdHardwareDevice +struct LcdHardwareDevice { struct HardwareDev haldev; - const struct LcdDevDone *dev_done; + const struct LcdDevDone *dev_done; void *private_data; }; From 3a84b9942b5a73cdd3bd7464d7442a273c34a8aa Mon Sep 17 00:00:00 2001 From: Liu_Weichao Date: Wed, 19 Jan 2022 13:56:05 +0800 Subject: [PATCH 2/3] fix lcd display error --- .../third_party_driver/include/connect_lcd.h | 2 +- .../third_party_driver/lcd/Kconfig | 6 ++ .../third_party_driver/lcd/connect_lcd.c | 61 ++++++++++--------- 3 files changed, 38 insertions(+), 31 deletions(-) diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_lcd.h b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_lcd.h index def430b27..2fe53769c 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_lcd.h +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/include/connect_lcd.h @@ -121,7 +121,7 @@ extern "C" { #define D2U_L2R 6 #define D2U_R2L 7 -#define DFT_SCAN_DIR L2R_U2D //default scan direction +#define DFT_SCAN_DIR U2D_R2L //default scan direction #define FSMC_BANK1_NORSRAM4_START_ADDRESS 0x6C000000 #define FSMC_BANK1_NORSRAM4_DATA_WIDTH 16 diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Kconfig b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Kconfig index b859ecb61..fb419b449 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Kconfig +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/Kconfig @@ -8,4 +8,10 @@ if BSP_USING_LCD config LCD_DEVICE_NAME string "lcd bus device name" default "lcd_dev" + config BSP_LCD_X_MAX + int "LCD Height" + default 240 + config BSP_LCD_Y_MAX + int "LCD Width" + default 320 endif diff --git a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/connect_lcd.c b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/connect_lcd.c index 9df8912e2..0b2707abb 100644 --- a/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/connect_lcd.c +++ b/Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/lcd/connect_lcd.c @@ -32,6 +32,31 @@ Modification: #include #include +static int Stm32LcdUdelay(uint32 us) +{ + uint32 ticks; + uint32 told, tnow, tcnt = 0; + uint32 reload = SysTick->LOAD; + + ticks = us * reload / (1000000 / TICK_PER_SECOND); + told = SysTick->VAL; + while (1) { + tnow = SysTick->VAL; + if (tnow != told) { + if (tnow < told) { + tcnt += told - tnow; + } else { + tcnt += reload - tnow + told; + } + told = tnow; + if (tcnt >= ticks) { + return 0; + break; + } + } + } +} + static void HwFsmcInit() { GPIO_InitTypeDef GPIO_InitStructure; @@ -163,7 +188,7 @@ static uint16_t LcdReadData(LCD_TypeDef *LCD) static uint16_t LcdReadReg(LCD_TypeDef *LCD, uint16_t cmd) { LcdWriteCmd(LCD, cmd); - MdelayKTask(1); + Stm32LcdUdelay(1000); return LcdReadData(LCD); } @@ -300,36 +325,8 @@ static void LcdScanDirection(struct Stm32HwLcd *hw_lcd, uint8_t scan_direction) { uint16_t cmd = 0; uint16_t temp; - uint8_t scan_direction_reverse; switch (scan_direction) { - case 0: - scan_direction_reverse = 6; - break; - case 1: - scan_direction_reverse = 7; - break; - case 2: - scan_direction_reverse = 4; - break; - case 3: - scan_direction_reverse = 5; - break; - case 4: - scan_direction_reverse = 1; - break; - case 5: - scan_direction_reverse = 0; - break; - case 6: - scan_direction_reverse = 3; - break; - case 7: - scan_direction_reverse = 2; - break; - } - - switch (scan_direction_reverse) { case L2R_U2D: cmd |= (0 << 7) | (0 << 6) | (0 << 5); break; @@ -502,7 +499,7 @@ static void HwLcdInit(struct Stm32HwLcd *hw_lcd) LcdWriteData(hw_lcd->LCD, 0x00); LcdWriteData(hw_lcd->LCD, 0xef); LcdWriteCmd(hw_lcd->LCD, SLEEP_OFF);//Exit Sleep - MdelayKTask(120); + Stm32LcdUdelay(120000); LcdWriteCmd(hw_lcd->LCD, DISPALY_ON);//display on LcdDisplayDirection(hw_lcd); @@ -647,8 +644,12 @@ int Stm32HwLcdInit(void) return ERROR; } + Stm32LcdUdelay(5000000); + HwFsmcInit(); + Stm32LcdUdelay(20000); + HwLcdInit(&hw_lcd); #endif From 63ec04cf6ea71eeb259b7692a6b2e919417c8c8d Mon Sep 17 00:00:00 2001 From: Liu_Weichao Date: Fri, 21 Jan 2022 16:03:31 +0800 Subject: [PATCH 3/3] fix xiuos/transform.h code standard problem --- .../Framework/transform_layer/xiuos/transform.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/APP_Framework/Framework/transform_layer/xiuos/transform.h b/APP_Framework/Framework/transform_layer/xiuos/transform.h index 209d96ffa..e020b4f51 100644 --- a/APP_Framework/Framework/transform_layer/xiuos/transform.h +++ b/APP_Framework/Framework/transform_layer/xiuos/transform.h @@ -32,7 +32,7 @@ extern "C" { #endif -#define OPE_INT 0x0000 +#define OPE_INT 0x0000 #define OPE_CFG 0x0001 #define NAME_NUM_MAX 32 @@ -41,13 +41,13 @@ extern "C" { #define GPIO_LOW 0x00 #define GPIO_HIGH 0x01 -#define GPIO_CFG_OUTPUT 0x00 -#define GPIO_CFG_INPUT 0x01 -#define GPIO_CFG_INPUT_PULLUP 0x02 +#define GPIO_CFG_OUTPUT 0x00 +#define GPIO_CFG_INPUT 0x01 +#define GPIO_CFG_INPUT_PULLUP 0x02 #define GPIO_CFG_INPUT_PULLDOWN 0x03 -#define GPIO_CFG_OUTPUT_OD 0x04 +#define GPIO_CFG_OUTPUT_OD 0x04 -#define GPIO_CONFIG_MODE 0xffffffff +#define GPIO_CONFIG_MODE 0xffffffff /********************SERIAL define*******************/ #define BAUD_RATE_2400 2400